937 lines
20 KiB
Plaintext
937 lines
20 KiB
Plaintext
EESchema Schematic File Version 4
|
|
EELAYER 30 0
|
|
EELAYER END
|
|
$Descr A4 11693 8268
|
|
encoding utf-8
|
|
Sheet 1 1
|
|
Title ""
|
|
Date ""
|
|
Rev ""
|
|
Comp ""
|
|
Comment1 ""
|
|
Comment2 ""
|
|
Comment3 ""
|
|
Comment4 ""
|
|
$EndDescr
|
|
$Comp
|
|
L power:GND #PWR015
|
|
U 1 1 61B99BEA
|
|
P 9550 5250
|
|
F 0 "#PWR015" H 9550 5000 50 0001 C CNN
|
|
F 1 "GND" H 9555 5077 50 0000 C CNN
|
|
F 2 "" H 9550 5250 50 0001 C CNN
|
|
F 3 "" H 9550 5250 50 0001 C CNN
|
|
1 9550 5250
|
|
1 0 0 -1
|
|
$EndComp
|
|
Text GLabel 10350 2400 2 50 Input ~ 0
|
|
CPU_A0
|
|
Wire Wire Line
|
|
10350 2400 10250 2400
|
|
Text GLabel 10350 2500 2 50 Input ~ 0
|
|
CPU_A1
|
|
Wire Wire Line
|
|
10350 2500 10250 2500
|
|
Text GLabel 10350 2600 2 50 Input ~ 0
|
|
CPU_A2
|
|
Wire Wire Line
|
|
10350 2600 10250 2600
|
|
Text GLabel 10350 2700 2 50 Input ~ 0
|
|
CPU_A3
|
|
Wire Wire Line
|
|
10350 2700 10250 2700
|
|
Text GLabel 10350 2800 2 50 Input ~ 0
|
|
CPU_A4
|
|
Wire Wire Line
|
|
10350 2800 10250 2800
|
|
Text GLabel 10350 2900 2 50 Input ~ 0
|
|
CPU_A5
|
|
Wire Wire Line
|
|
10350 2900 10250 2900
|
|
Text GLabel 10350 3000 2 50 Input ~ 0
|
|
CPU_A6
|
|
Wire Wire Line
|
|
10350 3000 10250 3000
|
|
Text GLabel 10350 3100 2 50 Input ~ 0
|
|
CPU_A7
|
|
Wire Wire Line
|
|
10350 3100 10250 3100
|
|
Text GLabel 10350 3200 2 50 Input ~ 0
|
|
CPU_A8
|
|
Wire Wire Line
|
|
10350 3200 10250 3200
|
|
Text GLabel 10350 3300 2 50 Input ~ 0
|
|
CPU_A9
|
|
Wire Wire Line
|
|
10350 3300 10250 3300
|
|
Text GLabel 10350 3400 2 50 Input ~ 0
|
|
CPU_A10
|
|
Wire Wire Line
|
|
10350 3400 10250 3400
|
|
Text GLabel 10350 3500 2 50 Input ~ 0
|
|
CPU_A11
|
|
Wire Wire Line
|
|
10350 3500 10250 3500
|
|
Text GLabel 10350 3600 2 50 Input ~ 0
|
|
CPU_A12
|
|
Wire Wire Line
|
|
10350 3600 10250 3600
|
|
Text GLabel 10350 3700 2 50 Input ~ 0
|
|
CPU_A13
|
|
Wire Wire Line
|
|
10350 3700 10250 3700
|
|
Text GLabel 10350 3800 2 50 Input ~ 0
|
|
CPU_A14
|
|
Wire Wire Line
|
|
10350 3800 10250 3800
|
|
Text GLabel 10350 3900 2 50 Input ~ 0
|
|
CPU_A15
|
|
Wire Wire Line
|
|
10350 3900 10250 3900
|
|
Text GLabel 8750 3100 0 50 Input ~ 0
|
|
CPU_INTR
|
|
Text GLabel 8750 3000 0 50 Input ~ 0
|
|
CPU_NMI
|
|
Text GLabel 8750 2400 0 50 Input ~ 0
|
|
CPU_RESET
|
|
Text GLabel 8750 3600 0 50 Input ~ 0
|
|
CPU_WAIT
|
|
Text GLabel 8750 2700 0 50 Input ~ 0
|
|
CPU_CLK
|
|
$Comp
|
|
L power:+5V #PWR016
|
|
U 1 1 61BB1FD6
|
|
P 9550 1950
|
|
F 0 "#PWR016" H 9550 1800 50 0001 C CNN
|
|
F 1 "+5V" H 9565 2123 50 0000 C CNN
|
|
F 2 "" H 9550 1950 50 0001 C CNN
|
|
F 3 "" H 9550 1950 50 0001 C CNN
|
|
1 9550 1950
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
9550 2100 9550 1950
|
|
Wire Wire Line
|
|
5900 3600 6000 3600
|
|
Wire Wire Line
|
|
5900 3700 6000 3700
|
|
Wire Wire Line
|
|
5900 3800 6000 3800
|
|
Wire Wire Line
|
|
5900 3900 6000 3900
|
|
Wire Wire Line
|
|
5900 4000 6000 4000
|
|
Wire Wire Line
|
|
5900 4100 6000 4100
|
|
Wire Wire Line
|
|
5900 4200 6000 4200
|
|
Wire Wire Line
|
|
5900 4300 6000 4300
|
|
$Comp
|
|
L power:GND #PWR012
|
|
U 1 1 61C0E7B7
|
|
P 6500 5000
|
|
F 0 "#PWR012" H 6500 4750 50 0001 C CNN
|
|
F 1 "GND" H 6505 4827 50 0000 C CNN
|
|
F 2 "" H 6500 5000 50 0001 C CNN
|
|
F 3 "" H 6500 5000 50 0001 C CNN
|
|
1 6500 5000
|
|
1 0 0 -1
|
|
$EndComp
|
|
$Comp
|
|
L power:+3.3V #PWR011
|
|
U 1 1 61C0E7BE
|
|
P 6500 3200
|
|
F 0 "#PWR011" H 6500 3050 50 0001 C CNN
|
|
F 1 "+3.3V" H 6515 3373 50 0000 C CNN
|
|
F 2 "" H 6500 3200 50 0001 C CNN
|
|
F 3 "" H 6500 3200 50 0001 C CNN
|
|
1 6500 3200
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
6500 3300 6500 3200
|
|
Wire Wire Line
|
|
5900 4500 6000 4500
|
|
Text GLabel 7100 3600 2 50 Input ~ 0
|
|
CPU_AD0
|
|
Text GLabel 7100 3700 2 50 Input ~ 0
|
|
CPU_AD1
|
|
Text GLabel 7100 3800 2 50 Input ~ 0
|
|
CPU_AD2
|
|
Text GLabel 7100 3900 2 50 Input ~ 0
|
|
CPU_AD3
|
|
Text GLabel 7100 4000 2 50 Input ~ 0
|
|
CPU_AD4
|
|
Text GLabel 7100 4100 2 50 Input ~ 0
|
|
CPU_AD5
|
|
Text GLabel 7100 4200 2 50 Input ~ 0
|
|
CPU_AD6
|
|
Text GLabel 7100 4300 2 50 Input ~ 0
|
|
CPU_AD7
|
|
Wire Wire Line
|
|
7100 4300 7000 4300
|
|
Wire Wire Line
|
|
7100 4200 7000 4200
|
|
Wire Wire Line
|
|
7100 4100 7000 4100
|
|
Wire Wire Line
|
|
7100 4000 7000 4000
|
|
Wire Wire Line
|
|
7100 3900 7000 3900
|
|
Wire Wire Line
|
|
7100 3800 7000 3800
|
|
Wire Wire Line
|
|
7100 3700 7000 3700
|
|
Wire Wire Line
|
|
7100 3600 7000 3600
|
|
Text GLabel 5900 3600 0 50 Input ~ 0
|
|
TEENSY_AD0_OUT
|
|
Text GLabel 5900 3700 0 50 Input ~ 0
|
|
TEENSY_AD1_OUT
|
|
Text GLabel 5900 3800 0 50 Input ~ 0
|
|
TEENSY_AD2_OUT
|
|
Text GLabel 5900 3900 0 50 Input ~ 0
|
|
TEENSY_AD3_OUT
|
|
Text GLabel 5900 4000 0 50 Input ~ 0
|
|
TEENSY_AD4_OUT
|
|
Text GLabel 5900 4100 0 50 Input ~ 0
|
|
TEENSY_AD5_OUT
|
|
Text GLabel 5900 4200 0 50 Input ~ 0
|
|
TEENSY_AD6_OUT
|
|
Text GLabel 5900 4300 0 50 Input ~ 0
|
|
TEENSY_AD7_OUT
|
|
$Comp
|
|
L power:+3.3V #PWR010
|
|
U 1 1 61C82B60
|
|
P 5900 4500
|
|
F 0 "#PWR010" H 5900 4350 50 0001 C CNN
|
|
F 1 "+3.3V" V 5900 4750 50 0000 C CNN
|
|
F 2 "" H 5900 4500 50 0001 C CNN
|
|
F 3 "" H 5900 4500 50 0001 C CNN
|
|
1 5900 4500
|
|
0 -1 -1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
6500 4900 6500 5000
|
|
Wire Wire Line
|
|
5900 4600 6000 4600
|
|
Text GLabel 5900 4600 0 50 Input ~ 0
|
|
TEENSY_DATA_OE_n
|
|
Text Notes 1850 1100 0 276 ~ 55
|
|
MCLZ8
|
|
Text GLabel 4700 6650 0 50 Input ~ 0
|
|
CPU_AD0
|
|
Wire Wire Line
|
|
4700 5950 4800 5950
|
|
Text GLabel 4700 6550 0 50 Input ~ 0
|
|
CPU_AD1
|
|
Wire Wire Line
|
|
4700 6050 4800 6050
|
|
Text GLabel 4700 6450 0 50 Input ~ 0
|
|
CPU_AD2
|
|
Wire Wire Line
|
|
4700 6150 4800 6150
|
|
Text GLabel 4700 6350 0 50 Input ~ 0
|
|
CPU_AD3
|
|
Wire Wire Line
|
|
4700 6250 4800 6250
|
|
Text GLabel 4700 6250 0 50 Input ~ 0
|
|
CPU_AD4
|
|
Wire Wire Line
|
|
4700 6350 4800 6350
|
|
Text GLabel 4700 6150 0 50 Input ~ 0
|
|
CPU_AD5
|
|
Wire Wire Line
|
|
4700 6450 4800 6450
|
|
Text GLabel 4700 6050 0 50 Input ~ 0
|
|
CPU_AD6
|
|
Wire Wire Line
|
|
4700 6550 4800 6550
|
|
Text GLabel 4700 5950 0 50 Input ~ 0
|
|
CPU_AD7
|
|
Wire Wire Line
|
|
4700 6650 4800 6650
|
|
$Comp
|
|
L power:GND #PWR014
|
|
U 1 1 61BB88CC
|
|
P 5300 7350
|
|
F 0 "#PWR014" H 5300 7100 50 0001 C CNN
|
|
F 1 "GND" H 5305 7177 50 0000 C CNN
|
|
F 2 "" H 5300 7350 50 0001 C CNN
|
|
F 3 "" H 5300 7350 50 0001 C CNN
|
|
1 5300 7350
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
5300 7350 5300 7300
|
|
$Comp
|
|
L power:+3.3V #PWR013
|
|
U 1 1 61BB9EEB
|
|
P 5300 5550
|
|
F 0 "#PWR013" H 5300 5400 50 0001 C CNN
|
|
F 1 "+3.3V" H 5315 5723 50 0000 C CNN
|
|
F 2 "" H 5300 5550 50 0001 C CNN
|
|
F 3 "" H 5300 5550 50 0001 C CNN
|
|
1 5300 5550
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
5300 5650 5300 5550
|
|
Wire Wire Line
|
|
5900 5950 5800 5950
|
|
Wire Wire Line
|
|
5900 6050 5800 6050
|
|
Wire Wire Line
|
|
5900 6150 5800 6150
|
|
Wire Wire Line
|
|
5900 6250 5800 6250
|
|
Wire Wire Line
|
|
5900 6350 5800 6350
|
|
Text GLabel 5900 6150 2 50 Input ~ 0
|
|
TEENSY_AD5_IN
|
|
Wire Wire Line
|
|
5900 6450 5800 6450
|
|
Text GLabel 5900 6050 2 50 Input ~ 0
|
|
TEENSY_AD6_IN
|
|
Wire Wire Line
|
|
5900 6550 5800 6550
|
|
Text GLabel 5900 5950 2 50 Input ~ 0
|
|
TEENSY_AD7_IN
|
|
Wire Wire Line
|
|
5900 6650 5800 6650
|
|
Wire Wire Line
|
|
5300 7300 4700 7300
|
|
Wire Wire Line
|
|
4700 7300 4700 6950
|
|
Wire Wire Line
|
|
4700 6950 4800 6950
|
|
Connection ~ 5300 7300
|
|
Wire Wire Line
|
|
5300 7300 5300 7250
|
|
Text GLabel 3950 2700 2 50 Input ~ 0
|
|
TEENSY_AD0_IN
|
|
Text GLabel 3950 2800 2 50 Input ~ 0
|
|
TEENSY_AD1_IN
|
|
Text GLabel 3950 2900 2 50 Input ~ 0
|
|
TEENSY_AD2_IN
|
|
Text GLabel 3950 3000 2 50 Input ~ 0
|
|
TEENSY_AD3_IN
|
|
Text GLabel 3950 3100 2 50 Input ~ 0
|
|
TEENSY_AD4_IN
|
|
Wire Wire Line
|
|
1550 2100 1650 2100
|
|
Wire Wire Line
|
|
1550 2200 1650 2200
|
|
Wire Wire Line
|
|
1550 2300 1650 2300
|
|
Wire Wire Line
|
|
1550 2400 1650 2400
|
|
$Comp
|
|
L power:GND #PWR03
|
|
U 1 1 61CD3DF8
|
|
P 1550 1900
|
|
F 0 "#PWR03" H 1550 1650 50 0001 C CNN
|
|
F 1 "GND" V 1550 1700 50 0000 C CNN
|
|
F 2 "" H 1550 1900 50 0001 C CNN
|
|
F 3 "" H 1550 1900 50 0001 C CNN
|
|
1 1550 1900
|
|
0 1 1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
1550 1900 1650 1900
|
|
$Comp
|
|
L power:GND #PWR07
|
|
U 1 1 61CE84A9
|
|
P 4000 2000
|
|
F 0 "#PWR07" H 4000 1750 50 0001 C CNN
|
|
F 1 "GND" V 4000 1800 50 0000 C CNN
|
|
F 2 "" H 4000 2000 50 0001 C CNN
|
|
F 3 "" H 4000 2000 50 0001 C CNN
|
|
1 4000 2000
|
|
0 -1 -1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
3850 2000 4000 2000
|
|
$Comp
|
|
L power:+3.3V #PWR08
|
|
U 1 1 61CED9E3
|
|
P 4000 2100
|
|
F 0 "#PWR08" H 4000 1950 50 0001 C CNN
|
|
F 1 "+3.3V" V 4000 2350 50 0000 C CNN
|
|
F 2 "" H 4000 2100 50 0001 C CNN
|
|
F 3 "" H 4000 2100 50 0001 C CNN
|
|
1 4000 2100
|
|
0 1 1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
3850 2100 4000 2100
|
|
$Comp
|
|
L power:GND #PWR09
|
|
U 1 1 61D0CC7F
|
|
P 4000 3300
|
|
F 0 "#PWR09" H 4000 3050 50 0001 C CNN
|
|
F 1 "GND" V 4000 3100 50 0000 C CNN
|
|
F 2 "" H 4000 3300 50 0001 C CNN
|
|
F 3 "" H 4000 3300 50 0001 C CNN
|
|
1 4000 3300
|
|
0 -1 -1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
3850 3300 4000 3300
|
|
$Comp
|
|
L power:+3.3V #PWR02
|
|
U 1 1 61D121B1
|
|
P 1500 3300
|
|
F 0 "#PWR02" H 1500 3150 50 0001 C CNN
|
|
F 1 "+3.3V" V 1500 3550 50 0000 C CNN
|
|
F 2 "" H 1500 3300 50 0001 C CNN
|
|
F 3 "" H 1500 3300 50 0001 C CNN
|
|
1 1500 3300
|
|
0 -1 -1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
1650 3300 1500 3300
|
|
Wire Wire Line
|
|
1550 2500 1650 2500
|
|
Wire Wire Line
|
|
1550 2600 1650 2600
|
|
Wire Wire Line
|
|
1550 2700 1650 2700
|
|
Wire Wire Line
|
|
1550 2800 1650 2800
|
|
Wire Wire Line
|
|
1550 2900 1650 2900
|
|
Wire Wire Line
|
|
1550 3000 1650 3000
|
|
Wire Wire Line
|
|
1550 4000 1650 4000
|
|
Wire Wire Line
|
|
1550 4100 1650 4100
|
|
Wire Wire Line
|
|
1550 4200 1650 4200
|
|
Wire Wire Line
|
|
3850 2200 3950 2200
|
|
Wire Wire Line
|
|
3850 2300 3950 2300
|
|
Wire Wire Line
|
|
3850 2400 3950 2400
|
|
Wire Wire Line
|
|
3850 2500 3950 2500
|
|
Wire Wire Line
|
|
3850 2600 3950 2600
|
|
Wire Wire Line
|
|
3850 2700 3950 2700
|
|
Wire Wire Line
|
|
3850 2800 3950 2800
|
|
Wire Wire Line
|
|
3850 2900 3950 2900
|
|
Wire Wire Line
|
|
3850 3900 3950 3900
|
|
Wire Wire Line
|
|
3850 4000 3950 4000
|
|
Wire Wire Line
|
|
3850 4100 3950 4100
|
|
Wire Wire Line
|
|
3850 4200 3950 4200
|
|
Wire Wire Line
|
|
3850 3500 3950 3500
|
|
Wire Wire Line
|
|
3850 3600 3950 3600
|
|
Wire Wire Line
|
|
3850 3700 3950 3700
|
|
Wire Wire Line
|
|
3850 3800 3950 3800
|
|
Wire Wire Line
|
|
3850 3400 3950 3400
|
|
Wire Wire Line
|
|
3850 3000 3950 3000
|
|
Wire Wire Line
|
|
3850 3100 3950 3100
|
|
Wire Wire Line
|
|
3850 3200 3950 3200
|
|
Wire Wire Line
|
|
1550 2000 1650 2000
|
|
Text GLabel 1550 2200 0 50 Input ~ 0
|
|
TEENSY_DATA_OE_n
|
|
Text GLabel 1550 2300 0 50 Input ~ 0
|
|
TEENSY_AD0_OUT
|
|
Text GLabel 1550 2400 0 50 Input ~ 0
|
|
TEENSY_AD1_OUT
|
|
Text GLabel 1550 2500 0 50 Input ~ 0
|
|
TEENSY_AD2_OUT
|
|
Text GLabel 1550 2600 0 50 Input ~ 0
|
|
TEENSY_AD3_OUT
|
|
Text GLabel 1550 2700 0 50 Input ~ 0
|
|
TEENSY_AD4_OUT
|
|
Text GLabel 1550 2800 0 50 Input ~ 0
|
|
TEENSY_AD5_OUT
|
|
Text GLabel 1550 2900 0 50 Input ~ 0
|
|
TEENSY_AD6_OUT
|
|
Text GLabel 1550 3000 0 50 Input ~ 0
|
|
TEENSY_AD7_OUT
|
|
Text GLabel 1550 4000 0 50 Input ~ 0
|
|
CPU_A15
|
|
Text GLabel 1550 4100 0 50 Input ~ 0
|
|
CPU_A14
|
|
Text GLabel 1550 4200 0 50 Input ~ 0
|
|
CPU_A13
|
|
Text GLabel 3950 4200 2 50 Input ~ 0
|
|
CPU_A12
|
|
Text GLabel 3950 4100 2 50 Input ~ 0
|
|
CPU_A11
|
|
Text GLabel 3950 4000 2 50 Input ~ 0
|
|
CPU_A10
|
|
Text GLabel 3950 3900 2 50 Input ~ 0
|
|
CPU_A9
|
|
Text GLabel 3950 3800 2 50 Input ~ 0
|
|
CPU_A8
|
|
Text GLabel 3950 3600 2 50 Input ~ 0
|
|
TEENSY_AD7_IN
|
|
Text GLabel 3950 3500 2 50 Input ~ 0
|
|
TEENSY_AD6_IN
|
|
Text GLabel 3950 3400 2 50 Input ~ 0
|
|
TEENSY_AD5_IN
|
|
Text GLabel 3950 2400 2 50 Input ~ 0
|
|
TEENSY_CLK
|
|
Text GLabel 3950 2500 2 50 Input ~ 0
|
|
TEENSY_INTR
|
|
Text GLabel 3950 2600 2 50 Input ~ 0
|
|
TEENSY_NMI
|
|
Text GLabel 3950 2200 2 50 Input ~ 0
|
|
TEENSY_RESET
|
|
Text GLabel 3950 2300 2 50 Input ~ 0
|
|
TEENSY_WAIT
|
|
$Comp
|
|
L teensy:Teensy4.1 U1
|
|
U 1 1 61B9A39C
|
|
P 2750 4050
|
|
F 0 "U1" H 2750 6615 50 0000 C CNN
|
|
F 1 "Teensy4.1" H 2750 6524 50 0000 C CNN
|
|
F 2 "Teensy:Teensy41_Ted_Modified" H 2350 4450 50 0001 C CNN
|
|
F 3 "" H 2350 4450 50 0001 C CNN
|
|
1 2750 4050
|
|
1 0 0 -1
|
|
$EndComp
|
|
$Comp
|
|
L 74xx:74LS573 U3
|
|
U 1 1 61B9DB3E
|
|
P 5300 6450
|
|
F 0 "U3" H 4900 7200 50 0000 C CNN
|
|
F 1 "SN74LVC573A" H 4850 7100 50 0000 C CNN
|
|
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 5300 6450 50 0001 C CNN
|
|
F 3 "74xx/74hc573.pdf" H 5300 6450 50 0001 C CNN
|
|
1 5300 6450
|
|
1 0 0 -1
|
|
$EndComp
|
|
$Comp
|
|
L 74xx:74LS573 U5
|
|
U 1 1 61C0E7A1
|
|
P 6500 4100
|
|
F 0 "U5" H 6100 4850 50 0000 C CNN
|
|
F 1 "SN74LVC573A" H 6100 4750 50 0000 C CNN
|
|
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 6500 4100 50 0001 C CNN
|
|
F 3 "74xx/74hc573.pdf" H 6500 4100 50 0001 C CNN
|
|
1 6500 4100
|
|
1 0 0 -1
|
|
$EndComp
|
|
$Comp
|
|
L 74xx:74LS573 U4
|
|
U 1 1 61C1662B
|
|
P 2400 6500
|
|
F 0 "U4" H 2000 7250 50 0000 C CNN
|
|
F 1 "SN74LVC573A" H 2000 7150 50 0000 C CNN
|
|
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 2400 6500 50 0001 C CNN
|
|
F 3 "74xx/74hc573.pdf" H 2400 6500 50 0001 C CNN
|
|
1 2400 6500
|
|
1 0 0 -1
|
|
$EndComp
|
|
$Comp
|
|
L power:GND #PWR05
|
|
U 1 1 61C16641
|
|
P 2400 7400
|
|
F 0 "#PWR05" H 2400 7150 50 0001 C CNN
|
|
F 1 "GND" H 2405 7227 50 0000 C CNN
|
|
F 2 "" H 2400 7400 50 0001 C CNN
|
|
F 3 "" H 2400 7400 50 0001 C CNN
|
|
1 2400 7400
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
2400 7400 2400 7350
|
|
$Comp
|
|
L power:+3.3V #PWR04
|
|
U 1 1 61C16648
|
|
P 2400 5600
|
|
F 0 "#PWR04" H 2400 5450 50 0001 C CNN
|
|
F 1 "+3.3V" H 2415 5773 50 0000 C CNN
|
|
F 2 "" H 2400 5600 50 0001 C CNN
|
|
F 3 "" H 2400 5600 50 0001 C CNN
|
|
1 2400 5600
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
2400 5700 2400 5600
|
|
Text GLabel 3000 6200 2 50 Input ~ 0
|
|
TEENSY_CLK
|
|
Wire Wire Line
|
|
3000 6000 2900 6000
|
|
Text GLabel 3000 6100 2 50 Input ~ 0
|
|
TEENSY_INTR
|
|
Wire Wire Line
|
|
3000 6100 2900 6100
|
|
Text GLabel 3000 6000 2 50 Input ~ 0
|
|
TEENSY_NMI
|
|
Wire Wire Line
|
|
3000 6200 2900 6200
|
|
Text GLabel 3000 6400 2 50 Input ~ 0
|
|
TEENSY_RESET
|
|
Wire Wire Line
|
|
3000 6300 2900 6300
|
|
Text GLabel 3000 6300 2 50 Input ~ 0
|
|
TEENSY_WAIT
|
|
Wire Wire Line
|
|
3000 6400 2900 6400
|
|
Wire Wire Line
|
|
2400 7350 1800 7350
|
|
Wire Wire Line
|
|
1800 7350 1800 7000
|
|
Wire Wire Line
|
|
1800 7000 1900 7000
|
|
Connection ~ 2400 7350
|
|
Wire Wire Line
|
|
2400 7350 2400 7300
|
|
Text GLabel 1750 6100 0 50 Input ~ 0
|
|
CPU_INTR
|
|
Text GLabel 1750 6000 0 50 Input ~ 0
|
|
CPU_NMI
|
|
Text GLabel 1750 6400 0 50 Input ~ 0
|
|
CPU_RESET
|
|
Text GLabel 1750 6200 0 50 Input ~ 0
|
|
CPU_CLK
|
|
$Comp
|
|
L power:+3.3V #PWR01
|
|
U 1 1 61CC9A6D
|
|
P 1700 6900
|
|
F 0 "#PWR01" H 1700 6750 50 0001 C CNN
|
|
F 1 "+3.3V" V 1700 7150 50 0000 C CNN
|
|
F 2 "" H 1700 6900 50 0001 C CNN
|
|
F 3 "" H 1700 6900 50 0001 C CNN
|
|
1 1700 6900
|
|
0 -1 -1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
1700 6900 1900 6900
|
|
Wire Wire Line
|
|
1900 6000 1750 6000
|
|
Wire Wire Line
|
|
1900 6200 1750 6200
|
|
Wire Wire Line
|
|
1900 6300 1750 6300
|
|
Wire Wire Line
|
|
1750 6100 1900 6100
|
|
Text GLabel 5900 6450 2 50 Input ~ 0
|
|
TEENSY_AD2_IN
|
|
Text GLabel 5900 6350 2 50 Input ~ 0
|
|
TEENSY_AD3_IN
|
|
Text GLabel 5900 6250 2 50 Input ~ 0
|
|
TEENSY_AD4_IN
|
|
Text GLabel 5900 6650 2 50 Input ~ 0
|
|
TEENSY_AD0_IN
|
|
Text GLabel 5900 6550 2 50 Input ~ 0
|
|
TEENSY_AD1_IN
|
|
Wire Wire Line
|
|
1900 6400 1750 6400
|
|
Text GLabel 1750 6300 0 50 Input ~ 0
|
|
CPU_WAIT
|
|
NoConn ~ 3950 3200
|
|
NoConn ~ 3950 3700
|
|
NoConn ~ 1550 2000
|
|
NoConn ~ 1550 2100
|
|
NoConn ~ 2900 6500
|
|
NoConn ~ 2900 6600
|
|
NoConn ~ 2900 6700
|
|
Wire Wire Line
|
|
3850 1900 4000 1900
|
|
$Comp
|
|
L power:+5V #PWR06
|
|
U 1 1 61CF31EE
|
|
P 4000 1900
|
|
F 0 "#PWR06" H 4000 1750 50 0001 C CNN
|
|
F 1 "+5V" V 4000 2100 50 0000 C CNN
|
|
F 2 "" H 4000 1900 50 0001 C CNN
|
|
F 3 "" H 4000 1900 50 0001 C CNN
|
|
1 4000 1900
|
|
0 1 1 0
|
|
$EndComp
|
|
$Comp
|
|
L power:GND #PWR0101
|
|
U 1 1 62113383
|
|
P 1800 6700
|
|
F 0 "#PWR0101" H 1800 6450 50 0001 C CNN
|
|
F 1 "GND" V 1800 6500 50 0000 C CNN
|
|
F 2 "" H 1800 6700 50 0001 C CNN
|
|
F 3 "" H 1800 6700 50 0001 C CNN
|
|
1 1800 6700
|
|
0 1 1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
1800 6700 1850 6700
|
|
Wire Wire Line
|
|
1850 6700 1850 6600
|
|
Wire Wire Line
|
|
1850 6600 1900 6600
|
|
Connection ~ 1850 6700
|
|
Wire Wire Line
|
|
1850 6700 1900 6700
|
|
Wire Wire Line
|
|
1900 6500 1850 6500
|
|
Wire Wire Line
|
|
1850 6500 1850 6600
|
|
Connection ~ 1850 6600
|
|
Text Notes 7250 7050 0 157 ~ 0
|
|
MicroCore Labs\nMCLZ8
|
|
$Comp
|
|
L power:+3.3V #PWR0102
|
|
U 1 1 6229E980
|
|
P 4600 6850
|
|
F 0 "#PWR0102" H 4600 6700 50 0001 C CNN
|
|
F 1 "+3.3V" V 4600 7100 50 0000 C CNN
|
|
F 2 "" H 4600 6850 50 0001 C CNN
|
|
F 3 "" H 4600 6850 50 0001 C CNN
|
|
1 4600 6850
|
|
0 -1 -1 0
|
|
$EndComp
|
|
Wire Wire Line
|
|
4600 6850 4800 6850
|
|
Wire Wire Line
|
|
9550 5100 9550 5250
|
|
$Comp
|
|
L CPU:Z80CPU U6
|
|
U 1 1 622909D1
|
|
P 9550 3600
|
|
F 0 "U6" H 9156 5281 50 0000 C CNN
|
|
F 1 "Z80CPU" H 9077 5190 50 0000 C CNN
|
|
F 2 "Package_DIP:DIP-40_W15.24mm" H 9550 4000 50 0001 C CNN
|
|
F 3 "www.zilog.com/manage_directlink.php?filepath=docs/z80/um0080" H 9550 4000 50 0001 C CNN
|
|
1 9550 3600
|
|
1 0 0 -1
|
|
$EndComp
|
|
Text GLabel 10350 4100 2 50 Input ~ 0
|
|
CPU_AD0
|
|
Text GLabel 10350 4200 2 50 Input ~ 0
|
|
CPU_AD1
|
|
Text GLabel 10350 4300 2 50 Input ~ 0
|
|
CPU_AD2
|
|
Text GLabel 10350 4400 2 50 Input ~ 0
|
|
CPU_AD3
|
|
Text GLabel 10350 4500 2 50 Input ~ 0
|
|
CPU_AD4
|
|
Text GLabel 10350 4600 2 50 Input ~ 0
|
|
CPU_AD5
|
|
Text GLabel 10350 4700 2 50 Input ~ 0
|
|
CPU_AD6
|
|
Text GLabel 10350 4800 2 50 Input ~ 0
|
|
CPU_AD7
|
|
Wire Wire Line
|
|
10350 4800 10250 4800
|
|
Wire Wire Line
|
|
10350 4700 10250 4700
|
|
Wire Wire Line
|
|
10350 4600 10250 4600
|
|
Wire Wire Line
|
|
10350 4500 10250 4500
|
|
Wire Wire Line
|
|
10350 4400 10250 4400
|
|
Wire Wire Line
|
|
10350 4300 10250 4300
|
|
Wire Wire Line
|
|
10350 4200 10250 4200
|
|
Wire Wire Line
|
|
10350 4100 10250 4100
|
|
Wire Wire Line
|
|
8850 2700 8750 2700
|
|
Wire Wire Line
|
|
8850 3600 8750 3600
|
|
Wire Wire Line
|
|
8850 2400 8750 2400
|
|
Wire Wire Line
|
|
8850 3000 8750 3000
|
|
Wire Wire Line
|
|
8850 3100 8750 3100
|
|
Wire Wire Line
|
|
1450 3100 1650 3100
|
|
Wire Wire Line
|
|
1450 3800 1650 3800
|
|
Wire Wire Line
|
|
1450 3900 1650 3900
|
|
Wire Wire Line
|
|
1450 3700 1650 3700
|
|
Wire Wire Line
|
|
1450 3600 1650 3600
|
|
Wire Wire Line
|
|
1450 3500 1650 3500
|
|
Wire Wire Line
|
|
1450 3400 1650 3400
|
|
Wire Wire Line
|
|
5900 1250 6000 1250
|
|
Wire Wire Line
|
|
5900 1350 6000 1350
|
|
Wire Wire Line
|
|
5900 1450 6000 1450
|
|
Wire Wire Line
|
|
5900 1550 6000 1550
|
|
Wire Wire Line
|
|
5900 1650 6000 1650
|
|
Wire Wire Line
|
|
5900 1750 6000 1750
|
|
Wire Wire Line
|
|
5900 1850 6000 1850
|
|
Wire Wire Line
|
|
5900 1950 6000 1950
|
|
$Comp
|
|
L power:GND #PWR0103
|
|
U 1 1 622D405C
|
|
P 6500 2650
|
|
F 0 "#PWR0103" H 6500 2400 50 0001 C CNN
|
|
F 1 "GND" H 6505 2477 50 0000 C CNN
|
|
F 2 "" H 6500 2650 50 0001 C CNN
|
|
F 3 "" H 6500 2650 50 0001 C CNN
|
|
1 6500 2650
|
|
1 0 0 -1
|
|
$EndComp
|
|
$Comp
|
|
L power:+3.3V #PWR0104
|
|
U 1 1 622D4062
|
|
P 6500 850
|
|
F 0 "#PWR0104" H 6500 700 50 0001 C CNN
|
|
F 1 "+3.3V" H 6515 1023 50 0000 C CNN
|
|
F 2 "" H 6500 850 50 0001 C CNN
|
|
F 3 "" H 6500 850 50 0001 C CNN
|
|
1 6500 850
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
6500 950 6500 850
|
|
Wire Wire Line
|
|
5900 2150 6000 2150
|
|
Text GLabel 7100 1250 2 50 Input ~ 0
|
|
CPU_A0
|
|
Text GLabel 7100 1350 2 50 Input ~ 0
|
|
CPU_A1
|
|
Text GLabel 7100 1450 2 50 Input ~ 0
|
|
CPU_A2
|
|
Text GLabel 7100 1550 2 50 Input ~ 0
|
|
CPU_A3
|
|
Text GLabel 7100 1650 2 50 Input ~ 0
|
|
CPU_A4
|
|
Text GLabel 7100 1750 2 50 Input ~ 0
|
|
CPU_A5
|
|
Text GLabel 7100 1850 2 50 Input ~ 0
|
|
CPU_A6
|
|
Text GLabel 7100 1950 2 50 Input ~ 0
|
|
CPU_A7
|
|
Wire Wire Line
|
|
7100 1950 7000 1950
|
|
Wire Wire Line
|
|
7100 1850 7000 1850
|
|
Wire Wire Line
|
|
7100 1750 7000 1750
|
|
Wire Wire Line
|
|
7100 1650 7000 1650
|
|
Wire Wire Line
|
|
7100 1550 7000 1550
|
|
Wire Wire Line
|
|
7100 1450 7000 1450
|
|
Wire Wire Line
|
|
7100 1350 7000 1350
|
|
Wire Wire Line
|
|
7100 1250 7000 1250
|
|
Text GLabel 5900 1250 0 50 Input ~ 0
|
|
TEENSY_AD0_OUT
|
|
Text GLabel 5900 1350 0 50 Input ~ 0
|
|
TEENSY_AD1_OUT
|
|
Text GLabel 5900 1450 0 50 Input ~ 0
|
|
TEENSY_AD2_OUT
|
|
Text GLabel 5900 1550 0 50 Input ~ 0
|
|
TEENSY_AD3_OUT
|
|
Text GLabel 5900 1650 0 50 Input ~ 0
|
|
TEENSY_AD4_OUT
|
|
Text GLabel 5900 1750 0 50 Input ~ 0
|
|
TEENSY_AD5_OUT
|
|
Text GLabel 5900 1850 0 50 Input ~ 0
|
|
TEENSY_AD6_OUT
|
|
Text GLabel 5900 1950 0 50 Input ~ 0
|
|
TEENSY_AD7_OUT
|
|
Wire Wire Line
|
|
6500 2550 6500 2600
|
|
$Comp
|
|
L 74xx:74LS573 U7
|
|
U 1 1 622D408B
|
|
P 6500 1750
|
|
F 0 "U7" H 6100 2500 50 0000 C CNN
|
|
F 1 "SN74LVC573A" H 6100 2400 50 0000 C CNN
|
|
F 2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" H 6500 1750 50 0001 C CNN
|
|
F 3 "74xx/74hc573.pdf" H 6500 1750 50 0001 C CNN
|
|
1 6500 1750
|
|
1 0 0 -1
|
|
$EndComp
|
|
Wire Wire Line
|
|
5900 2250 6000 2250
|
|
Text GLabel 5900 2150 0 50 Input ~ 0
|
|
TEENSY_ADDR_LATCH_n
|
|
Wire Wire Line
|
|
6500 2600 5900 2600
|
|
Wire Wire Line
|
|
5900 2600 5900 2250
|
|
Connection ~ 6500 2600
|
|
Wire Wire Line
|
|
6500 2600 6500 2650
|
|
Text GLabel 1450 3100 0 50 Input ~ 0
|
|
TEENSY_ADDR_LATCH_n
|
|
Text GLabel 8750 3400 0 50 Input ~ 0
|
|
CPU_M1
|
|
Wire Wire Line
|
|
8850 3400 8750 3400
|
|
Text GLabel 1450 3200 0 50 Input ~ 0
|
|
CPU_M1
|
|
Wire Wire Line
|
|
1450 3200 1650 3200
|
|
Text GLabel 8750 3700 0 50 Input ~ 0
|
|
CPU_HALT
|
|
Wire Wire Line
|
|
8850 3700 8750 3700
|
|
Text GLabel 1450 3400 0 50 Input ~ 0
|
|
CPU_HALT
|
|
Text GLabel 8750 4100 0 50 Input ~ 0
|
|
CPU_RD
|
|
Wire Wire Line
|
|
8850 4100 8750 4100
|
|
Text GLabel 8750 4200 0 50 Input ~ 0
|
|
CPU_WR
|
|
Wire Wire Line
|
|
8850 4200 8750 4200
|
|
Text GLabel 8750 4300 0 50 Input ~ 0
|
|
CPU_MREQ
|
|
Wire Wire Line
|
|
8850 4300 8750 4300
|
|
Text GLabel 8750 4400 0 50 Input ~ 0
|
|
CPU_IOREQ
|
|
Wire Wire Line
|
|
8850 4400 8750 4400
|
|
Text GLabel 1450 3500 0 50 Input ~ 0
|
|
CPU_RD
|
|
Text GLabel 1450 3600 0 50 Input ~ 0
|
|
CPU_WR
|
|
Text GLabel 1450 3700 0 50 Input ~ 0
|
|
CPU_MREQ
|
|
Text GLabel 1450 3800 0 50 Input ~ 0
|
|
CPU_IOREQ
|
|
Text GLabel 1450 3900 0 50 Input ~ 0
|
|
CPU_REFRESH
|
|
Text GLabel 8750 3500 0 50 Input ~ 0
|
|
CPU_REFRESH
|
|
Wire Wire Line
|
|
8850 3500 8750 3500
|
|
$EndSCHEMATC
|