diff --git a/SConscript.boardloader b/SConscript.boardloader
index 02e76363..4121b49f 100644
--- a/SConscript.boardloader
+++ b/SConscript.boardloader
@@ -71,6 +71,7 @@ SOURCE_STMHAL = [
 
 SOURCE_BOARDLOADER = [
     'embed/boardloader/startup.s',
+    'embed/boardloader/lowlevel.c',
     'embed/boardloader/main.c',
 ]
 
diff --git a/embed/boardloader/lowlevel.c b/embed/boardloader/lowlevel.c
new file mode 100644
index 00000000..20b17c5d
--- /dev/null
+++ b/embed/boardloader/lowlevel.c
@@ -0,0 +1,53 @@
+#include <stdint.h>
+
+#include "common.h"
+#include "rng.h"
+
+#include STM32_HAL_H
+
+// reference RM0090 section 35.12.1 Figure 413
+#define USB_OTG_HS_DATA_FIFO_RAM  (USB_OTG_HS_PERIPH_BASE + 0x20000U)
+#define USB_OTG_HS_DATA_FIFO_SIZE (4096U)
+
+void clear_otg_hs_memory(void)
+{
+    RCC->AHB1ENR |= RCC_AHB1ENR_OTGHSEN; // enable USB_OTG_HS peripheral clock so that the peripheral memory is accessible
+    const uint32_t unpredictable = rng_get();
+    memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), unpredictable);
+    memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), 0);
+    RCC->AHB1ENR &= ~RCC_AHB1ENR_OTGHSEN; // disable USB OTG_HS peripheral clock as the peripheral is not needed right now
+}
+
+#define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
+#define WANTED_RDP (OB_RDP_LEVEL_2)
+#define WANTED_BOR (OB_BOR_LEVEL3)
+
+void flash_set_option_bytes(void)
+{
+    FLASH_OBProgramInitTypeDef opts;
+
+    HAL_FLASHEx_OBGetConfig(&opts);
+
+    opts.OptionType = 0;
+
+    if (opts.WRPSector != WANTED_WRP) {
+        opts.OptionType = OPTIONBYTE_WRP;
+        opts.WRPState = OB_WRPSTATE_ENABLE;
+        opts.WRPSector = WANTED_WRP;
+        opts.Banks = FLASH_BANK_1;
+    }
+
+    if (opts.RDPLevel != WANTED_RDP) {
+        opts.OptionType = OPTIONBYTE_RDP;
+        opts.RDPLevel = WANTED_RDP;
+    }
+
+    if (opts.BORLevel != WANTED_BOR) {
+        opts.OptionType = OPTIONBYTE_BOR;
+        opts.BORLevel = WANTED_BOR;
+    }
+
+    if (opts.OptionType != 0) {
+        HAL_FLASHEx_OBProgram(&opts);
+    }
+}
diff --git a/embed/boardloader/lowlevel.h b/embed/boardloader/lowlevel.h
new file mode 100644
index 00000000..977a7af3
--- /dev/null
+++ b/embed/boardloader/lowlevel.h
@@ -0,0 +1,8 @@
+#ifndef __BOARDLOADER_LOWLEVEL_H__
+#define __BOARDLOADER_LOWLEVEL_H__
+
+void clear_otg_hs_memory(void);
+
+void flash_set_option_bytes(void);
+
+#endif
diff --git a/embed/boardloader/main.c b/embed/boardloader/main.c
index 2610b227..053ba9cb 100644
--- a/embed/boardloader/main.c
+++ b/embed/boardloader/main.c
@@ -6,26 +6,13 @@
 #include "flash.h"
 #include "rng.h"
 #include "sdcard.h"
+
+#include "lowlevel.h"
 #include "version.h"
 
 #define IMAGE_MAGIC   0x425A5254 // TRZB
 #define IMAGE_MAXSIZE (1 * 64 * 1024 + 7 * 128 * 1024)
 
-#include STM32_HAL_H
-
-// reference RM0090 section 35.12.1 Figure 413
-#define USB_OTG_HS_DATA_FIFO_RAM  (USB_OTG_HS_PERIPH_BASE + 0x20000U)
-#define USB_OTG_HS_DATA_FIFO_SIZE (4096U)
-
-void clear_otg_hs_memory(void)
-{
-    RCC->AHB1ENR |= RCC_AHB1ENR_OTGHSEN; // enable USB_OTG_HS peripheral clock so that the peripheral memory is accessible
-    const uint32_t unpredictable = rng_get();
-    memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), unpredictable);
-    memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), 0);
-    RCC->AHB1ENR &= ~RCC_AHB1ENR_OTGHSEN; // disable USB OTG_HS peripheral clock as the peripheral is not needed right now
-}
-
 bool check_sdcard(void)
 {
     if (!sdcard_is_present()) {
diff --git a/embed/trezorhal/flash.c b/embed/trezorhal/flash.c
index 82173f46..ea9560b3 100644
--- a/embed/trezorhal/flash.c
+++ b/embed/trezorhal/flash.c
@@ -8,40 +8,6 @@ int flash_init(void)
     return 0;
 }
 
-#define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1)
-#define WANTED_RDP (OB_RDP_LEVEL_2)
-#define WANTED_BOR (OB_BOR_LEVEL3)
-
-void flash_set_option_bytes(void)
-{
-    FLASH_OBProgramInitTypeDef opts;
-
-    HAL_FLASHEx_OBGetConfig(&opts);
-
-    opts.OptionType = 0;
-
-    if (opts.WRPSector != WANTED_WRP) {
-        opts.OptionType = OPTIONBYTE_WRP;
-        opts.WRPState = OB_WRPSTATE_ENABLE;
-        opts.WRPSector = WANTED_WRP;
-        opts.Banks = FLASH_BANK_1;
-    }
-
-    if (opts.RDPLevel != WANTED_RDP) {
-        opts.OptionType = OPTIONBYTE_RDP;
-        opts.RDPLevel = WANTED_RDP;
-    }
-
-    if (opts.BORLevel != WANTED_BOR) {
-        opts.OptionType = OPTIONBYTE_BOR;
-        opts.BORLevel = WANTED_BOR;
-    }
-
-    if (opts.OptionType != 0) {
-        HAL_FLASHEx_OBProgram(&opts);
-    }
-}
-
 bool flash_unlock(void)
 {
     HAL_FLASH_Unlock();
diff --git a/embed/trezorhal/flash.h b/embed/trezorhal/flash.h
index c589d12d..085368cc 100644
--- a/embed/trezorhal/flash.h
+++ b/embed/trezorhal/flash.h
@@ -5,15 +5,12 @@
 #include <stdint.h>
 
 #define FLASH_SECTOR_BOARDLOADER_START 0
-#define FLASH_SECTOR_BOARDLOADER_END   1
+#define FLASH_SECTOR_BOARDLOADER_END   2
 
-#define FLASH_SECTOR_STORAGE_START     2
-#define FLASH_SECTOR_STORAGE_END       3
+#define FLASH_SECTOR_BOOTLOADER_START  5
+#define FLASH_SECTOR_BOOTLOADER_END    5
 
-#define FLASH_SECTOR_BOOTLOADER_START  4
-#define FLASH_SECTOR_BOOTLOADER_END    4
-
-#define FLASH_SECTOR_FIRMWARE_START    5
+#define FLASH_SECTOR_FIRMWARE_START    6
 #define FLASH_SECTOR_FIRMWARE_END      11
 
 int flash_init(void);