SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold

This commit is contained in:
Xavier Arteaga 2020-03-09 15:09:28 +01:00 committed by Xavier Arteaga
parent 385cc8ecd8
commit 002a68e183
4 changed files with 5 additions and 2 deletions

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@ -56,6 +56,7 @@
#define SRSLTE_PUCCH_DEFAULT_THRESHOLD_FORMAT1 (0.2f)
#define SRSLTE_PUCCH_DEFAULT_THRESHOLD_FORMAT1A (0.2f)
#define SRSLTE_PUCCH_DEFAULT_THRESHOLD_FORMAT2 (0.2f)
#define SRSLTE_PUCCH_DEFAULT_THRESHOLD_DMRS (0.2f)
typedef struct {
srslte_sequence_t seq_f2[SRSLTE_NOF_SF_X_FRAME];

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@ -75,6 +75,7 @@ typedef struct SRSLTE_API {
float threshold_format1;
float threshold_data_valid_format1a;
float threshold_data_valid_format2;
float threshold_dmrs_detection;
// PUCCH configuration generated during a call to encode/decode
srslte_pucch_format_t format;

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@ -918,8 +918,8 @@ int srslte_pucch_decode(srslte_pucch_t* q,
float _pow = srslte_vec_avg_power_cf(q->ce, nof_re);
float _r = _rms / _pow;
// Return not detected if the ratio is 0, NAN, +/- Infinity or below 0.1
if (!isnormal(_r) || _r < 0.1f) {
// Return not detected if the ratio is 0, NAN, +/- Infinity or below threshold
if (!isnormal(_r) || _r < cfg->threshold_dmrs_detection) {
data->detected = false;
data->correlation = NAN;
return SRSLTE_SUCCESS;

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@ -106,6 +106,7 @@ inline void phy_ue_db::_set_common_config_rnti(uint16_t rnti)
scell_info.phy_cfg.ul_cfg.pucch.threshold_format1 = SRSLTE_PUCCH_DEFAULT_THRESHOLD_FORMAT1;
scell_info.phy_cfg.ul_cfg.pucch.threshold_data_valid_format1a = SRSLTE_PUCCH_DEFAULT_THRESHOLD_FORMAT1A;
scell_info.phy_cfg.ul_cfg.pucch.threshold_data_valid_format2 = SRSLTE_PUCCH_DEFAULT_THRESHOLD_FORMAT2;
scell_info.phy_cfg.ul_cfg.pucch.threshold_dmrs_detection = SRSLTE_PUCCH_DEFAULT_THRESHOLD_DMRS;
}
}