mirror of https://github.com/PentHertz/srsLTE.git
nr,gnb,rrc: fix ssb frequency derivation when coreset0 is active
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@ -704,6 +704,16 @@ SRSRAN_API int srsran_coreset_zero(uint32_t n_cell_id,
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uint32_t idx,
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srsran_coreset_t* coreset);
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/**
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* @brief Obtain offset in RBs between CoresetZero and SSB. See TS 38.213, Tables 13-{1,...,10}
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* @param idx Index of 13-{1,...10} table
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* @param ssb_scs SS/PBCH block subcarrier spacing
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* @param pdcch_scs PDCCH subcarrier spacing
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* @return offset in RBs, or -1 in case of invalid inputs
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*/
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SRSRAN_API int
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srsran_coreset0_ssb_offset(uint32_t idx, srsran_subcarrier_spacing_t ssb_scs, srsran_subcarrier_spacing_t pdcch_scs);
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/**
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* @brief Convert SSB pattern to string
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* @param pattern
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@ -163,7 +163,7 @@ uint32_t srsran_band_helper::get_abs_freq_ssb_arfcn(uint16_t
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double freq_point_a_hz = nr_arfcn_to_freq(freq_point_a_arfcn);
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double ssb_bw_hz = SRSRAN_SSB_BW_SUBC * SRSRAN_SUBC_SPACING_NR(scs);
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double coreset0_offset_hz = coreset0_offset_rb * SRSRAN_NRE * SRSRAN_SUBC_SPACING_NR(scs);
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return find_lower_bound_abs_freq_ssb(band, scs, freq_point_a_hz + coreset0_offset_hz / 2 + ssb_bw_hz / 2);
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return find_lower_bound_abs_freq_ssb(band, scs, freq_point_a_hz + coreset0_offset_hz + ssb_bw_hz / 2);
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}
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srsran_ssb_patern_t srsran_band_helper::get_ssb_pattern(uint16_t band, srsran_subcarrier_spacing_t scs) const
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@ -51,7 +51,7 @@ int bands_test_nr()
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TESTASSERT(bands.nr_arfcn_to_freq(376000) == 1880.0e6);
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TESTASSERT(bands.get_abs_freq_point_a_arfcn(52, 368500) == 367564);
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TESTASSERT(bands.get_abs_freq_ssb_arfcn(3, srsran_subcarrier_spacing_15kHz, 367564) > 367924);
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TESTASSERT_EQ(368410, bands.get_abs_freq_ssb_arfcn(3, srsran_subcarrier_spacing_15kHz, 367564, 16));
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TESTASSERT_EQ(368410, bands.get_abs_freq_ssb_arfcn(3, srsran_subcarrier_spacing_15kHz, 367564, 12));
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// n5
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TESTASSERT(bands.get_duplex_mode(5) == SRSRAN_DUPLEX_MODE_FDD);
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TESTASSERT(bands.nr_arfcn_to_freq(176300) == 881.5e6);
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@ -682,6 +682,48 @@ int srsran_coreset_zero(uint32_t n_cell_id,
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return SRSRAN_SUCCESS;
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}
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int srsran_coreset0_ssb_offset(uint32_t idx, srsran_subcarrier_spacing_t ssb_scs, srsran_subcarrier_spacing_t pdcch_scs)
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{
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// Verify inputs
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if (idx >= 16) {
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ERROR("Invalid CORESET Zero input. idx=%d", idx);
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return SRSRAN_ERROR_INVALID_INPUTS;
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}
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// Default entry to NULL
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const coreset_zero_entry_t* entry = NULL;
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// Table 13-1: Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set
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// when {SS/PBCH block, PDCCH} SCS is {15, 15} kHz for frequency bands with minimum channel
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// bandwidth 5 MHz or 10 MHz
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if (ssb_scs == srsran_subcarrier_spacing_15kHz && pdcch_scs == srsran_subcarrier_spacing_15kHz) {
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entry = &coreset_zero_15_15[idx];
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}
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// Table 13-2: Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set
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// when {SS/PBCH block, PDCCH} SCS is {15, 30} kHz for frequency bands with minimum channel
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// bandwidth 5 MHz or 10 MHz
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if (ssb_scs == srsran_subcarrier_spacing_15kHz && pdcch_scs == srsran_subcarrier_spacing_30kHz) {
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entry = &coreset_zero_15_30[idx];
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}
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// Table 13-3: Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set
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// when {SS/PBCH block, PDCCH} SCS is {30, 15} kHz for frequency bands with minimum channel
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// bandwidth 5 MHz or 10 MHz
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if (ssb_scs == srsran_subcarrier_spacing_30kHz && pdcch_scs == srsran_subcarrier_spacing_15kHz) {
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entry = &coreset_zero_30_15[idx];
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}
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// Check a valid entry has been selected
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if (entry == NULL) {
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ERROR("Unhandled case ssb_scs=%s, pdcch_scs=%s",
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srsran_subcarrier_spacing_to_str(ssb_scs),
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srsran_subcarrier_spacing_to_str(pdcch_scs));
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return SRSRAN_ERROR;
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}
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return entry->offset_rb;
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}
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const char* srsran_ssb_pattern_to_str(srsran_ssb_patern_t pattern)
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{
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switch (pattern) {
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@ -1643,23 +1643,20 @@ int set_derived_args_nr(all_args_t* args_, rrc_nr_cfg_t* rrc_nr_cfg_, phy_cfg_t*
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}
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// fill remaining SSB fields
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uint32_t coreset0_rb_offset = 0;
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int coreset0_rb_offset = 0;
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if (rrc_nr_cfg_->is_standalone) {
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// Taken from TS 38.213, Table 13-1
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if (cfg.phy_cell.carrier.nof_prb > 96) {
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coreset0_rb_offset = 96;
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} else if (cfg.phy_cell.carrier.nof_prb > 48) {
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coreset0_rb_offset = 16;
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} else {
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coreset0_rb_offset = 4;
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}
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const uint32_t coreset0_idx = 6; // See TS 38.331 - controlResourceSetZero / Table 13-1 index
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cfg.phy_cell.pdcch.coreset_present[0] = true;
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// Get offset in RBs between CORESET#0 and SSB
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coreset0_rb_offset = srsran_coreset0_ssb_offset(coreset0_idx, cfg.ssb_cfg.scs, cfg.phy_cell.carrier.scs);
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srsran_assert(coreset0_rb_offset >= 0, "Failed to compute RB offset between CORESET#0 and SSB");
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}
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cfg.ssb_absolute_freq_point =
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band_helper.get_abs_freq_ssb_arfcn(cfg.band, cfg.ssb_cfg.scs, cfg.dl_absolute_freq_point_a, coreset0_rb_offset);
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if (cfg.ssb_absolute_freq_point == 0) {
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ERROR("Can't derive SSB freq point for dl_arfcn %d and band %d", cfg.dl_arfcn, cfg.band);
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return SRSRAN_ERROR;
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}
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srsran_assert(cfg.ssb_absolute_freq_point > 0,
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"Can't derive SSB freq point for dl_arfcn %d and band %d",
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cfg.dl_arfcn,
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cfg.band);
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// Convert to frequency for PHY
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cfg.phy_cell.carrier.ssb_center_freq_hz = band_helper.nr_arfcn_to_freq(cfg.ssb_absolute_freq_point);
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@ -51,7 +51,7 @@ int rrc_nr::init(const rrc_nr_cfg_t& cfg_,
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cfg = cfg_;
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if (cfg.is_standalone) {
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// Generate parameters of Coreset#0 and SS#0
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const uint32_t coreset0_idx = 6;
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const uint32_t coreset0_idx = 6; // See TS 38.331 - controlResourceSetZero
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cfg.cell_list[0].phy_cell.pdcch.coreset_present[0] = true;
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// Get pointA and SSB absolute frequencies
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double pointA_abs_freq_Hz = cfg.cell_list[0].phy_cell.carrier.dl_center_frequency_hz -
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