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SRSUE: Added UE specific cell space

This commit is contained in:
Xavier Arteaga 2021-03-11 19:08:12 +01:00 committed by Xavier Arteaga
parent 10af89fcdd
commit 1153555ae1
1 changed files with 52 additions and 2 deletions
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54
lib/include/srslte/interfaces/rrc_nr_interface_types.h
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@ -97,8 +97,8 @@ struct phy_cfg_nr_t {
srslte_search_space_t search_space1 = {}; srslte_search_space_t search_space1 = {};
search_space1.id = 1; search_space1.id = 1;
search_space1.coreset_id = 1; search_space1.coreset_id = 1;
search_space1.nof_candidates[0] = 0; search_space1.nof_candidates[0] = 1;
search_space1.nof_candidates[1] = 0; search_space1.nof_candidates[1] = 1;
search_space1.nof_candidates[2] = 1; search_space1.nof_candidates[2] = 1;
search_space1.nof_candidates[3] = 0; search_space1.nof_candidates[3] = 0;
search_space1.nof_candidates[4] = 0; search_space1.nof_candidates[4] = 0;
@ -112,6 +112,56 @@ struct phy_cfg_nr_t {
pdcch.ra_search_space.type = srslte_search_space_type_common_1; pdcch.ra_search_space.type = srslte_search_space_type_common_1;
pdcch.ra_search_space_present = true; pdcch.ra_search_space_present = true;
// spCellConfigDedicated
// initialDownlinkBWP
// pdcch-Config: setup (1)
// setup
// controlResourceSetToAddModList: 1 item
// Item 0
// ControlResourceSet
// controlResourceSetId: 2
// frequencyDomainResources: ff0000000000 [bit length 45, 3 LSB pad bits, 1111 1111 0000
// 0000 0000 0000 0000 0000 0000 0000 0000 0... decimal value 35046933135360]
// duration: 1
// cce-REG-MappingType: nonInterleaved (1)
// nonInterleaved: NULL
// precoderGranularity: sameAsREG-bundle (0)
pdcch.coreset[2].id = 2;
pdcch.coreset[2].precoder_granularity = srslte_coreset_precoder_granularity_reg_bundle;
pdcch.coreset[2].duration = 1;
pdcch.coreset[2].mapping_type = srslte_coreset_mapping_type_non_interleaved;
for (uint32_t i = 0; i < SRSLTE_CORESET_FREQ_DOMAIN_RES_SIZE; i++) {
pdcch.coreset[2].freq_resources[i] = (i < 8);
}
pdcch.coreset_present[2] = true;
// searchSpacesToAddModList: 1 item
// Item 0
// SearchSpace
// searchSpaceId: 2
// controlResourceSetId: 2
// monitoringSlotPeriodicityAndOffset: sl1 (0)
// sl1: NULL
// monitoringSymbolsWithinSlot: 8000 [bit length 14, 2 LSB pad bits, 1000 0000 0000
// 00.. decimal value 8192] nrofCandidates
// aggregationLevel1: n0 (0)
// aggregationLevel2: n2 (2)
// aggregationLevel4: n1 (1)
// aggregationLevel8: n0 (0)
// aggregationLevel16: n0 (0)
// searchSpaceType: ue-Specific (1)
// ue-Specific
// dci-Formats: formats0-0-And-1-0 (0)
pdcch.search_space[2].id = 2;
pdcch.search_space[2].coreset_id = 2;
pdcch.search_space[2].nof_candidates[0] = 0;
pdcch.search_space[2].nof_candidates[1] = 2;
pdcch.search_space[2].nof_candidates[2] = 1;
pdcch.search_space[2].nof_candidates[3] = 0;
pdcch.search_space[2].nof_candidates[4] = 0;
pdcch.search_space[2].type = srslte_search_space_type_ue;
pdcch.search_space_present[2] = true;
// pdsch-ConfigCommon: setup (1) // pdsch-ConfigCommon: setup (1)
// setup // setup
// pdsch-TimeDomainAllocationList: 2 items // pdsch-TimeDomainAllocationList: 2 items