From 194670a2a3c7163a84c4980117bdf1eb35b8a8f0 Mon Sep 17 00:00:00 2001 From: Xavier Arteaga Date: Mon, 1 Feb 2021 18:33:58 +0100 Subject: [PATCH] NRPHY: hard-coded symbol phase correction --- lib/src/phy/ue/ue_dl_nr.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/lib/src/phy/ue/ue_dl_nr.c b/lib/src/phy/ue/ue_dl_nr.c index 3acbc1669..7a330faff 100644 --- a/lib/src/phy/ue/ue_dl_nr.c +++ b/lib/src/phy/ue/ue_dl_nr.c @@ -11,6 +11,7 @@ */ #include "srslte/phy/ue/ue_dl_nr.h" +#include #define UE_DL_NR_PDCCH_CORR_DEFAULT_THR 0.5f #define UE_DL_NR_PDCCH_EPRE_DEFAULT_THR -10.0f @@ -196,6 +197,17 @@ void srslte_ue_dl_nr_estimate_fft(srslte_ue_dl_nr_t* q, const srslte_dl_slot_cfg srslte_ofdm_rx_sf(&q->fft[i]); } + // Temporary symbol phase shift + uint32_t nof_re = SRSLTE_NRE * q->carrier.nof_prb; + for (uint32_t i = 0; i < 2; i++) { + for (uint32_t j = 0; j < 7; j++) { + srslte_vec_sc_prod_ccc(&q->sf_symbols[0][(i * 7 + j) * nof_re], + cexpf(-I * (11.0f * j - 2.0f) * M_PI / 16), + &q->sf_symbols[0][(i * 7 + j) * nof_re], + nof_re); + } + } + // Estimate PDCCH channel for every configured CORESET for (uint32_t i = 0; i < SRSLTE_UE_DL_NR_MAX_NOF_CORESET; i++) { if (q->cfg.coreset_present[i]) {