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sched,nr: fix sched nr pusch K2 timing

This commit is contained in:
Francisco Paisana 2021-07-21 16:47:48 +01:00
parent 61a73d5187
commit 4a2b51bc0d
5 changed files with 14 additions and 10 deletions
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5
srsenb/hdr/stack/mac/nr/sched_nr_cfg.h
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@ -47,12 +47,13 @@ struct bwp_params {
uint32_t P;
uint32_t N_rbg;
struct pusch_rach_time_cfg {
struct pusch_ra_time_cfg {
uint32_t msg3_delay; ///< Includes K2 and delta. See TS 36.214 6.1.2.1.1-2/4/5
uint32_t K;
uint32_t S;
uint32_t L;
};
std::vector<pusch_rach_time_cfg> pusch_rach_list;
std::vector<pusch_ra_time_cfg> pusch_ra_list;
bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, uint32_t cc, uint32_t bwp_id);
};

2
srsenb/src/stack/mac/nr/sched_nr_cell.cc
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@ -56,7 +56,7 @@ void ra_sched::run_slot(bwp_slot_allocator& slot_grid, slot_ue_map_t& slot_ues)
{
static const uint32_t PRACH_RAR_OFFSET = 3;
tti_point pdcch_tti = slot_grid.get_pdcch_tti();
tti_point msg3_tti = pdcch_tti + bwp_cfg->pusch_rach_list[0].msg3_delay;
tti_point msg3_tti = pdcch_tti + bwp_cfg->pusch_ra_list[0].msg3_delay;
if (not slot_grid.res_grid()[msg3_tti].is_ul) {
return;
}

13
srsenb/src/stack/mac/nr/sched_nr_cfg.cc
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@ -27,18 +27,21 @@ bwp_params::bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, ui
P = get_P(cfg.rb_width, cfg.pdsch.rbg_size_cfg_1);
N_rbg = get_nof_rbgs(cfg.rb_width, cfg.start_rb, cfg.pdsch.rbg_size_cfg_1);
pusch_rach_list.resize(cfg.pusch.nof_common_time_ra);
pusch_ra_list.resize(cfg.pusch.nof_common_time_ra);
const uint32_t coreset_id = 0;
srsran_sch_grant_nr_t grant;
for (uint32_t m = 0; m < cfg.pusch.nof_common_time_ra; ++m) {
int ret =
srsran_ra_ul_nr_time(&cfg.pusch, srsran_rnti_type_ra, srsran_search_space_type_rar, coreset_id, m, &grant);
srsran_assert(ret == SRSRAN_SUCCESS, "Failed to obtain RA config");
pusch_rach_list[m].msg3_delay = grant.k;
pusch_rach_list[m].S = grant.S;
pusch_rach_list[m].L = grant.L;
pusch_ra_list[m].msg3_delay = grant.k;
ret = srsran_ra_ul_nr_time(&cfg.pusch, srsran_rnti_type_c, srsran_search_space_type_ue, coreset_id, m, &grant);
pusch_ra_list[m].K = grant.k;
pusch_ra_list[m].S = grant.S;
pusch_ra_list[m].L = grant.L;
srsran_assert(ret == SRSRAN_SUCCESS, "Failed to obtain RA config");
}
srsran_assert(not pusch_rach_list.empty(), "Time-Domain Resource Allocation not valid");
srsran_assert(not pusch_ra_list.empty(), "Time-Domain Resource Allocation not valid");
}
sched_cell_params::sched_cell_params(uint32_t cc_, const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_) :

2
srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc
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@ -73,7 +73,7 @@ alloc_result bwp_slot_allocator::alloc_rar_and_msg3(uint32_t
static const uint32_t msg3_nof_prbs = 3, m = 0;
bwp_slot_grid& bwp_pdcch_slot = bwp_grid[pdcch_tti];
tti_point msg3_tti = pdcch_tti + cfg.pusch_rach_list[m].msg3_delay;
tti_point msg3_tti = pdcch_tti + cfg.pusch_ra_list[m].msg3_delay;
bwp_slot_grid& bwp_msg3_slot = bwp_grid[msg3_tti];
alloc_result ret = verify_pusch_space(bwp_msg3_slot, nullptr);
if (ret != alloc_result::success) {

2
srsenb/src/stack/mac/nr/sched_nr_ue.cc
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@ -49,7 +49,7 @@ slot_ue ue_carrier::try_reserve(tti_point pdcch_tti)
uint32_t k1 =
sfu.cfg->phy().harq_ack.dl_data_to_ul_ack[sfu.pdsch_tti.sf_idx() % sfu.cfg->phy().harq_ack.nof_dl_data_to_ul_ack];
sfu.uci_tti = sfu.pdsch_tti + k1;
uint32_t k2 = k1;
uint32_t k2 = bwp_cfg.active_bwp().pusch_ra_list[0].K;
sfu.pusch_tti = sfu.pdcch_tti + k2;
sfu.dl_cqi = dl_cqi;
sfu.ul_cqi = ul_cqi;