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srsLTE
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Minor NR PHY aesthetical modifications

This commit is contained in:
Xavier Arteaga 2021-08-02 13:02:25 +02:00
parent ce0cd230bb
commit 54e1fe172c
2 changed files with 10 additions and 3 deletions
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2
lib/include/srsran/phy/common/phy_common_nr.h
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@ -47,7 +47,7 @@ extern "C" {
/** /**
* @brief Defines the symbol duration, including cyclic prefix * @brief Defines the symbol duration, including cyclic prefix
*/ */
#define SRSRAN_SUBC_SPACING_NR(NUM) (15000U << (NUM)) #define SRSRAN_SUBC_SPACING_NR(NUM) (15000U << (uint32_t)(NUM))
/** /**
* @brief Defines the number of slots per SF. Defined by TS 38.211 v15.8.0 Table 4.3.2-1. * @brief Defines the number of slots per SF. Defined by TS 38.211 v15.8.0 Table 4.3.2-1.

11
lib/src/phy/phch/pdcch_nr.c
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@ -69,12 +69,19 @@ static int srsran_pdcch_nr_get_ncce(const srsran_coreset_t* coreset,
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }
// Calculate CORESET bandiwth in physical resource blocks
uint32_t coreset_bw = srsran_coreset_get_bw(coreset);
// Every REG is 1PRB wide and a CCE is 6 REG. So, the number of N_CCE is a sixth of the bandwidth times the number of // Every REG is 1PRB wide and a CCE is 6 REG. So, the number of N_CCE is a sixth of the bandwidth times the number of
// symbols // symbols
uint32_t N_cce = srsran_coreset_get_bw(coreset) * coreset->duration / 6; uint32_t N_cce = coreset_bw * coreset->duration / 6;
if (N_cce < L) { if (N_cce < L) {
ERROR("Error number of CCE %d is lower than the aggregation level %d", N_cce, L); ERROR("Error CORESET (total bandwidth of %d RBs and %d CCEs) cannot fit the aggregation level %d (%d)",
coreset_bw,
N_cce,
L,
aggregation_level);
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }