mirror of https://github.com/PentHertz/srsLTE.git
store mask results in separate variables for testing, and reset sf_sched state at the end of the tti
This commit is contained in:
Francisco Paisana
parent
afc209711c
commit
8f7890c60a
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@ -98,7 +98,6 @@ private:
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std::array<sched_sib_t, sched_interface::MAX_SIBS> pending_sibs;
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// TTI specific
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uint32_t current_sfn = 0, current_sf_idx = 0;
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uint32_t current_tti = 0;
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uint32_t bc_aggr_level = 2;
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};
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@ -69,6 +69,7 @@ public:
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void init(const sched_cell_params_t& cell_params_);
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void new_tti(const tti_params_t& tti_params_, uint32_t start_cfi);
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void reset();
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bool alloc_dci(alloc_type_t alloc_type, uint32_t aggr_idx, sched_ue* user = nullptr);
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bool set_cfi(uint32_t cfi);
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@ -84,7 +85,6 @@ private:
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const static uint32_t nof_cfis = 3;
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using tree_node_t = std::pair<int, alloc_t>; ///< First represents the parent node idx, and second the alloc tree node
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void reset();
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const sched_dci_cce_t* get_cce_loc_table(alloc_type_t alloc_type, sched_ue* user) const;
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void update_alloc_tree(int node_idx,
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uint32_t aggr_idx,
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@ -104,7 +104,7 @@ private:
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size_t nof_dci_allocs = 0;
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};
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//! manages a full TTI grid resources, namely CCE and DL/UL RB allocations
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//! manages a subframe grid resources, namely CCE and DL/UL RB allocations
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class sf_grid_t
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{
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public:
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@ -113,16 +113,17 @@ public:
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rbg_range_t rbg_range;
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};
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void init(const sched_cell_params_t& cell_params_, uint32_t enb_cc_idx_);
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void init(const sched_cell_params_t& cell_params_);
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void new_tti(const tti_params_t& tti_params_, uint32_t start_cfi);
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void reset();
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dl_ctrl_alloc_t alloc_dl_ctrl(uint32_t aggr_lvl, alloc_type_t alloc_type);
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alloc_outcome_t alloc_dl_data(sched_ue* user, const rbgmask_t& user_mask);
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bool reserve_dl_rbgs(uint32_t start_rbg, uint32_t end_rbg);
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alloc_outcome_t alloc_ul_data(sched_ue* user, ul_harq_proc::ul_alloc_t alloc, bool needs_pdcch);
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bool reserve_ul_prbs(const prbmask_t& prbmask, bool strict);
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// getters
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rbgmask_t& get_dl_mask() { return dl_mask; }
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const rbgmask_t& get_dl_mask() const { return dl_mask; }
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prbmask_t& get_ul_mask() { return ul_mask; }
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const prbmask_t& get_ul_mask() const { return ul_mask; }
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uint32_t get_cfi() const { return pdcch_alloc.get_cfi(); }
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const pdcch_grid_t& get_pdcch_grid() const { return pdcch_alloc; }
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@ -168,8 +169,8 @@ public:
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virtual bool is_ul_alloc(sched_ue* user) const = 0;
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};
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/** Description: Stores the RAR, broadcast, paging, DL data, UL data allocations for the given TTI
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* Converts the stored allocations' metadata to the scheduler UL/DL result
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/** Description: Stores the RAR, broadcast, paging, DL data, UL data allocations for the given subframe
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* Converts the stored allocations' metadata to the scheduler DL/UL result
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* Handles the generation of DCI formats
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*/
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class sf_sched : public dl_sf_sched_itf, public ul_sf_sched_itf
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@ -219,32 +220,36 @@ public:
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uint32_t mcs = 0;
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};
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struct pending_rar_t {
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uint16_t ra_rnti = 0;
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uint32_t prach_tti = 0;
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uint32_t nof_grants = 0;
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sched_interface::dl_sched_rar_info_t msg3_grant[sched_interface::MAX_RAR_LIST];
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uint16_t ra_rnti = 0;
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uint32_t prach_tti = 0;
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uint32_t nof_grants = 0;
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sched_interface::dl_sched_rar_info_t msg3_grant[sched_interface::MAX_RAR_LIST] = {};
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};
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typedef std::pair<alloc_outcome_t, const ctrl_alloc_t> ctrl_code_t;
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// TTI scheduler result
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pdcch_mask_t pdcch_mask;
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sched_interface::dl_sched_res_t dl_sched_result;
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sched_interface::ul_sched_res_t ul_sched_result;
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// Control/Configuration Methods
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void init(const sched_cell_params_t& cell_params_);
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void new_tti(uint32_t tti_rx_, uint32_t start_cfi);
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void reset();
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// DL alloc
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// DL alloc methods
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alloc_outcome_t alloc_bc(uint32_t aggr_lvl, uint32_t sib_idx, uint32_t sib_ntx);
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alloc_outcome_t alloc_paging(uint32_t aggr_lvl, uint32_t paging_payload);
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std::pair<alloc_outcome_t, uint32_t> alloc_rar(uint32_t aggr_lvl, const pending_rar_t& rar_grant);
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bool reserve_dl_rbgs(uint32_t rbg_start, uint32_t rbg_end) { return tti_alloc.reserve_dl_rbgs(rbg_start, rbg_end); }
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// UL alloc
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// UL alloc methods
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alloc_outcome_t alloc_msg3(const pending_msg3_t& msg3);
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alloc_outcome_t
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alloc_ul(sched_ue* user, ul_harq_proc::ul_alloc_t alloc, sf_sched::ul_alloc_t::type_t alloc_type, uint32_t mcs = 0);
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alloc_ul(sched_ue* user, ul_harq_proc::ul_alloc_t alloc, sf_sched::ul_alloc_t::type_t alloc_type, uint32_t mcs = 0);
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bool reserve_ul_prbs(const prbmask_t& ulmask, bool strict) { return tti_alloc.reserve_ul_prbs(ulmask, strict); }
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void generate_dcis();
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// compute DCIs and generate dl_sched_result/ul_sched_result for a given TTI
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void generate_sched_results();
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// dl_tti_sched itf
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alloc_outcome_t alloc_dl_user(sched_ue* user, const rbgmask_t& user_mask, uint32_t pid) final;
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@ -257,18 +262,13 @@ public:
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uint32_t get_tti_tx_ul() const final { return tti_params.tti_tx_ul; }
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// getters
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const pdcch_mask_t& get_pdcch_mask() const { return pdcch_mask; }
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rbgmask_t& get_dl_mask() { return tti_alloc.get_dl_mask(); }
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prbmask_t& get_ul_mask() { return tti_alloc.get_ul_mask(); }
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const std::vector<ul_alloc_t>& get_ul_allocs() const { return ul_data_allocs; }
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uint32_t get_cfi() const { return tti_alloc.get_cfi(); }
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uint32_t get_tti_rx() const { return tti_params.tti_rx; }
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uint32_t get_sfn() const { return tti_params.sfn; }
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uint32_t get_sf_idx() const { return tti_params.sf_idx; }
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const tti_params_t& get_tti_params() const { return tti_params; }
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std::deque<pending_msg3_t>& get_pending_msg3() { return pending_msg3s; }
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const std::deque<pending_msg3_t>& get_pending_msg3() const { return pending_msg3s; }
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const std::tuple<pdcch_mask_t, rbgmask_t, prbmask_t> last_sched_result_masks() const;
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private:
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bool is_dl_alloc(sched_ue* user) const final;
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bool is_ul_alloc(sched_ue* user) const final;
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@ -297,6 +297,11 @@ private:
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std::vector<ul_alloc_t> ul_data_allocs;
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std::deque<pending_msg3_t> pending_msg3s;
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uint32_t last_msg3_prb = 0, max_msg3_prb = 0;
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// Store last decisions
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rbgmask_t last_dl_mask;
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prbmask_t last_ul_mask;
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pdcch_mask_t last_pdcch_mask;
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};
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} // namespace srsenb
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@ -38,10 +38,8 @@ bc_sched::bc_sched(const sched_cell_params_t& cfg_, srsenb::rrc_interface_mac* r
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void bc_sched::dl_sched(sf_sched* tti_sched)
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{
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current_sf_idx = tti_sched->get_sf_idx();
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current_sfn = tti_sched->get_sfn();
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current_tti = tti_sched->get_tti_tx_dl();
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bc_aggr_level = 2;
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current_tti = tti_sched->get_tti_tx_dl();
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bc_aggr_level = 2;
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/* Activate/deactivate SI windows */
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update_si_windows(tti_sched);
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@ -56,7 +54,9 @@ void bc_sched::dl_sched(sf_sched* tti_sched)
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void bc_sched::update_si_windows(sf_sched* tti_sched)
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{
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uint32_t tti_tx_dl = tti_sched->get_tti_tx_dl();
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uint32_t tti_tx_dl = tti_sched->get_tti_tx_dl();
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uint32_t current_sf_idx = tti_sched->get_tti_params().sf_idx;
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uint32_t current_sfn = tti_sched->get_tti_params().sfn;
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for (uint32_t i = 0; i < pending_sibs.size(); ++i) {
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// There is SIB data
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@ -94,6 +94,9 @@ void bc_sched::update_si_windows(sf_sched* tti_sched)
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void bc_sched::alloc_sibs(sf_sched* tti_sched)
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{
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uint32_t current_sf_idx = tti_sched->get_tti_params().sf_idx;
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uint32_t current_sfn = tti_sched->get_tti_params().sfn;
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for (uint32_t i = 0; i < pending_sibs.size(); i++) {
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if (cc_cfg->cfg.sibs[i].len > 0 and pending_sibs[i].is_in_window and pending_sibs[i].n_tx < 4) {
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uint32_t nof_tx = (i > 0) ? SRSLTE_MIN(srslte::ceil_div(cc_cfg->cfg.si_window_ms, 10), 4) : 4;
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@ -371,7 +374,7 @@ sf_sched* sched::carrier_sched::generate_tti_result(uint32_t tti_rx)
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}
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/* Select the winner DCI allocation combination */
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tti_sched->generate_dcis();
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tti_sched->generate_sched_results();
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/* Enqueue Msg3s derived from allocated RARs */
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if (dl_active) {
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@ -430,7 +433,7 @@ void sched::carrier_sched::alloc_dl_users(sf_sched* tti_result)
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if (cc_cfg->nof_prb() == 6) {
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uint32_t tti_rx_ack = TTI_RX_ACK(tti_result->get_tti_rx());
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if (srslte_prach_tti_opportunity_config_fdd(cc_cfg->cfg.prach_config, tti_rx_ack, -1)) {
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tti_result->get_dl_mask().fill(0, tti_result->get_dl_mask().size());
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tti_result->reserve_dl_rbgs(0, cc_cfg->nof_rbgs);
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}
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}
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@ -440,12 +443,11 @@ void sched::carrier_sched::alloc_dl_users(sf_sched* tti_result)
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int sched::carrier_sched::alloc_ul_users(sf_sched* tti_sched)
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{
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uint32_t tti_tx_ul = tti_sched->get_tti_tx_ul();
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prbmask_t& ul_mask = tti_sched->get_ul_mask();
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uint32_t tti_tx_ul = tti_sched->get_tti_tx_ul();
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/* reserve PRBs for PRACH */
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if (srslte_prach_tti_opportunity_config_fdd(cc_cfg->cfg.prach_config, tti_tx_ul, -1)) {
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ul_mask = prach_mask;
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tti_sched->reserve_ul_prbs(prach_mask, false);
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log_h->debug("SCHED: Allocated PRACH RBs. Mask: 0x%s\n", prach_mask.to_hex().c_str());
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}
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@ -453,12 +455,7 @@ int sched::carrier_sched::alloc_ul_users(sf_sched* tti_sched)
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ra_sched_ptr->ul_sched(tti_sched);
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/* reserve PRBs for PUCCH */
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if (cc_cfg->nof_prb() != 6 and (ul_mask & pucch_mask).any()) {
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log_h->error("There was a collision with the PUCCH. current mask=0x%s, pucch_mask=0x%s\n",
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ul_mask.to_hex().c_str(),
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pucch_mask.to_hex().c_str());
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}
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ul_mask |= pucch_mask;
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tti_sched->reserve_ul_prbs(pucch_mask, true);
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/* Call scheduler for UL data */
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ul_metric->sched_users(*ue_db, tti_sched);
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@ -70,7 +70,6 @@ void pdcch_grid_t::new_tti(const tti_params_t& tti_params_, uint32_t start_cfi)
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{
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tti_params = &tti_params_;
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current_cfix = start_cfi - 1;
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reset();
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}
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const sched_dci_cce_t* pdcch_grid_t::get_cce_loc_table(alloc_type_t alloc_type, sched_ue* user) const
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@ -208,6 +207,7 @@ void pdcch_grid_t::get_allocs(alloc_result_t* vec, pdcch_mask_t* tot_mask, size_
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vec->clear();
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}
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if (tot_mask != nullptr) {
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tot_mask->resize(nof_cces());
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tot_mask->reset();
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}
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return;
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@ -265,7 +265,7 @@ std::string pdcch_grid_t::result_to_string(bool verbose) const
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* TTI resource Scheduling Methods
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*******************************************************/
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void sf_grid_t::init(const sched_cell_params_t& cell_params_, uint32_t enb_cc_idx_)
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void sf_grid_t::init(const sched_cell_params_t& cell_params_)
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{
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cc_cfg = &cell_params_;
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log_h = srslte::logmap::get("MAC ");
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@ -274,6 +274,7 @@ void sf_grid_t::init(const sched_cell_params_t& cell_params_, uint32_t enb_cc_id
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rar_n_rbg = srslte::ceil_div(3, cc_cfg->P);
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pdcch_alloc.init(*cc_cfg);
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reset();
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}
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void sf_grid_t::new_tti(const tti_params_t& tti_params_, uint32_t start_cfi)
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@ -282,13 +283,18 @@ void sf_grid_t::new_tti(const tti_params_t& tti_params_, uint32_t start_cfi)
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// internal state
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avail_rbg = nof_rbgs;
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dl_mask.reset();
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dl_mask.resize(nof_rbgs);
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ul_mask.reset();
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ul_mask.resize(cc_cfg->nof_prb());
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pdcch_alloc.new_tti(*tti_params, start_cfi);
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}
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void sf_grid_t::reset()
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{
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dl_mask.reset();
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ul_mask.reset();
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pdcch_alloc.reset();
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}
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//! Allocates CCEs and RBs for the given mask and allocation type (e.g. data, BC, RAR, paging)
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alloc_outcome_t sf_grid_t::alloc_dl(uint32_t aggr_lvl, alloc_type_t alloc_type, rbgmask_t alloc_mask, sched_ue* user)
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{
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@ -381,6 +387,25 @@ alloc_outcome_t sf_grid_t::alloc_ul_data(sched_ue* user, ul_harq_proc::ul_alloc_
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return alloc_outcome_t::SUCCESS;
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}
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bool sf_grid_t::reserve_dl_rbgs(uint32_t start_rbg, uint32_t end_rbg)
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{
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dl_mask.fill(start_rbg, end_rbg);
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return true;
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}
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bool sf_grid_t::reserve_ul_prbs(const prbmask_t& prbmask, bool strict)
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{
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bool ret = true;
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if (strict and (ul_mask & prbmask).any()) {
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log_h->error("There was a collision in UL channel. current mask=0x%s, new alloc mask=0x%s\n",
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ul_mask.to_hex().c_str(),
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prbmask.to_hex().c_str());
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ret = false;
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}
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ul_mask |= prbmask;
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return ret;
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}
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/*******************************************************
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* TTI resource Scheduling Methods
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*******************************************************/
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@ -389,8 +414,9 @@ void sf_sched::init(const sched_cell_params_t& cell_params_)
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{
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cc_cfg = &cell_params_;
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log_h = srslte::logmap::get("MAC ");
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tti_alloc.init(*cc_cfg, 0);
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tti_alloc.init(*cc_cfg);
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max_msg3_prb = std::max(6u, cc_cfg->cfg.cell.nof_prb - (uint32_t)cc_cfg->cfg.nrb_pucch);
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reset();
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}
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void sf_sched::new_tti(uint32_t tti_rx_, uint32_t start_cfi)
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@ -399,17 +425,9 @@ void sf_sched::new_tti(uint32_t tti_rx_, uint32_t start_cfi)
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tti_alloc.new_tti(tti_params, start_cfi);
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// reset sf result
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pdcch_mask.reset();
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pdcch_mask.resize(tti_alloc.get_pdcch_grid().nof_cces());
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dl_sched_result = {};
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ul_sched_result = {};
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// reset internal state
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bc_allocs.clear();
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rar_allocs.clear();
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data_allocs.clear();
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ul_data_allocs.clear();
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// setup first prb to be used for msg3 alloc
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last_msg3_prb = cc_cfg->cfg.nrb_pucch;
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uint32_t tti_msg3_alloc = TTI_ADD(tti_params.tti_tx_ul, MSG3_DELAY_MS);
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@ -418,6 +436,17 @@ void sf_sched::new_tti(uint32_t tti_rx_, uint32_t start_cfi)
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}
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}
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void sf_sched::reset()
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{
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// reset internal state
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bc_allocs.clear();
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rar_allocs.clear();
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data_allocs.clear();
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ul_data_allocs.clear();
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tti_alloc.reset();
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}
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bool sf_sched::is_dl_alloc(sched_ue* user) const
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{
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for (const auto& a : data_allocs) {
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@ -630,6 +659,11 @@ alloc_outcome_t sf_sched::alloc_ul_user(sched_ue* user, ul_harq_proc::ul_alloc_t
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return alloc_ul(user, alloc, alloc_type);
|
||||
}
|
||||
|
||||
const std::tuple<pdcch_mask_t, rbgmask_t, prbmask_t> sf_sched::last_sched_result_masks() const
|
||||
{
|
||||
return {last_pdcch_mask, last_dl_mask, last_ul_mask};
|
||||
}
|
||||
|
||||
void sf_sched::set_bc_sched_result(const pdcch_grid_t::alloc_result_t& dci_result)
|
||||
{
|
||||
for (const auto& bc_alloc : bc_allocs) {
|
||||
|
|
@ -769,13 +803,13 @@ void sf_sched::set_dl_data_sched_result(const pdcch_grid_t::alloc_result_t& dci_
|
|||
int tbs = 0;
|
||||
switch (dci_format) {
|
||||
case SRSLTE_DCI_FORMAT1:
|
||||
tbs = user->generate_format1(h, data, get_tti_tx_dl(), cell_index, get_cfi(), data_alloc.user_mask);
|
||||
tbs = user->generate_format1(h, data, get_tti_tx_dl(), cell_index, tti_alloc.get_cfi(), data_alloc.user_mask);
|
||||
break;
|
||||
case SRSLTE_DCI_FORMAT2:
|
||||
tbs = user->generate_format2(h, data, get_tti_tx_dl(), cell_index, get_cfi(), data_alloc.user_mask);
|
||||
tbs = user->generate_format2(h, data, get_tti_tx_dl(), cell_index, tti_alloc.get_cfi(), data_alloc.user_mask);
|
||||
break;
|
||||
case SRSLTE_DCI_FORMAT2A:
|
||||
tbs = user->generate_format2a(h, data, get_tti_tx_dl(), cell_index, get_cfi(), data_alloc.user_mask);
|
||||
tbs = user->generate_format2a(h, data, get_tti_tx_dl(), cell_index, tti_alloc.get_cfi(), data_alloc.user_mask);
|
||||
break;
|
||||
default:
|
||||
Error("DCI format (%d) not implemented\n", dci_format);
|
||||
|
|
@ -874,12 +908,12 @@ alloc_outcome_t sf_sched::alloc_msg3(const pending_msg3_t& msg3)
|
|||
return alloc_outcome_t::SUCCESS;
|
||||
}
|
||||
|
||||
void sf_sched::generate_dcis()
|
||||
void sf_sched::generate_sched_results()
|
||||
{
|
||||
/* Pick one of the possible DCI masks */
|
||||
pdcch_grid_t::alloc_result_t dci_result;
|
||||
// tti_alloc.get_pdcch_grid().result_to_string();
|
||||
tti_alloc.get_pdcch_grid().get_allocs(&dci_result, &pdcch_mask);
|
||||
tti_alloc.get_pdcch_grid().get_allocs(&dci_result, &last_pdcch_mask);
|
||||
|
||||
/* Register final CFI */
|
||||
dl_sched_result.cfi = tti_alloc.get_pdcch_grid().get_cfi();
|
||||
|
|
@ -892,6 +926,13 @@ void sf_sched::generate_dcis()
|
|||
set_dl_data_sched_result(dci_result);
|
||||
|
||||
set_ul_sched_result(dci_result);
|
||||
|
||||
/* Store last results */
|
||||
last_dl_mask = tti_alloc.get_dl_mask();
|
||||
last_ul_mask = tti_alloc.get_ul_mask();
|
||||
|
||||
/* Reset all resources */
|
||||
reset();
|
||||
}
|
||||
|
||||
uint32_t sf_sched::get_nof_ctrl_symbols() const
|
||||
|
|
|
|||
|
|
@ -252,9 +252,10 @@ int sched_tester::test_pdcch_collisions()
|
|||
tti_info.dl_sched_result[CARRIER_IDX], tti_info.ul_sched_result[CARRIER_IDX]) == SRSLTE_SUCCESS);
|
||||
|
||||
/* verify if sched_result "used_cce" coincide with sched "used_cce" */
|
||||
auto* tti_alloc = carrier_schedulers[0]->get_sf_sched_ptr(tti_info.tti_params.tti_rx);
|
||||
if (used_cce != tti_alloc->get_pdcch_mask()) {
|
||||
std::string mask_str = tti_alloc->get_pdcch_mask().to_string();
|
||||
auto* tti_alloc = carrier_schedulers[0]->get_sf_sched_ptr(tti_info.tti_params.tti_rx);
|
||||
srsenb::pdcch_mask_t mask = std::get<0>(tti_alloc->last_sched_result_masks());
|
||||
if (used_cce != mask) {
|
||||
std::string mask_str = mask.to_string();
|
||||
TESTERROR("The used_cce do not match: (%s!=%s)\n", mask_str.c_str(), used_cce.to_string().c_str());
|
||||
}
|
||||
|
||||
|
|
@ -375,15 +376,17 @@ int sched_tester::test_harqs()
|
|||
|
||||
int sched_tester::test_sch_collisions()
|
||||
{
|
||||
const srsenb::sf_sched* tti_sched = carrier_schedulers[0]->get_sf_sched_ptr(tti_info.tti_params.tti_rx);
|
||||
srsenb::prbmask_t ul_allocs(sched_cell_params[CARRIER_IDX].cfg.cell.nof_prb);
|
||||
const srsenb::sf_sched* tti_sched = carrier_schedulers[CARRIER_IDX]->get_sf_sched_ptr(tti_info.tti_params.tti_rx);
|
||||
const auto& combined_sched_result = tti_sched->last_sched_result_masks();
|
||||
|
||||
srsenb::prbmask_t ul_allocs(sched_cell_params[CARRIER_IDX].cfg.cell.nof_prb);
|
||||
|
||||
/* TEST: any collision in PUCCH and PUSCH */
|
||||
TESTASSERT(output_tester[CARRIER_IDX].test_pusch_collisions(
|
||||
tti_info.tti_params, tti_info.ul_sched_result[CARRIER_IDX], ul_allocs) == SRSLTE_SUCCESS);
|
||||
|
||||
/* TEST: check whether cumulative UL PRB masks coincide */
|
||||
if (ul_allocs != tti_sched->get_ul_mask()) {
|
||||
if (ul_allocs != std::get<2>(combined_sched_result)) {
|
||||
TESTERROR("The UL PRB mask and the scheduler result UL mask are not consistent\n");
|
||||
}
|
||||
|
||||
|
|
@ -413,14 +416,10 @@ int sched_tester::test_sch_collisions()
|
|||
}
|
||||
|
||||
// TEST: check if resulting DL mask is equal to scheduler internal DL mask
|
||||
if (rbgmask != carrier_schedulers[0]->get_sf_sched_ptr(tti_info.tti_params.tti_rx)->get_dl_mask()) {
|
||||
TESTERROR("The UL PRB mask and the scheduler result UL mask are not consistent (%s!=%s)\n",
|
||||
if (rbgmask != std::get<1>(combined_sched_result)) {
|
||||
TESTERROR("The DL PRB mask and the scheduler result DL mask are not consistent (%s!=%s)\n",
|
||||
rbgmask.to_string().c_str(),
|
||||
carrier_schedulers[CARRIER_IDX]
|
||||
->get_sf_sched_ptr(tti_info.tti_params.tti_rx)
|
||||
->get_dl_mask()
|
||||
.to_string()
|
||||
.c_str());
|
||||
std::get<1>(combined_sched_result).to_string().c_str());
|
||||
}
|
||||
return SRSLTE_SUCCESS;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue