sched,nr: fix derivation of RAR window

srsenb/hdr/stack/mac/nr/sched_nr_cfg.h

@@ -56,6 +56,12 @@ struct bwp_params {
   uint32_t P;
   uint32_t N_rbg;
 
+  struct slot_cfg {
+    bool is_dl;
+    bool is_ul;
+  };
+  srsran::bounded_vector<slot_cfg, SRSRAN_NOF_SF_X_FRAME> slots;
+
   struct pusch_ra_time_cfg {
     uint32_t msg3_delay; ///< Includes K2 and delta. See TS 36.214 6.1.2.1.1-2/4/5
     uint32_t K;

srsenb/hdr/stack/mac/nr/sched_nr_grant_allocator.h

@@ -43,7 +43,6 @@ struct bwp_slot_grid {
   uint32_t          slot_idx;
   const bwp_params* cfg;
 
-  bool              is_dl, is_ul;
   bwp_rb_bitmap     dl_prbs;
   bwp_rb_bitmap     ul_prbs;
   pdcch_dl_list_t   dl_pdcchs;
@@ -56,6 +55,9 @@ struct bwp_slot_grid {
   bwp_slot_grid() = default;
   explicit bwp_slot_grid(const bwp_params& bwp_params, uint32_t slot_idx_);
   void reset();
+
+  bool is_dl() const { return cfg->slots[slot_idx].is_dl; }
+  bool is_ul() const { return cfg->slots[slot_idx].is_ul; }
 };
 
 struct bwp_res_grid {

srsenb/hdr/stack/mac/nr/sched_nr_interface.h

@@ -55,6 +55,7 @@ public:
     srsran_sch_hl_cfg_nr_t pdsch           = {};
     srsran_sch_hl_cfg_nr_t pusch           = {};
     uint32_t               rar_window_size = 8;
+    uint32_t               numerology_idx  = 0;
   };
 
   struct cell_cfg_t {

srsenb/src/stack/mac/nr/sched_nr_cell.cc

@@ -58,20 +58,8 @@ void ra_sched::run_slot(bwp_slot_allocator& slot_grid, slot_ue_map_t& slot_ues)
 {
   slot_point pdcch_slot = slot_grid.get_pdcch_tti();
   slot_point msg3_slot  = pdcch_slot + bwp_cfg->pusch_ra_list[0].msg3_delay;
-  if (not slot_grid.res_grid()[pdcch_slot].is_dl) {
-    // RAR only allowed if PDCCH is available
-    return;
-  }
-
-  // Mark RAR window start, regardless of whether PUSCH is available
-  for (auto& rar : pending_rars) {
-    if (rar.rar_win.empty()) {
-      rar.rar_win = {pdcch_slot, pdcch_slot + bwp_cfg->cfg.rar_window_size};
-    }
-  }
-
-  if (not slot_grid.res_grid()[msg3_slot].is_ul) {
-    // RAR only allowed if respective Msg3 slot is available for UL
+  if (not bwp_cfg->slots[pdcch_slot.slot_idx()].is_dl or not bwp_cfg->slots[msg3_slot.slot_idx()].is_ul) {
+    // RAR only allowed if PDCCH is available and respective Msg3 slot is available for UL
     return;
   }
 
@@ -156,8 +144,14 @@ int ra_sched::dl_rach_info(const dl_sched_rar_info_t& rar_info)
 
   // create new RAR
   pending_rar_t p;
-  p.ra_rnti    = ra_rnti;
-  p.prach_slot = rar_info.prach_slot;
+  p.ra_rnti                            = ra_rnti;
+  p.prach_slot                         = rar_info.prach_slot;
+  const static uint32_t prach_duration = 1;
+  for (slot_point t = rar_info.prach_slot + prach_duration; t < rar_info.prach_slot + bwp_cfg->slots.size(); ++t) {
+    if (bwp_cfg->slots[t.slot_idx()].is_dl) {
+      p.rar_win = {t, t + bwp_cfg->cfg.rar_window_size};
+    }
+  }
   p.msg3_grant.push_back(rar_info);
   pending_rars.push_back(p);
 

srsenb/src/stack/mac/nr/sched_nr_cfg.cc

@@ -28,6 +28,15 @@ bwp_params::bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, ui
   P     = get_P(cfg.rb_width, cfg.pdsch.rbg_size_cfg_1);
   N_rbg = get_nof_rbgs(cfg.rb_width, cfg.start_rb, cfg.pdsch.rbg_size_cfg_1);
 
+  // Derive params of individual slots
+  uint32_t nof_slots = SRSRAN_NSLOTS_PER_FRAME_NR(cfg.numerology_idx);
+  for (size_t sl = 0; sl < nof_slots; ++sl) {
+    slot_cfg sl_cfg{};
+    sl_cfg.is_dl = srsran_tdd_nr_is_dl(&cell_cfg.tdd, cfg.numerology_idx, sl);
+    sl_cfg.is_ul = srsran_tdd_nr_is_ul(&cell_cfg.tdd, cfg.numerology_idx, sl);
+    slots.push_back(sl_cfg);
+  }
+
   pusch_ra_list.resize(cfg.pusch.nof_common_time_ra);
   const uint32_t        coreset_id = 0;
   srsran_sch_grant_nr_t grant;

srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc

@@ -17,15 +17,11 @@
 namespace srsenb {
 namespace sched_nr_impl {
 
-#define NUMEROLOGY_IDX 0
-
 bwp_slot_grid::bwp_slot_grid(const bwp_params& bwp_cfg_, uint32_t slot_idx_) :
   dl_prbs(bwp_cfg_.cfg.rb_width, bwp_cfg_.cfg.start_rb, bwp_cfg_.cfg.pdsch.rbg_size_cfg_1),
   ul_prbs(bwp_cfg_.cfg.rb_width, bwp_cfg_.cfg.start_rb, bwp_cfg_.cfg.pdsch.rbg_size_cfg_1),
   slot_idx(slot_idx_),
-  cfg(&bwp_cfg_),
-  is_dl(srsran_tdd_nr_is_dl(&bwp_cfg_.cell_cfg.tdd, NUMEROLOGY_IDX, slot_idx_)),
-  is_ul(srsran_tdd_nr_is_ul(&bwp_cfg_.cell_cfg.tdd, NUMEROLOGY_IDX, slot_idx_))
+  cfg(&bwp_cfg_)
 {
   for (uint32_t cs_idx = 0; cs_idx < SRSRAN_UE_DL_NR_MAX_NOF_CORESET; ++cs_idx) {
     if (cfg->cfg.pdcch.coreset_present[cs_idx]) {
@@ -166,7 +162,7 @@ alloc_result bwp_slot_allocator::alloc_pdsch(slot_ue& ue, const prb_grant& dl_gr
   bwp_slot_grid& bwp_pdcch_slot = bwp_grid[ue.pdcch_slot];
   bwp_slot_grid& bwp_pdsch_slot = bwp_grid[ue.pdsch_slot];
   bwp_slot_grid& bwp_uci_slot   = bwp_grid[ue.uci_slot];
-  if (not bwp_pdsch_slot.is_dl) {
+  if (not bwp_pdsch_slot.is_dl()) {
     logger.warning("SCHED: Trying to allocate PDSCH in TDD non-DL slot index=%d", bwp_pdsch_slot.slot_idx);
     return alloc_result::no_sch_space;
   }
@@ -299,13 +295,13 @@ alloc_result bwp_slot_allocator::alloc_pusch(slot_ue& ue, const prb_grant& ul_pr
 
 alloc_result bwp_slot_allocator::verify_pusch_space(bwp_slot_grid& pusch_grid, bwp_slot_grid* pdcch_grid) const
 {
-  if (not pusch_grid.is_ul) {
+  if (not pusch_grid.is_ul()) {
     logger.warning("SCHED: Trying to allocate PUSCH in TDD non-UL slot index=%d", pusch_grid.slot_idx);
     return alloc_result::no_sch_space;
   }
   if (pdcch_grid != nullptr) {
     // DCI needed
-    if (not pdcch_grid->is_dl) {
+    if (not pdcch_grid->is_dl()) {
       logger.warning("SCHED: Trying to allocate PDCCH in TDD non-DL slot index=%d", pdcch_grid->slot_idx);
       return alloc_result::no_sch_space;
     }