mirror of https://github.com/PentHertz/srsLTE.git
phy_common_nr: add helper method to print coreset info to string
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@ -212,6 +212,8 @@ typedef enum SRSRAN_API {
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srsran_coreset_bundle_size_n6,
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} srsran_coreset_bundle_size_t;
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uint32_t pdcch_nr_bundle_size(srsran_coreset_bundle_size_t x);
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typedef enum SRSRAN_API {
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srsran_coreset_precoder_granularity_contiguous = 0,
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srsran_coreset_precoder_granularity_reg_bundle
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@ -714,6 +716,16 @@ SRSRAN_API int srsran_coreset_zero(uint32_t n_cell_id,
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SRSRAN_API int
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srsran_coreset0_ssb_offset(uint32_t idx, srsran_subcarrier_spacing_t ssb_scs, srsran_subcarrier_spacing_t pdcch_scs);
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/**
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* @brief Convert Coreset to string
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*
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* @param coreset The coreset structure as input
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* @param str The string to write to
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* @param str_len Maximum string length
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* @return SRSRAN_API
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*/
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SRSRAN_API int srsran_coreset_to_str(srsran_coreset_t* coreset, char* str, uint32_t str_len);
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/**
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* @brief Convert SSB pattern to string
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* @param pattern
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@ -528,6 +528,19 @@ void srsran_combine_csi_trs_measurements(const srsran_csi_trs_measurements_t* a,
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dst->nof_re = nof_re_sum;
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}
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uint32_t pdcch_nr_bundle_size(srsran_coreset_bundle_size_t x)
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{
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switch (x) {
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case srsran_coreset_bundle_size_n2:
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return 2;
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case srsran_coreset_bundle_size_n3:
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return 3;
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case srsran_coreset_bundle_size_n6:
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return 6;
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}
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return 0;
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}
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typedef struct {
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uint32_t mux_pattern;
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uint32_t nof_prb;
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@ -596,6 +609,44 @@ static const coreset_zero_entry_t coreset_zero_30_15[16] = {
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{},
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};
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int srsran_coreset_to_str(srsran_coreset_t* coreset, char* str, uint32_t str_len)
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{
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if (coreset == NULL || str == NULL || str_len == 0) {
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return 0;
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}
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char freq_res_str[SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE] = {};
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srsran_vec_sprint_bin(
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freq_res_str, sizeof(freq_res_str), (uint8_t*)coreset->freq_resources, SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE);
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return srsran_print_check(
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str,
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str_len,
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0,
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"\n"
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" - coreset_id=%d\n"
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" - mapping_type=%s\n"
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" - duration=%d\n"
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" - freq_res=%s\n"
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" - dmrs_scrambling_present=%s (id=%d)\n"
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" - precoder_granularity=%s\n"
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" - interleaver_size=%d\n"
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" - reg_bundle_size=%d\n"
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" - shift_index=%d\n"
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" - offset_rb=%d\n",
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coreset->id,
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coreset->mapping_type == srsran_coreset_mapping_type_non_interleaved ? "non-interleaved" : "interleaved",
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coreset->duration,
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freq_res_str,
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coreset->dmrs_scrambling_id_present ? "true" : "false",
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coreset->dmrs_scrambling_id,
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coreset->precoder_granularity == srsran_coreset_precoder_granularity_contiguous ? "contiguous" : "reg_bundle",
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pdcch_nr_bundle_size(coreset->interleaver_size),
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pdcch_nr_bundle_size(coreset->reg_bundle_size),
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coreset->shift_index,
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coreset->offset_rb);
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}
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int srsran_coreset_zero(uint32_t n_cell_id,
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uint32_t ssb_pointA_freq_offset_Hz,
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srsran_subcarrier_spacing_t ssb_scs,
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@ -304,19 +304,6 @@ int srsran_pdcch_nr_set_carrier(srsran_pdcch_nr_t* q,
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return SRSRAN_SUCCESS;
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}
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static uint32_t pdcch_nr_bundle_size(srsran_coreset_bundle_size_t x)
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{
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switch (x) {
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case srsran_coreset_bundle_size_n2:
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return 2;
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case srsran_coreset_bundle_size_n3:
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return 3;
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case srsran_coreset_bundle_size_n6:
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return 6;
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}
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return 0;
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}
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static int pdcch_nr_cce_to_reg_mapping_non_interleaved(const srsran_coreset_t* coreset,
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const srsran_dci_location_t* dci_location,
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bool rb_mask[SRSRAN_MAX_PRB_NR])
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