mirror of https://github.com/PentHertz/srsLTE.git
SRSUE: Added TDD DL/UL slot detection
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@ -24,6 +24,7 @@ namespace srslte {
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**************************/
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struct phy_cfg_nr_t {
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srslte_tdd_config_nr_t tdd = {};
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srslte_sch_hl_cfg_nr_t pdsch = {};
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srslte_sch_hl_cfg_nr_t pusch = {};
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srslte_pucch_nr_hl_cfg_t pucch = {};
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@ -34,9 +35,6 @@ struct phy_cfg_nr_t {
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phy_cfg_nr_t()
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{
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// Default PDSCH configuration
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pdsch.sch_cfg.mcs_table = srslte_mcs_table_256qam;
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// Default PRACH configuration
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prach.is_nr = true;
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prach.config_idx = 16;
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@ -46,6 +44,21 @@ struct phy_cfg_nr_t {
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prach.num_ra_preambles = 64;
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prach.hs_flag = false;
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// tdd-UL-DL-ConfigurationCommon
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// referenceSubcarrierSpacing: kHz15 (0)
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// pattern1
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// dl-UL-TransmissionPeriodicity: ms10 (7)
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// nrofDownlinkSlots: 7
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// nrofDownlinkSymbols: 6
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// nrofUplinkSlots: 2
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// nrofUplinkSymbols: 4
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tdd.pattern1.period_ms = 10;
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tdd.pattern1.nof_dl_slots = 7;
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tdd.pattern1.nof_dl_symbols = 6;
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tdd.pattern1.nof_ul_slots = 2;
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tdd.pattern1.nof_ul_symbols = 4;
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tdd.pattern2.period_ms = 0;
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// physicalCellGroupConfig
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// pdsch-HARQ-ACK-Codebook: dynamic (1)
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harq_ack.pdsch_harq_ack_codebook = srslte_pdsch_harq_ack_codebook_dynamic;
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@ -301,6 +301,25 @@ typedef struct SRSLTE_API {
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uint32_t nof_candidates[SRSLTE_SEARCH_SPACE_NOF_AGGREGATION_LEVELS_NR];
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} srslte_search_space_t;
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/**
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* @brief TDD pattern configuration
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*/
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typedef struct SRSLTE_API {
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uint32_t period_ms; ///< Period in milliseconds, set to 0 if not present
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uint32_t nof_dl_slots; ///< Number of consecutive full DL slots at the beginning of each DL-UL pattern
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uint32_t nof_dl_symbols; ///< Number of consecutive DL symbols in the beginning of the slot following the last DL slot
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uint32_t nof_ul_slots; ///< Number of consecutive full UL slots at the end of each DL-UL pattern
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uint32_t nof_ul_symbols; ///< Number of consecutive UL symbols in the end of the slot preceding the first full UL slot
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} srslte_tdd_pattern_t;
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/**
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* @brief TDD configuration as described in TS 38.331 v15.10.0 TDD-UL-DL-ConfigCommon
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*/
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typedef struct SRSLTE_API {
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srslte_tdd_pattern_t pattern1;
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srslte_tdd_pattern_t pattern2;
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} srslte_tdd_config_nr_t;
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/**
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* @brief Get the RNTI type name for NR
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* @param rnti_type RNTI type name
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@ -372,6 +391,24 @@ SRSLTE_API uint32_t srslte_min_symbol_sz_rb(uint32_t nof_prb);
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*/
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SRSLTE_API float srslte_symbol_distance_s(uint32_t l0, uint32_t l1, uint32_t numerology);
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/**
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* @brief Decides whether a given slot is configured as Downlink
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* @param cfg Provides TDD configuration
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* @param numerology Provides BWP numerology
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* @param slot_idx Slot index in the frame for the given numerology
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* @return true if the provided slot index is configured for Downlink
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*/
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SRSLTE_API bool srslte_tdd_nr_is_dl(const srslte_tdd_config_nr_t* cfg, uint32_t numerology, uint32_t slot_idx);
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/**
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* @brief Decides whether a given slot is configured as Uplink
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* @param cfg Provides TDD configuration
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* @param numerology Provides BWP numerology
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* @param slot_idx Slot index in the frame for the given numerology
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* @return true if the provided slot index is configured for Uplink
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*/
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SRSLTE_API bool srslte_tdd_nr_is_ul(const srslte_tdd_config_nr_t* cfg, uint32_t numerology, uint32_t slot_idx);
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#ifdef __cplusplus
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}
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#endif
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@ -146,3 +146,49 @@ float srslte_symbol_distance_s(uint32_t l0, uint32_t l1, uint32_t numerology)
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// Return symbol distance in microseconds
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return (N << numerology) * SRSLTE_LTE_TS;
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}
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bool srslte_tdd_nr_is_dl(const srslte_tdd_config_nr_t* cfg, uint32_t numerology, uint32_t slot_idx)
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{
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if (cfg == NULL) {
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return false;
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}
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// Calculate slot index within the TDD overall period
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uint32_t slot_x_ms = 1U << numerology; // Number of slots per millisecond
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uint32_t period_sum = (cfg->pattern1.period_ms + cfg->pattern2.period_ms) * slot_x_ms; // Total perdiod sum
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uint32_t slot_idx_period = slot_idx % period_sum; // Slot index within the period
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// Select pattern
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const srslte_tdd_pattern_t* pattern = &cfg->pattern1;
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if ((slot_idx_period >= cfg->pattern1.period_ms * slot_x_ms)) {
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pattern = &cfg->pattern2;
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slot_idx_period -= cfg->pattern1.period_ms * slot_x_ms; // Remove pattern 1 offset
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}
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return (slot_idx_period < pattern->nof_dl_slots ||
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(slot_idx_period == pattern->nof_dl_slots && pattern->nof_dl_symbols != 0));
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}
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bool srslte_tdd_nr_is_ul(const srslte_tdd_config_nr_t* cfg, uint32_t numerology, uint32_t slot_idx)
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{
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if (cfg == NULL) {
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return false;
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}
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// Calculate slot index within the TDD overall period
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uint32_t slot_x_ms = 1U << numerology; // Number of slots per millisecond
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uint32_t period_sum = (cfg->pattern1.period_ms + cfg->pattern2.period_ms) * slot_x_ms; // Total perdiod sum
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uint32_t slot_idx_period = slot_idx % period_sum; // Slot index within the period
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// Select pattern
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const srslte_tdd_pattern_t* pattern = &cfg->pattern1;
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if ((slot_idx_period >= cfg->pattern1.period_ms * slot_x_ms)) {
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pattern = &cfg->pattern2;
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slot_idx_period -= cfg->pattern1.period_ms * slot_x_ms; // Remove pattern 1 offset
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}
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// Calculate slot in which UL starts
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uint32_t start_ul = (pattern->period_ms * slot_x_ms - pattern->nof_ul_slots) - 1;
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return (slot_idx_period > start_ul || (slot_idx_period == start_ul && pattern->nof_ul_symbols != 0));
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}
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@ -181,6 +181,11 @@ void cc_worker::decode_pdcch_ul()
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bool cc_worker::work_dl()
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{
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// Check if it is a DL slot, if not skip
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if (!srslte_tdd_nr_is_dl(&phy->cfg.tdd, 0, dl_slot_cfg.idx)) {
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return true;
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}
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// Run FFT
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srslte_ue_dl_nr_estimate_fft(&ue_dl, &dl_slot_cfg);
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@ -249,6 +254,11 @@ bool cc_worker::work_dl()
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bool cc_worker::work_ul()
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{
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// Check if it is a DL slot, if not skip
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if (!srslte_tdd_nr_is_ul(&phy->cfg.tdd, 0, ul_slot_cfg.idx)) {
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return true;
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}
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srslte_uci_data_nr_t uci_data = {};
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uint32_t pid = 0;
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