diff --git a/lib/include/srsran/interfaces/sched_interface.h b/lib/include/srsran/interfaces/sched_interface.h index 7464592e4..cb946349d 100644 --- a/lib/include/srsran/interfaces/sched_interface.h +++ b/lib/include/srsran/interfaces/sched_interface.h @@ -53,7 +53,9 @@ public: int pusch_max_mcs = 28; uint32_t min_nof_ctrl_symbols = 1; uint32_t max_nof_ctrl_symbols = 3; + int min_aggr_level = 0; int max_aggr_level = 3; + bool adaptive_aggr_level = true; bool pucch_mux_enabled = false; float target_bler = 0.05; float max_delta_dl_cqi = 5; diff --git a/srsenb/enb.conf.example b/srsenb/enb.conf.example index a6cdd0163..fb2f73e7e 100644 --- a/srsenb/enb.conf.example +++ b/srsenb/enb.conf.example @@ -160,7 +160,9 @@ enable = false # Scheduler configuration options # # sched_policy: User MAC scheduling policy (E.g. time_rr, time_pf) +# min_aggr_level: Optional minimum aggregation level index (l=log2(L) can be 0, 1, 2 or 3) # max_aggr_level: Optional maximum aggregation level index (l=log2(L) can be 0, 1, 2 or 3) +# adaptive_aggr_level: Boolean flag to enable/disable adaptive aggregation level based on target BLER # pdsch_mcs: Optional fixed PDSCH MCS (ignores reported CQIs if specified) # pdsch_max_mcs: Optional PDSCH MCS limit # pusch_mcs: Optional fixed PUSCH MCS (ignores reported CQIs if specified) @@ -176,7 +178,9 @@ enable = false [scheduler] #policy = time_pf #policy_args = 2 -#max_aggr_level = -1 +#min_aggr_level = 0 +#max_aggr_level = 3 +#adaptive_aggr_level = true #pdsch_mcs = -1 #pdsch_max_mcs = -1 #pusch_mcs = -1 diff --git a/srsenb/hdr/stack/mac/sched_helpers.h b/srsenb/hdr/stack/mac/sched_helpers.h index 4db0546ec..83962c6ff 100644 --- a/srsenb/hdr/stack/mac/sched_helpers.h +++ b/srsenb/hdr/stack/mac/sched_helpers.h @@ -69,6 +69,7 @@ inline uint32_t get_tbs_bytes(uint32_t mcs, uint32_t nof_alloc_prb, bool use_tbs /// Find lowest DCI aggregation level supported by the UE spectral efficiency uint32_t get_aggr_level(uint32_t nof_bits, uint32_t dl_cqi, + uint32_t min_aggr_lvl, uint32_t max_aggr_lvl, uint32_t cell_nof_prb, bool use_tbs_index_alt); diff --git a/srsenb/hdr/stack/mac/sched_ue_ctrl/sched_ue_cell.h b/srsenb/hdr/stack/mac/sched_ue_ctrl/sched_ue_cell.h index 6f07424dc..5779fee8e 100644 --- a/srsenb/hdr/stack/mac/sched_ue_ctrl/sched_ue_cell.h +++ b/srsenb/hdr/stack/mac/sched_ue_ctrl/sched_ue_cell.h @@ -47,6 +47,8 @@ struct sched_ue_cell { int get_dl_cqi(const rbgmask_t& rbgs) const; int get_ul_cqi() const; + uint32_t get_aggr_level(uint32_t nof_bits) const; + int set_ack_info(tti_point tti_rx, uint32_t tb_idx, bool ack); int set_ul_crc(tti_point tti_rx, bool crc_res); int set_ul_snr(tti_point tti_rx, float ul_snr, uint32_t ul_ch_code); diff --git a/srsenb/src/main.cc b/srsenb/src/main.cc index ac40533b3..7b6be3828 100644 --- a/srsenb/src/main.cc +++ b/srsenb/src/main.cc @@ -145,7 +145,9 @@ void parse_args(all_args_t* args, int argc, char* argv[]) ("scheduler.pdsch_max_mcs", bpo::value(&args->stack.mac.sched.pdsch_max_mcs)->default_value(-1), "Optional PDSCH MCS limit") ("scheduler.pusch_mcs", bpo::value(&args->stack.mac.sched.pusch_mcs)->default_value(-1), "Optional fixed PUSCH MCS (ignores reported CQIs if specified)") ("scheduler.pusch_max_mcs", bpo::value(&args->stack.mac.sched.pusch_max_mcs)->default_value(-1), "Optional PUSCH MCS limit") - ("scheduler.max_aggr_level", bpo::value(&args->stack.mac.sched.max_aggr_level)->default_value(-1), "Optional maximum aggregation level index (l=log2(L)) ") + ("scheduler.min_aggr_level", bpo::value(&args->stack.mac.sched.min_aggr_level)->default_value(0), "Optional minimum aggregation level index (l=log2(L)) ") + ("scheduler.max_aggr_level", bpo::value(&args->stack.mac.sched.max_aggr_level)->default_value(3), "Optional maximum aggregation level index (l=log2(L)) ") + ("scheduler.adaptive_aggr_level", bpo::value(&args->stack.mac.sched.adaptive_aggr_level)->default_value(true), "Boolean flag to enable/disable adaptive aggregation level based on target BLER") ("scheduler.max_nof_ctrl_symbols", bpo::value(&args->stack.mac.sched.max_nof_ctrl_symbols)->default_value(3), "Number of control symbols") ("scheduler.min_nof_ctrl_symbols", bpo::value(&args->stack.mac.sched.min_nof_ctrl_symbols)->default_value(1), "Minimum number of control symbols") ("scheduler.pucch_multiplex_enable", bpo::value(&args->stack.mac.sched.pucch_mux_enabled)->default_value(false), "Enable PUCCH multiplexing") diff --git a/srsenb/src/stack/mac/sched_helpers.cc b/srsenb/src/stack/mac/sched_helpers.cc index a408edd78..14db2fea1 100644 --- a/srsenb/src/stack/mac/sched_helpers.cc +++ b/srsenb/src/stack/mac/sched_helpers.cc @@ -382,10 +382,13 @@ void generate_cce_location(srsran_regs_t* regs_, * DCI-specific helper functions *******************************************************/ -uint32_t -get_aggr_level(uint32_t nof_bits, uint32_t dl_cqi, uint32_t max_aggr_lvl, uint32_t cell_nof_prb, bool use_tbs_index_alt) +uint32_t get_aggr_level(uint32_t nof_bits, + uint32_t dl_cqi, + uint32_t min_aggr_lvl, + uint32_t max_aggr_lvl, + uint32_t cell_nof_prb, + bool use_tbs_index_alt) { - uint32_t l = 0; float max_coderate = srsran_cqi_to_coderate(dl_cqi, use_tbs_index_alt); float coderate; float factor = 1.5; @@ -396,6 +399,7 @@ get_aggr_level(uint32_t nof_bits, uint32_t dl_cqi, uint32_t max_aggr_lvl, uint32 } l_max = SRSRAN_MIN(max_aggr_lvl, l_max); + uint32_t l = min_aggr_lvl; do { coderate = srsran_pdcch_coderate(nof_bits, l); l++; diff --git a/srsenb/src/stack/mac/sched_ue.cc b/srsenb/src/stack/mac/sched_ue.cc index 2b5a42b5e..bbc55a486 100644 --- a/srsenb/src/stack/mac/sched_ue.cc +++ b/srsenb/src/stack/mac/sched_ue.cc @@ -963,9 +963,7 @@ std::pair sched_ue::get_active_cell_index(uint32_t enb_cc_idx) c uint32_t sched_ue::get_aggr_level(uint32_t enb_cc_idx, uint32_t nof_bits) { - const auto& cc = cells[enb_cc_idx]; - return srsenb::get_aggr_level( - nof_bits, cc.get_dl_cqi(), cc.max_aggr_level, cc.cell_cfg->nof_prb(), cfg.use_tbs_index_alt); + return cells[enb_cc_idx].get_aggr_level(nof_bits); } void sched_ue::finish_tti(tti_point tti_rx, uint32_t enb_cc_idx) diff --git a/srsenb/src/stack/mac/sched_ue_ctrl/sched_ue_cell.cc b/srsenb/src/stack/mac/sched_ue_ctrl/sched_ue_cell.cc index 4f1a97c57..8f1aca8eb 100644 --- a/srsenb/src/stack/mac/sched_ue_ctrl/sched_ue_cell.cc +++ b/srsenb/src/stack/mac/sched_ue_ctrl/sched_ue_cell.cc @@ -235,9 +235,23 @@ int sched_ue_cell::get_dl_cqi(const rbgmask_t& rbgs) const int sched_ue_cell::get_dl_cqi() const { - rbgmask_t rbgmask(cell_cfg->nof_rbgs); - rbgmask.fill(0, rbgmask.size()); - return get_dl_cqi(rbgmask); + return std::max(0, (int)std::min(dl_cqi_ctxt.get_avg_cqi() + dl_cqi_coeff, 15.0f)); +} + +uint32_t sched_ue_cell::get_aggr_level(uint32_t nof_bits) const +{ + uint32_t dl_cqi = 0; + if (cell_cfg->sched_cfg->adaptive_aggr_level) { + dl_cqi = get_dl_cqi(); + } else { + dl_cqi = dl_cqi_ctxt.get_avg_cqi(); + } + return srsenb::get_aggr_level(nof_bits, + dl_cqi, + cell_cfg->sched_cfg->min_aggr_level, + max_aggr_level, + cell_cfg->nof_prb(), + ue_cfg->use_tbs_index_alt); } /*************************************************************