From e64fcf6ea666621820cce2939ebd3030902af50c Mon Sep 17 00:00:00 2001 From: Francisco Paisana Date: Tue, 27 Jul 2021 16:34:31 +0100 Subject: [PATCH] sched,nr: extend sched nr to support RAR and msg3 DCI packing. --- srsenb/hdr/stack/mac/nr/sched_nr.h | 2 + srsenb/hdr/stack/mac/nr/sched_nr_cfg.h | 19 +++++---- srsenb/hdr/stack/mac/nr/sched_nr_helpers.h | 6 ++- srsenb/hdr/stack/mac/nr/sched_nr_interface.h | 5 ++- srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h | 1 + srsenb/hdr/stack/mac/nr/sched_nr_rb.h | 2 +- srsenb/hdr/stack/mac/nr/sched_nr_rb_grid.h | 2 +- srsenb/hdr/stack/mac/nr/sched_nr_worker.h | 8 +++- srsenb/src/stack/mac/nr/sched_nr.cc | 6 +++ srsenb/src/stack/mac/nr/sched_nr_cell.cc | 4 +- srsenb/src/stack/mac/nr/sched_nr_cfg.cc | 14 +++++++ srsenb/src/stack/mac/nr/sched_nr_harq.cc | 2 +- srsenb/src/stack/mac/nr/sched_nr_helpers.cc | 39 +++++++++++++---- srsenb/src/stack/mac/nr/sched_nr_pdcch.cc | 5 ++- srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc | 42 +++++++++---------- srsenb/src/stack/mac/nr/sched_nr_worker.cc | 44 +++++++++++++++++--- test/phy/dummy_gnb_stack.h | 37 +++++++++++----- 17 files changed, 170 insertions(+), 68 deletions(-) diff --git a/srsenb/hdr/stack/mac/nr/sched_nr.h b/srsenb/hdr/stack/mac/nr/sched_nr.h index f186119a7..b48675036 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr.h @@ -41,6 +41,8 @@ public: int cell_cfg(srsran::const_span cell_list) override; void ue_cfg(uint16_t rnti, const ue_cfg_t& cfg) override; + int dl_rach_info(uint32_t cc, const dl_sched_rar_info_t& rar_info); + void dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) override; void ul_crc_info(uint16_t rnti, uint32_t cc, uint32_t pid, bool crc) override; void ul_sr_info(slot_point slot_rx, uint16_t rnti) override; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h b/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h index ba8de9946..014359933 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_cfg.h @@ -36,6 +36,15 @@ using sched_cfg_t = sched_nr_interface::sched_cfg_t; using cell_cfg_t = sched_nr_interface::cell_cfg_t; using bwp_cfg_t = sched_nr_interface::bwp_cfg_t; +using pdcch_cce_pos_list = srsran::bounded_vector; +using bwp_cce_pos_list = std::array, SRSRAN_NOF_SF_X_FRAME>; +void get_dci_locs(const srsran_coreset_t& coreset, + const srsran_search_space_t& search_space, + uint16_t rnti, + bwp_cce_pos_list& cce_locs); + +/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + struct bwp_params { const uint32_t bwp_id; const uint32_t cc; @@ -56,6 +65,8 @@ struct bwp_params { std::vector pusch_ra_list; bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, uint32_t cc, uint32_t bwp_id); + + bwp_cce_pos_list rar_cce_list; }; struct sched_cell_params { @@ -79,17 +90,9 @@ struct sched_params { /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// using prb_bitmap = srsran::bounded_bitset; -using rbgmask_t = srsran::bounded_bitset; using pdcchmask_t = srsran::bounded_bitset; -using pdcch_cce_pos_list = srsran::bounded_vector; -using bwp_cce_pos_list = std::array, SRSRAN_NOF_SF_X_FRAME>; -void get_dci_locs(const srsran_coreset_t& coreset, - const srsran_search_space_t& search_space, - uint16_t rnti, - bwp_cce_pos_list& cce_locs); - /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// using ue_cfg_t = sched_nr_interface::ue_cfg_t; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h b/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h index 019628cd1..065a06880 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_helpers.h @@ -18,11 +18,13 @@ namespace srsenb { namespace sched_nr_impl { +class slot_ue; + /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -bool fill_dci_rar(prb_interval interv, const bwp_params& bwp_cfg, srsran_dci_dl_nr_t& dci); +bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params& bwp_cfg, srsran_dci_dl_nr_t& dci); -class slot_ue; +bool fill_dci_msg3(const slot_ue& ue, const bwp_params& bwp_cfg, srsran_dci_ul_nr_t& dci); /// Generate PDCCH DL DCI fields void fill_dl_dci_ue_fields(const slot_ue& ue, diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_interface.h b/srsenb/hdr/stack/mac/nr/sched_nr_interface.h index b7237f2a0..5ec9b2d16 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_interface.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_interface.h @@ -63,7 +63,10 @@ public: srsran::bounded_vector bwps{1}; // idx0 for BWP-common }; - struct sched_cfg_t {}; + struct sched_cfg_t { + bool pdsch_enabled = true; + bool pusch_enabled = true; + }; struct ue_cc_cfg_t { bool active = false; diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h b/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h index 30cdde0d2..98e59f34a 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h @@ -66,6 +66,7 @@ private: uint32_t coreset_id; uint32_t slot_idx; uint32_t nof_freq_res = 0; + const bwp_cce_pos_list& rar_cce_list; // List of PDCCH grants struct alloc_record { diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_rb.h b/srsenb/hdr/stack/mac/nr/sched_nr_rb.h index a8e88e2b0..e1030bbfb 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_rb.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_rb.h @@ -59,7 +59,7 @@ struct prb_grant { alloc.rbgs.~rbg_bitmap(); new (&alloc.interv) prb_interval(prbs); } else { - alloc.interv = alloc.interv; + alloc.interv = prbs; } return *this; } diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_rb_grid.h b/srsenb/hdr/stack/mac/nr/sched_nr_rb_grid.h index ba452a0e8..9c4c4998b 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_rb_grid.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_rb_grid.h @@ -89,7 +89,7 @@ public: slot_ue_map_t& ues, uint32_t max_nof_grants); alloc_result alloc_pdsch(slot_ue& ue, const prb_grant& dl_grant); - alloc_result alloc_pusch(slot_ue& ue, const rbgmask_t& dl_mask); + alloc_result alloc_pusch(slot_ue& ue, const prb_grant& dl_mask); slot_point get_pdcch_tti() const { return pdcch_slot; } const bwp_res_grid& res_grid() const { return bwp_grid; } diff --git a/srsenb/hdr/stack/mac/nr/sched_nr_worker.h b/srsenb/hdr/stack/mac/nr/sched_nr_worker.h index 631f53537..0818cca28 100644 --- a/srsenb/hdr/stack/mac/nr/sched_nr_worker.h +++ b/srsenb/hdr/stack/mac/nr/sched_nr_worker.h @@ -42,6 +42,8 @@ public: void finish(); bool running() const { return slot_rx.valid(); } + void enqueue_cc_event(srsran::move_callback ev); + /// Enqueue feedback directed at a given UE in a given cell void enqueue_cc_feedback(uint16_t rnti, feedback_callback_t fdbk); @@ -65,8 +67,9 @@ private: uint16_t rnti; feedback_callback_t fdbk; }; - std::mutex feedback_mutex; - srsran::deque pending_feedback, tmp_feedback_to_run; + std::mutex feedback_mutex; + srsran::deque pending_feedback, tmp_feedback_to_run; + srsran::deque > pending_events, tmp_events_to_run; srsran::static_circular_map slot_ues; }; @@ -93,6 +96,7 @@ public: void run_slot(slot_point slot_tx, uint32_t cc, dl_sched_t& dl_res, ul_sched_t& ul_res); void enqueue_event(uint16_t rnti, srsran::move_callback ev); + void enqueue_cc_event(uint32_t cc, srsran::move_callback ev); void enqueue_cc_feedback(uint16_t rnti, uint32_t cc, slot_cc_worker::feedback_callback_t fdbk) { cc_worker_list[cc]->worker.enqueue_cc_feedback(rnti, std::move(fdbk)); diff --git a/srsenb/src/stack/mac/nr/sched_nr.cc b/srsenb/src/stack/mac/nr/sched_nr.cc index da25e2862..5de07c231 100644 --- a/srsenb/src/stack/mac/nr/sched_nr.cc +++ b/srsenb/src/stack/mac/nr/sched_nr.cc @@ -158,6 +158,12 @@ int sched_nr::get_ul_sched(slot_point pusch_tti, uint32_t cc, ul_sched_t& result return SRSRAN_SUCCESS; } +int sched_nr::dl_rach_info(uint32_t cc, const dl_sched_rar_info_t& rar_info) +{ + sched_workers->enqueue_cc_event(cc, [this, cc, rar_info]() { cells[cc]->bwps[0].ra.dl_rach_info(rar_info); }); + return SRSRAN_SUCCESS; +} + void sched_nr::dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) { sched_workers->enqueue_cc_feedback( diff --git a/srsenb/src/stack/mac/nr/sched_nr_cell.cc b/srsenb/src/stack/mac/nr/sched_nr_cell.cc index a1782b261..1d48d1c3c 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_cell.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_cell.cc @@ -74,9 +74,9 @@ void ra_sched::run_slot(bwp_slot_allocator& slot_grid, slot_ue_map_t& slot_ues) if (pdcch_slot >= rar_window.stop()) { fmt::memory_buffer str_buffer; fmt::format_to(str_buffer, - "SCHED: Could not transmit RAR within the window (RA={}, Window={}, RAR={}", - rar.prach_slot, + "SCHED: Could not transmit RAR within the window Window={}, PRACH={}, RAR={}", rar_window, + rar.prach_slot, pdcch_slot); srsran::console("%s\n", srsran::to_c_str(str_buffer)); logger.warning("%s", srsran::to_c_str(str_buffer)); diff --git a/srsenb/src/stack/mac/nr/sched_nr_cfg.cc b/srsenb/src/stack/mac/nr/sched_nr_cfg.cc index ddf2e2869..b81b8743f 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_cfg.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_cfg.cc @@ -42,6 +42,20 @@ bwp_params::bwp_params(const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_, ui srsran_assert(ret == SRSRAN_SUCCESS, "Failed to obtain RA config"); } srsran_assert(not pusch_ra_list.empty(), "Time-Domain Resource Allocation not valid"); + + for (uint32_t sl = 0; sl < SRSRAN_NOF_SF_X_FRAME; ++sl) { + for (uint32_t agg_idx = 0; agg_idx < MAX_NOF_AGGR_LEVELS; ++agg_idx) { + rar_cce_list[sl][agg_idx].resize(SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR); + int n = srsran_pdcch_nr_locations_coreset(&cell_cfg.bwps[0].pdcch.coreset[0], + &cell_cfg.bwps[0].pdcch.ra_search_space, + 0, + agg_idx, + sl, + rar_cce_list[sl][agg_idx].data()); + srsran_assert(n >= 0, "Failed to configure RAR DCI locations"); + rar_cce_list[sl][agg_idx].resize(n); + } + } } sched_cell_params::sched_cell_params(uint32_t cc_, const cell_cfg_t& cell, const sched_cfg_t& sched_cfg_) : diff --git a/srsenb/src/stack/mac/nr/sched_nr_harq.cc b/srsenb/src/stack/mac/nr/sched_nr_harq.cc index b3b77d304..0d27c34e7 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_harq.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_harq.cc @@ -79,7 +79,7 @@ bool harq_proc::new_retx(slot_point slot_tx_, slot_point slot_ack_, const prb_gr { if (grant.is_alloc_type0() != prbs_.is_alloc_type0() or (grant.is_alloc_type0() and grant.rbgs().count() != prbs_.rbgs().count()) or - (grant.is_alloc_type1() and grant.prbs().length() == prbs_.prbs().length())) { + (grant.is_alloc_type1() and grant.prbs().length() != prbs_.prbs().length())) { return false; } if (new_retx(slot_tx_, slot_ack_)) { diff --git a/srsenb/src/stack/mac/nr/sched_nr_helpers.cc b/srsenb/src/stack/mac/nr/sched_nr_helpers.cc index 5f33527be..af7e02ac2 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_helpers.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_helpers.cc @@ -19,15 +19,6 @@ namespace sched_nr_impl { //////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -bool fill_dci_rar(prb_interval interv, const bwp_params& cell, srsran_dci_dl_nr_t& dci) -{ - dci.mcs = 5; - dci.ctx.format = srsran_dci_format_nr_1_0; - // TODO: Fill - - return true; -} - template void fill_dci_common(const slot_ue& ue, const bwp_params& bwp_cfg, DciDlOrUl& dci) { @@ -54,6 +45,36 @@ void fill_dci_common(const slot_ue& ue, const bwp_params& bwp_cfg, DciDlOrUl& dc dci.time_domain_assigment = 0; } +bool fill_dci_rar(prb_interval interv, uint16_t ra_rnti, const bwp_params& bwp_cfg, srsran_dci_dl_nr_t& dci) +{ + dci.mcs = 5; + dci.ctx.format = srsran_dci_format_nr_rar; + dci.ctx.ss_type = srsran_search_space_type_rar; + dci.ctx.rnti_type = srsran_rnti_type_ra; + dci.ctx.rnti = ra_rnti; + dci.ctx.coreset_id = bwp_cfg.cfg.pdcch.ra_search_space.coreset_id; + dci.freq_domain_assigment = srsran_ra_nr_type1_riv(bwp_cfg.cfg.rb_width, interv.start(), interv.length()); + // TODO: Fill + + return true; +} + +bool fill_dci_msg3(const slot_ue& ue, const bwp_params& bwp_cfg, srsran_dci_ul_nr_t& msg3_dci) +{ + msg3_dci.ctx.coreset_id = ue.cfg->phy().pdcch.ra_search_space.coreset_id; + msg3_dci.ctx.rnti_type = srsran_rnti_type_tc; + msg3_dci.ctx.rnti = ue.rnti; + msg3_dci.ctx.ss_type = srsran_search_space_type_rar; + if (ue.h_ul->nof_retx() == 0) { + msg3_dci.ctx.format = srsran_dci_format_nr_rar; + } else { + msg3_dci.ctx.format = srsran_dci_format_nr_0_0; + } + fill_dci_common(ue, bwp_cfg, msg3_dci); + + return true; +} + void fill_dl_dci_ue_fields(const slot_ue& ue, const bwp_params& bwp_cfg, uint32_t ss_id, diff --git a/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc b/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc index 4702965bc..dd2d8ec92 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_pdcch.cc @@ -25,7 +25,8 @@ coreset_region::coreset_region(const bwp_params& bwp_cfg_, coreset_id(coreset_id_), slot_idx(slot_idx_), pdcch_dl_list(dl_list_), - pdcch_ul_list(ul_list_) + pdcch_ul_list(ul_list_), + rar_cce_list(bwp_cfg_.rar_cce_list) { const bool* res_active = &coreset_cfg->freq_resources[0]; nof_freq_res = std::count(res_active, res_active + SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE, true); @@ -181,6 +182,8 @@ srsran::span coreset_region::get_cce_loc_table(const alloc_recor return record.ue->cfg->cce_pos_list(record.ss_id)[slot_idx][record.aggr_idx]; case pdcch_grant_type_t::ul_data: return record.ue->cfg->cce_pos_list(record.ss_id)[slot_idx][record.aggr_idx]; + case pdcch_grant_type_t::rar: + return rar_cce_list[slot_idx][record.aggr_idx]; default: break; } diff --git a/srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc b/srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc index ec9b6f7e5..7080cbf0d 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc @@ -116,13 +116,13 @@ alloc_result bwp_slot_allocator::alloc_rar_and_msg3(uint32_t // Generate DCI for RAR pdcch_dl_t& pdcch = bwp_pdcch_slot.dl_pdcchs.back(); - if (not fill_dci_rar(interv, *bwp_grid.cfg, pdcch.dci)) { + if (not fill_dci_rar(interv, rar.ra_rnti, *bwp_grid.cfg, pdcch.dci)) { // Cancel on-going PDCCH allocation bwp_pdcch_slot.coresets[coreset_id]->rem_last_dci(); return alloc_result::invalid_coderate; } // Generate RAR PDSCH - bwp_pdcch_slot.dl_prbs.add(interv); + bwp_pdcch_slot.dl_prbs |= interv; // Generate Msg3 grants in PUSCH uint32_t last_msg3 = msg3_rbs.start(); @@ -131,26 +131,22 @@ alloc_result bwp_slot_allocator::alloc_rar_and_msg3(uint32_t srsran_slot_cfg_t slot_cfg; slot_cfg.idx = msg3_slot.slot_idx(); for (const auto& grant : rar.msg3_grant) { - slot_ue& ue = ues[grant.temp_crnti]; - bool success = ue.h_ul->new_tx( - msg3_slot, msg3_slot, prb_interval{last_msg3, last_msg3 + msg3_nof_prbs}, mcs, 100, max_harq_msg3_retx); + slot_ue& ue = ues[grant.temp_crnti]; + prb_interval msg3_interv{last_msg3, last_msg3 + msg3_nof_prbs}; + bool success = ue.h_ul->new_tx(msg3_slot, msg3_slot, msg3_interv, mcs, 100, max_harq_msg3_retx); srsran_assert(success, "Failed to allocate Msg3"); last_msg3 += msg3_nof_prbs; - srsran_dci_ul_nr_t msg3_dci; // Create dummy Msg3 DCI - msg3_dci.ctx.coreset_id = 1; - msg3_dci.ctx.rnti_type = srsran_rnti_type_ra; - msg3_dci.ctx.ss_type = srsran_search_space_type_rar; - msg3_dci.ctx.format = srsran_dci_format_nr_0_0; - msg3_dci.cc_id = cfg.cc; - msg3_dci.bwp_id = cfg.bwp_id; - msg3_dci.rv = 0; - msg3_dci.mcs = 0; - msg3_dci.time_domain_assigment = dai++; + pdcch_ul_t msg3_pdcch; + fill_dci_msg3(ue, *bwp_grid.cfg, msg3_pdcch.dci); + msg3_pdcch.dci.time_domain_assigment = dai++; bwp_msg3_slot.puschs.emplace_back(); pusch_t& pusch = bwp_msg3_slot.puschs.back(); - success = ue.cfg->phy().get_pusch_cfg(slot_cfg, msg3_dci, pusch.sch); + success = ue.cfg->phy().get_pusch_cfg(slot_cfg, msg3_pdcch.dci, pusch.sch); srsran_assert(success, "Error converting DCI to PUSCH grant"); pusch.sch.grant.tb[0].softbuffer.rx = ue.h_ul->get_softbuffer().get(); + if (ue.h_ul->nof_retx() > 0) { + bwp_pdcch_slot.ul_pdcchs.push_back(msg3_pdcch); + } } bwp_msg3_slot.ul_prbs.add(msg3_rbs); @@ -244,7 +240,7 @@ alloc_result bwp_slot_allocator::alloc_pdsch(slot_ue& ue, const prb_grant& dl_gr return alloc_result::success; } -alloc_result bwp_slot_allocator::alloc_pusch(slot_ue& ue, const rbg_bitmap& ul_mask) +alloc_result bwp_slot_allocator::alloc_pusch(slot_ue& ue, const prb_grant& ul_prbs) { auto& bwp_pdcch_slot = bwp_grid[ue.pdcch_slot]; auto& bwp_pusch_slot = bwp_grid[ue.pusch_slot]; @@ -257,9 +253,8 @@ alloc_result bwp_slot_allocator::alloc_pusch(slot_ue& ue, const rbg_bitmap& ul_m logger.warning("SCHED: Trying to allocate PUSCH for rnti=0x%x with no available HARQs", ue.rnti); return alloc_result::no_rnti_opportunity; } - pdcch_ul_list_t& pdcchs = bwp_pdcch_slot.ul_pdcchs; - const rbg_bitmap& pusch_mask = bwp_pusch_slot.ul_prbs.rbgs(); - if ((pusch_mask & ul_mask).any()) { + pdcch_ul_list_t& pdcchs = bwp_pdcch_slot.ul_pdcchs; + if (bwp_pusch_slot.ul_prbs.collides(ul_prbs)) { return alloc_result::sch_collision; } const uint32_t aggr_idx = 2, ss_id = 1; @@ -273,10 +268,11 @@ alloc_result bwp_slot_allocator::alloc_pusch(slot_ue& ue, const rbg_bitmap& ul_m srsran_assert(ue.cfg->ue_cfg()->fixed_ul_mcs >= 0, "Dynamic MCS not yet supported"); int mcs = ue.cfg->ue_cfg()->fixed_ul_mcs; int tbs = 100; - bool success = ue.h_ul->new_tx(ue.pusch_slot, ue.pusch_slot, ul_mask, mcs, tbs, ue.cfg->ue_cfg()->maxharq_tx); + bool success = ue.h_ul->new_tx(ue.pusch_slot, ue.pusch_slot, ul_prbs, mcs, tbs, ue.cfg->ue_cfg()->maxharq_tx); srsran_assert(success, "Failed to allocate UL HARQ"); } else { - srsran_assert(ue.h_ul->new_retx(ue.pusch_slot, ue.pusch_slot, ul_mask), "Failed to allocate UL HARQ retx"); + bool success = ue.h_ul->new_retx(ue.pusch_slot, ue.pusch_slot, ul_prbs); + srsran_assert(success, "Failed to allocate UL HARQ retx"); } // Allocation Successful @@ -285,7 +281,7 @@ alloc_result bwp_slot_allocator::alloc_pusch(slot_ue& ue, const rbg_bitmap& ul_m fill_ul_dci_ue_fields(ue, *bwp_grid.cfg, ss_id, pdcch.dci.ctx.location, pdcch.dci); pdcch.dci_cfg = ue.cfg->phy().get_dci_cfg(); // Generate PUSCH - bwp_pusch_slot.ul_prbs |= ul_mask; + bwp_pusch_slot.ul_prbs |= ul_prbs; bwp_pusch_slot.puschs.emplace_back(); pusch_t& pusch = bwp_pusch_slot.puschs.back(); srsran_slot_cfg_t slot_cfg; diff --git a/srsenb/src/stack/mac/nr/sched_nr_worker.cc b/srsenb/src/stack/mac/nr/sched_nr_worker.cc index 86d64235b..dbb99ff91 100644 --- a/srsenb/src/stack/mac/nr/sched_nr_worker.cc +++ b/srsenb/src/stack/mac/nr/sched_nr_worker.cc @@ -20,6 +20,13 @@ slot_cc_worker::slot_cc_worker(serv_cell_manager& cc_sched) : cell(cc_sched), cfg(cc_sched.cfg), bwp_alloc(cc_sched.bwps[0].grid), logger(srslog::fetch_basic_logger("MAC")) {} +void slot_cc_worker::enqueue_cc_event(srsran::move_callback ev) +{ + std::lock_guard lock(feedback_mutex); + pending_events.emplace_back(); + pending_events.back() = std::move(ev); +} + void slot_cc_worker::enqueue_cc_feedback(uint16_t rnti, feedback_callback_t fdbk) { std::lock_guard lock(feedback_mutex); @@ -33,8 +40,14 @@ void slot_cc_worker::run_feedback(ue_map_t& ue_db) { std::lock_guard lock(feedback_mutex); tmp_feedback_to_run.swap(pending_feedback); + tmp_events_to_run.swap(pending_events); } + for (srsran::move_callback& ev : tmp_events_to_run) { + ev(); + } + tmp_events_to_run.clear(); + for (feedback_t& f : tmp_feedback_to_run) { if (ue_db.contains(f.rnti) and ue_db[f.rnti]->carriers[cfg.cc] != nullptr) { f.fdbk(*ue_db[f.rnti]->carriers[cfg.cc]); @@ -102,6 +115,9 @@ void slot_cc_worker::finish() void slot_cc_worker::alloc_dl_ues() { + if (not cfg.sched_cfg.pdsch_enabled) { + return; + } if (slot_ues.empty()) { return; } @@ -110,13 +126,15 @@ void slot_cc_worker::alloc_dl_ues() return; } - rbgmask_t dlmask(cfg.bwps[0].N_rbg); - dlmask.fill(0, dlmask.size(), true); - bwp_alloc.alloc_pdsch(ue, dlmask); + prb_interval prbs(0, cfg.bwps[0].N_rbg); + bwp_alloc.alloc_pdsch(ue, prbs); } void slot_cc_worker::alloc_ul_ues() { + if (not cfg.sched_cfg.pusch_enabled) { + return; + } if (slot_ues.empty()) { return; } @@ -125,9 +143,8 @@ void slot_cc_worker::alloc_ul_ues() return; } - rbgmask_t ulmask(cfg.bwps[0].N_rbg); - ulmask.fill(0, ulmask.size(), true); - bwp_alloc.alloc_pusch(ue, ulmask); + prb_interval prbs(0, cfg.bwps[0].N_rbg); + bwp_alloc.alloc_pusch(ue, prbs); } void slot_cc_worker::log_result() const @@ -169,6 +186,16 @@ void slot_cc_worker::log_result() const ue.h_dl->nof_retx(), srsran_dci_format_nr_string(pdcch.dci.ctx.format), ue.pusch_slot); + } else if (pdcch.dci.ctx.rnti_type == srsran_rnti_type_tc) { + const slot_ue& ue = slot_ues[pdcch.dci.ctx.rnti]; + fmt::format_to(fmtbuf, + "SCHED: UL Msg3, cc={}, tc-rnti=0x{:x}, pid={}, nrtx={}, f={}, tti_pusch={}", + cell.cfg.cc, + ue.rnti, + pdcch.dci.pid, + ue.h_dl->nof_retx(), + srsran_dci_format_nr_string(pdcch.dci.ctx.format), + ue.pusch_slot); } else { fmt::format_to(fmtbuf, "SCHED: unknown rnti format"); } @@ -198,6 +225,11 @@ void sched_worker_manager::enqueue_event(uint16_t rnti, srsran::move_callback ev) +{ + cc_worker_list[cc]->worker.enqueue_cc_event(std::move(ev)); +} + void sched_worker_manager::run_slot(slot_point slot_tx, uint32_t cc, dl_sched_t& dl_res, ul_sched_t& ul_res) { srsran::bounded_vector waiting_cvars; diff --git a/test/phy/dummy_gnb_stack.h b/test/phy/dummy_gnb_stack.h index 45f78b2fd..0c9e30bff 100644 --- a/test/phy/dummy_gnb_stack.h +++ b/test/phy/dummy_gnb_stack.h @@ -73,9 +73,9 @@ private: srsran::phy_cfg_nr_t phy_cfg = {}; bool valid = false; - srsenb::sched_nr sched; - srsran::slot_point pdsch_slot, pusch_slot; - srslog::basic_logger& sched_logger; + std::unique_ptr sched; + srsran::slot_point pdsch_slot, pusch_slot; + srslog::basic_logger& sched_logger; std::mutex metrics_mutex; metrics_t metrics = {}; @@ -291,7 +291,7 @@ private: logger.debug("NACK received!"); } - sched.dl_ack_info(rnti, 0, ack_bit->pid, 0, is_ok); + sched->dl_ack_info(rnti, 0, ack_bit->pid, 0, is_ok); } // Process SR @@ -324,7 +324,6 @@ public: rnti(args.rnti), phy_cfg(args.phy_cfg), ss_id(args.ss_id), - sched(srsenb::sched_nr_interface::sched_cfg_t{}), use_dummy_sched(args.use_dummy_sched), sched_logger(srslog::fetch_basic_logger("MAC")) { @@ -332,14 +331,18 @@ public: sched_logger.set_level(srslog::basic_levels::debug); // create sched object + srsenb::sched_nr_interface::sched_cfg_t sched_cfg{}; + sched_cfg.pdsch_enabled = args.pdsch.slots != "" and args.pdsch.slots != "none"; + sched_cfg.pusch_enabled = args.pusch.slots != "" and args.pusch.slots != "none"; + sched.reset(new srsenb::sched_nr{sched_cfg}); std::vector cells_cfg = srsenb::get_default_cells_cfg(1, phy_cfg); - sched.cell_cfg(cells_cfg); + sched->cell_cfg(cells_cfg); // add UE to scheduler srsenb::sched_nr_interface::ue_cfg_t ue_cfg = srsenb::get_default_ue_cfg(1, phy_cfg); ue_cfg.fixed_dl_mcs = args.pdsch.mcs; ue_cfg.fixed_ul_mcs = args.pusch.mcs; - sched.ue_cfg(args.rnti, ue_cfg); + sched->ue_cfg(args.rnti, ue_cfg); dl.mcs = args.pdsch.mcs; ul.mcs = args.pusch.mcs; @@ -413,7 +416,7 @@ public: } if (not use_dummy_sched) { - int ret = sched.get_dl_sched(pdsch_slot, 0, dl_sched); + int ret = sched->get_dl_sched(pdsch_slot, 0, dl_sched); for (pdsch_t& pdsch : dl_sched.pdsch) { // Set TBS @@ -459,7 +462,7 @@ public: } if (not use_dummy_sched) { - int ret = sched.get_ul_sched(pusch_slot, 0, ul_sched); + int ret = sched->get_ul_sched(pusch_slot, 0, ul_sched); for (pusch_t& pusch : ul_sched.pusch) { pusch.data[0] = rx_harq_proc[pusch.pid].get_tb(pusch.sch.grant.tb[0].tbs).data(); @@ -547,14 +550,14 @@ public: void dl_ack_info(uint16_t rnti_, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) { if (not use_dummy_sched) { - sched.dl_ack_info(rnti_, cc, pid, tb_idx, ack); + sched->dl_ack_info(rnti_, cc, pid, tb_idx, ack); } } void ul_crc_info(uint16_t rnti_, uint32_t cc, uint32_t pid, bool crc) { if (not use_dummy_sched) { - sched.ul_crc_info(rnti_, cc, pid, crc); + sched->ul_crc_info(rnti_, cc, pid, crc); } } @@ -612,6 +615,18 @@ public: void rach_detected(const rach_info_t& rach_info) override { + if (not use_dummy_sched) { + srsenb::sched_nr_interface::dl_sched_rar_info_t ra_info; + ra_info.preamble_idx = rach_info.preamble; + ra_info.ta_cmd = rach_info.time_adv; + ra_info.ofdm_symbol_idx = 0; + ra_info.msg3_size = 7; + ra_info.freq_idx = 0; + ra_info.prach_slot = pdsch_slot - TX_ENB_DELAY; + ra_info.temp_crnti = rnti; + sched->dl_rach_info(0, ra_info); + } + std::unique_lock lock(metrics_mutex); prach_metrics_t& prach_metrics = metrics.prach[rach_info.preamble]; prach_metrics.avg_ta = SRSRAN_VEC_SAFE_CMA((float)rach_info.time_adv, prach_metrics.avg_ta, prach_metrics.count);