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rrc: copy PUCCH cnf from RRCSetup to PHY structs 

Signed-off-by: Carlo Galiotto <carlo@srs.io>
This commit is contained in:
Carlo Galiotto 2022-01-24 13:53:31 +01:00 committed by carlo-gal
parent 362abfe3c9
commit fe6500bd55
7 changed files with 31 additions and 5 deletions
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4
lib/src/asn1/rrc_nr_utils.cc
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@ -796,6 +796,10 @@ bool make_phy_res_config(const pucch_res_s& pucch_res,
{
srsran_pucch_nr_resource_t srsran_pucch_nr_resource = {};
srsran_pucch_nr_resource.starting_prb = pucch_res.start_prb;
srsran_pucch_nr_resource.intra_slot_hopping = pucch_res.intra_slot_freq_hop_present;
if (pucch_res.second_hop_prb_present) {
srsran_pucch_nr_resource.second_hop_prb = pucch_res.second_hop_prb;
}
switch (pucch_res.format.type()) {
case pucch_res_s::format_c_::types_opts::format0:
srsran_pucch_nr_resource.format = SRSRAN_PUCCH_NR_FORMAT_0;

13
lib/src/phy/phch/ra_ul_nr.c
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@ -551,6 +551,7 @@ int srsran_ra_ul_nr_pucch_resource(const srsran_pucch_nr_hl_cfg_t* pucch_cfg,
return SRSRAN_SUCCESS;
}
#if 0
for (size_t n = 0; n < SRSRAN_PUCCH_NR_MAX_NOF_SETS; n++) {
if (pucch_cfg->sets[n].nof_resources > 0) {
printf("\n ==== Set index number %zu: =====\n", n);
@ -558,19 +559,23 @@ int srsran_ra_ul_nr_pucch_resource(const srsran_pucch_nr_hl_cfg_t* pucch_cfg,
printf("\n PUCCH resource ID %zu", k);
printf("\n Format %u", pucch_cfg->sets[n].resources[k].format);
printf("\n Starting PRB %u", pucch_cfg->sets[n].resources[k].starting_prb);
printf("\n Intra slot hopping %s", pucch_cfg->sets[n].resources[k].intra_slot_hopping ? "True" : "False");
printf("\n Second PRB %u", pucch_cfg->sets[n].resources[k].second_hop_prb);
if (pucch_cfg->sets[n].resources[k].format == SRSRAN_PUCCH_NR_FORMAT_1) {
printf("\n ICS %u", pucch_cfg->sets[n].resources[k].initial_cyclic_shift);
printf("\n Num of symbols %u", pucch_cfg->sets[n].resources[k].nof_symbols);
printf("\n ICS %u \n", pucch_cfg->sets[n].resources[k].initial_cyclic_shift);
printf("\n Starting sym idx %u", pucch_cfg->sets[n].resources[k].start_symbol_idx);
printf("\n Time domain OCC %u \n", pucch_cfg->sets[n].resources[k].time_domain_occ);
}
if (pucch_cfg->sets[n].resources[k].format == SRSRAN_PUCCH_NR_FORMAT_2) {
printf("\n Num of PRBs %u", pucch_cfg->sets[n].resources[k].nof_prb);
printf("\n Start symb idx %u", pucch_cfg->sets[n].resources[k].start_symbol_idx);
printf("\n Num of symbols %u \n", pucch_cfg->sets[n].resources[k].nof_symbols);
printf("\n Num of symbols %u", pucch_cfg->sets[n].resources[k].nof_symbols);
printf("\n Start symb idx %u \n", pucch_cfg->sets[n].resources[k].start_symbol_idx);
}
}
}
}
#endif
// Use SR PUCCH resource
// - At least one positive SR
@ -640,9 +645,11 @@ int srsran_ra_ul_nr_pucch_resource(const srsran_pucch_nr_hl_cfg_t* pucch_cfg,
return SRSRAN_SUCCESS;
}
#if 0
if (uci_cfg->ack.count > 0 && uci_cfg->nof_csi == 1 && uci_cfg->csi[0].cfg.type == SRSRAN_CSI_REPORT_TYPE_PERIODIC) {
printf("This is point where we fail");
}
#endif
// If a UE does not have dedicated PUCCH resource configuration, provided by PUCCH-ResourceSet in PUCCH-Config,
// a PUCCH resource set is provided by pucch-ResourceCommon through an index to a row of Table 9.2.1-1 for size

2
srsenb/src/phy/nr/slot_worker.cc
View File

@ -182,6 +182,7 @@ bool slot_worker::work_ul()
for (uint32_t i = 0; i < (uint32_t)pucch.candidates.size(); i++) {
pucch_info[i].uci_data.cfg = pucch.candidates[i].uci_cfg;
#if 0
if (pucch_info[i].uci_data.cfg.nof_csi == 1 && pucch_info[i].uci_data.cfg.ack.count > 0) {
printf("Stop here");
}
@ -189,6 +190,7 @@ bool slot_worker::work_ul()
if (pucch_info[i].uci_data.cfg.nof_csi == 1 && pucch_info[i].uci_data.cfg.ack.count > 0) {
printf("Stop here");
}
#endif
// Decode PUCCH
if (srsran_gnb_ul_get_pucch(&gnb_ul,

2
srsgnb/src/stack/mac/sched_nr_worker.cc
View File

@ -185,9 +185,11 @@ void cc_worker::postprocess_decisions(bwp_slot_allocator& bwp_alloc)
continue;
}
#if 0
if (uci_cfg.nof_csi == 1 and uci_cfg.ack.count == 1) {
printf("Stop here");
}
#endif
// If this slot has a SR opportunity and the selected PUCCH format is 1, consider positive SR.
if (uci_cfg.o_sr > 0 and uci_cfg.ack.count > 0 and

4
srsgnb/src/stack/rrc/cell_asn1_config.cc
View File

@ -607,9 +607,9 @@ void fill_pucch_cfg_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, pucch_cfg
for (uint32_t i = 0; i < out.res_to_add_mod_list.size(); ++i) {
out.res_to_add_mod_list[i].pucch_res_id = i;
out.res_to_add_mod_list[i].intra_slot_freq_hop_present = false;
out.res_to_add_mod_list[i].second_hop_prb_present = false;
if (i < 8 or i == 16) {
out.res_to_add_mod_list[i].start_prb = 51;
out.res_to_add_mod_list[i].second_hop_prb_present = true;
out.res_to_add_mod_list[i].second_hop_prb = 0;
out.res_to_add_mod_list[i].format.set_format1().init_cyclic_shift = (4 * (j % 3));
out.res_to_add_mod_list[i].format.format1().nrof_symbols = 14;
@ -618,6 +618,7 @@ void fill_pucch_cfg_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, pucch_cfg
j++;
} else if (i < 15) {
out.res_to_add_mod_list[i].start_prb = 1;
out.res_to_add_mod_list[i].second_hop_prb_present = true;
out.res_to_add_mod_list[i].second_hop_prb = 50;
out.res_to_add_mod_list[i].format.set_format2().nrof_prbs = 1;
out.res_to_add_mod_list[i].format.format2().nrof_symbols = 2;
@ -625,6 +626,7 @@ void fill_pucch_cfg_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, pucch_cfg
j2++;
} else {
out.res_to_add_mod_list[i].start_prb = 50;
out.res_to_add_mod_list[i].second_hop_prb_present = true;
out.res_to_add_mod_list[i].second_hop_prb = 1;
out.res_to_add_mod_list[i].format.set_format2().nrof_prbs = 1;
out.res_to_add_mod_list[i].format.format2().nrof_symbols = 2;

2
srsgnb/src/stack/rrc/rrc_nr.cc
View File

@ -347,9 +347,11 @@ void rrc_nr::config_mac()
cell.ssb_positions_in_burst = du_cfg->cell(cc).serv_cell_cfg_common().ssb_positions_in_burst;
cell.ssb_periodicity_ms = du_cfg->cell(cc).serv_cell_cfg_common().ssb_periodicity_serving_cell.to_number();
cell.ssb_scs.value = (subcarrier_spacing_e::options)cfg.cell_list[0].phy_cell.carrier.scs;
#if 1
// bzero(cell.bwps[0].pdsch.nzp_csi_rs_sets, sizeof(cell.bwps[0].pdsch.nzp_csi_rs_sets));
bool valid_cfg = srsran::make_pdsch_cfg_from_serv_cell(base_sp_cell_cfg.sp_cell_cfg_ded, &cell.bwps[0].pdsch);
srsran_assert(valid_cfg, "Invalid NR cell configuration.");
#endif
}
// Set SIB1 and SI messages

9
srsgnb/src/stack/rrc/rrc_nr_ue.cc
View File

@ -1467,6 +1467,14 @@ int rrc_nr::ue::update_mac(const cell_group_cfg_s& cell_group_config, bool is_co
// TODO: remaining fields
}
}
if (cell_group_config.sp_cell_cfg_present and cell_group_config.sp_cell_cfg.sp_cell_cfg_ded_present and
cell_group_config.sp_cell_cfg.sp_cell_cfg_ded.ul_cfg_present and
cell_group_config.sp_cell_cfg.sp_cell_cfg_ded.ul_cfg.init_ul_bwp_present and
cell_group_config.sp_cell_cfg.sp_cell_cfg_ded.ul_cfg.init_ul_bwp.pucch_cfg_present) {
auto& pucch_cfg = cell_group_config.sp_cell_cfg.sp_cell_cfg_ded.ul_cfg.init_ul_bwp.pucch_cfg.setup();
srsran::fill_phy_pucch_cfg(pucch_cfg, &uecfg.phy_cfg.pucch);
}
} else {
auto& pdcch = cell_group_config.sp_cell_cfg.sp_cell_cfg_ded.init_dl_bwp.pdcch_cfg.setup();
for (auto& ss : pdcch.search_spaces_to_add_mod_list) {
@ -1481,7 +1489,6 @@ int rrc_nr::ue::update_mac(const cell_group_cfg_s& cell_group_config, bool is_co
}
}
uecfg.sp_cell_cfg.reset(new sp_cell_cfg_s{cell_group_cfg.sp_cell_cfg});
uecfg.mac_cell_group_cfg.reset(new mac_cell_group_cfg_s{cell_group_cfg.mac_cell_group_cfg});
uecfg.phy_cell_group_cfg.reset(new phys_cell_group_cfg_s{cell_group_cfg.phys_cell_group_cfg});