mirror of https://github.com/PentHertz/srsLTE.git
sched,nr: fix rar softbuffer allocation
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parent
04e5c81edf
commit
fec60344dd
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@ -53,7 +53,8 @@ struct bwp_slot_grid {
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slot_coreset_list coresets;
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pusch_list_t puschs;
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harq_ack_list_t pending_acks;
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srsran_softbuffer_tx_t rar_softbuffer;
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srsran::unique_pool_ptr<tx_harq_softbuffer> rar_softbuffer;
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bwp_slot_grid() = default;
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explicit bwp_slot_grid(const bwp_params& bwp_params, uint32_t slot_idx_);
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@ -21,7 +21,8 @@ bwp_slot_grid::bwp_slot_grid(const bwp_params& bwp_cfg_, uint32_t slot_idx_) :
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dl_prbs(bwp_cfg_.cfg.rb_width, bwp_cfg_.cfg.start_rb, bwp_cfg_.cfg.pdsch.rbg_size_cfg_1),
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ul_prbs(bwp_cfg_.cfg.rb_width, bwp_cfg_.cfg.start_rb, bwp_cfg_.cfg.pdsch.rbg_size_cfg_1),
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slot_idx(slot_idx_),
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cfg(&bwp_cfg_)
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cfg(&bwp_cfg_),
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rar_softbuffer(harq_softbuffer_pool::get_instance().get_tx(bwp_cfg_.cfg.rb_width))
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{
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for (uint32_t cs_idx = 0; cs_idx < SRSRAN_UE_DL_NR_MAX_NOF_CORESET; ++cs_idx) {
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if (cfg->cfg.pdcch.coreset_present[cs_idx]) {
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@ -29,7 +30,6 @@ bwp_slot_grid::bwp_slot_grid(const bwp_params& bwp_cfg_, uint32_t slot_idx_) :
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coresets[cs_id].emplace(*cfg, cs_id, slot_idx_, dl_pdcchs, ul_pdcchs);
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}
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}
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srsran_softbuffer_tx_init_guru(&rar_softbuffer, SRSRAN_SCH_NR_MAX_NOF_CB_LDPC, SRSRAN_LDPC_MAX_LEN_ENCODED_CB);
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}
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void bwp_slot_grid::reset()
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@ -148,7 +148,7 @@ alloc_result bwp_slot_allocator::alloc_rar_and_msg3(uint16_t
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slot_cfg.idx = pdcch_slot.slot_idx();
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bool success = phy_cfg.get_pdsch_cfg(slot_cfg, pdcch.dci, pdsch.sch);
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srsran_assert(success, "Error converting DCI to grant");
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pdsch.sch.grant.tb[0].softbuffer.tx = &bwp_pdcch_slot.rar_softbuffer;
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pdsch.sch.grant.tb[0].softbuffer.tx = bwp_pdcch_slot.rar_softbuffer->get();
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// Generate Msg3 grants in PUSCH
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uint32_t last_msg3 = msg3_rbs.start();
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