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srsLTE
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31 Commits

Author SHA1 Message Date
Xavier Arteaga 0c2f96d389 Fix 5G NR FEC memcheck 2020-11-04 15:06:39 +01:00
Xavier Arteaga 2c4aa1e379 Added Polar and LDPC forward error correction 2020-11-04 15:06:39 +01:00
Xavier Arteaga f21590735d refactored FEC directories 2020-11-02 16:32:26 +01:00
Xavier Arteaga 7093a85f81 Refactored FEC directories 2020-11-02 16:32:26 +01:00
Xavier Arteaga 2bca321d4d Fix NEON 16 bit turbodecoder 2020-04-13 20:43:51 +02:00
Xavier Arteaga dc6128617b Fix SSE 16 bit turbodecoder 2020-04-13 20:43:51 +02:00
Xavier Arteaga e832769ae6 Updated copyright 2020-03-16 11:26:06 +01:00
Pedro Alvarez c5979f59eb Clang format UE, eNB and lib (#850) 
* Clang-formated UE, eNB and lib.
* Fixed compiling errors from clang-format.
* Fix linking issues introduced by clang-format
* Fix poor formating in initializing arrays of arrays.
* Fix mistake in conflict resolution on rm_turbo.c
* Re-apply clang format to gtpc_ies.h
 2019-12-16 16:04:22 +01:00
Andre Puschmann e0bd7f156d replace remaining warning macros with pragma message 2019-07-23 15:38:21 +02:00
Ismael Gomez efe74e765b Fix coverty non-inititalized variables in tdec 2019-05-08 10:56:48 +02:00
Andre Puschmann 4b01a2e4a0 update copyright notice 2019-04-29 09:20:02 +02:00
Ismael Gomez 7780b1aba5 add tdd/ca support 2019-04-25 20:57:58 +02:00
Ismael Gomez a8a0c3ebe7 Fixed compilation in zynq 2018-12-12 14:34:13 +01:00
yagoda 3762738bc1 adding windowed neon turbodecoder (can be further optimized) 2018-12-12 11:27:07 +01:00
Ismael Gomez 0294923e2b Merge branch 'next' of github.com:softwareradiosystems/srsLTE into next 2018-09-19 16:42:11 +02:00
Xavier Arteaga a9fcd64b1f Fixes #259: Turbodecoder AVX2 instructions under LV_HAVE_AVX (instead of LV_HAVE_AVX2) 2018-09-19 12:35:37 +02:00
Ismael Gomez 826fbccf11 Fixed memory leaks in new decoder 2018-09-07 14:05:45 +02:00
Ismael Gomez bc9d342959
New optimization on the PHY for both UE and eNodeB (#251) 
* New parallel Turbodecoder implementation in SSE/AVX 16-bit and 8-bit

* Optimised UL Interleaver

* Include TB CRC calculation in FEC encoder

* New threading priorities
 2018-09-04 17:51:35 +02:00
Xavier Arteaga a21db86a78 SCH Codeblock CRC is computed at same time than parity 0 2018-07-17 15:37:57 +02:00
David Rupprecht 9d71bec7b6 Unified include guards 2018-03-31 19:04:04 +02:00
Xavier Arteaga 2a69211f32 SCH does not terminate all codeblocks if one fail. Also, SCH does not decode blocks with CRC=OK 2018-03-01 14:01:36 +01:00
yagoda d749ee66f4 introducing 16 bit viterbi support 2018-01-08 17:05:23 +00:00
Xavier Arteaga 15e75b2c65 Created Bit interleaver object and SSE optimised interleaver 2017-10-23 14:23:03 +02:00
Ismael Gomez db17c67194 Fixed bug in SSE turbo decoder 2017-09-26 17:26:29 +02:00
Ismael Gomez 120544baa0 Remove LV_HAVE_SSE from turbodecoder interface. Fixes #99 2017-09-14 10:09:52 +02:00
Xavier Arteaga 2bf288ff59 Solved infinite loop and/or segmentation fault in the SCH decoder for non-SSE compilation. 2017-08-16 17:39:49 +02:00
Ismael Gomez 9623081da1 Fixed decoder doing more iterations than necessary 2017-06-21 13:22:08 +02:00
Ismael Gomez f00ea8c8ed Integrated AVX2 decoder in PDSCH object. Added inter-frame SSE decoder (not working and not integrated) 2017-06-21 13:21:50 +02:00
Ismael Gomez c1ef9da32a avx turbo decoder working in tests 2017-06-21 13:21:15 +02:00
yagoda 0fe981e608 adding avx viterbi and avx vectors 2017-06-01 12:30:15 +02:00
Andre Puschmann d079d25b2c rename srslte folder and src subfolder 2017-05-30 13:05:04 +02:00