Xavier Arteaga
f261365c91
Initial EVM calculation commit and other easthetic changes
2020-02-28 12:10:32 +01:00
Xavier Arteaga
7a20e3a51e
Added boolean random generator
2020-02-13 10:29:00 +01:00
Xavier Arteaga
9ee651d094
srsLTE: Added set vector zeros for float and cf
2020-01-28 11:22:50 +01:00
Xavier Arteaga
bca5d1a95a
srsLTE: extend viterbi test
2020-01-13 16:20:31 +01:00
Pedro Alvarez
c5979f59eb
Clang format UE, eNB and lib ( #850 )
...
* Clang-formated UE, eNB and lib.
* Fixed compiling errors from clang-format.
* Fix linking issues introduced by clang-format
* Fix poor formating in initializing arrays of arrays.
* Fix mistake in conflict resolution on rm_turbo.c
* Re-apply clang format to gtpc_ies.h
2019-12-16 16:04:22 +01:00
Xavier Arteaga
78dd9d7854
SRSLTE: Added float and complex vector allocation
2019-12-16 12:37:19 +01:00
Xavier Arteaga
8dd1c59e18
Added amplitude and power conversions to dB and viceversa
2019-12-02 09:47:22 +01:00
Xavier Arteaga
423475173d
Refactored magnitude and argument extraction from sf_worker
2019-10-21 16:17:37 +02:00
Xavier Arteaga
10480f62b3
SRSENB: Split sf_worker and cc_worker
2019-10-21 16:17:37 +02:00
Xavier Arteaga
125f1e7282
ZMQ: Split Tx and Rx, bug fixes and clean up
2019-09-20 18:32:38 +02:00
Ismael Gomez
594d62f229
Added read_block function to ringbuffer
2019-06-03 21:39:24 +02:00
Ismael Gomez
19cb5c172b
Added read-and-convert function to ringbuffer
2019-06-03 21:19:06 +02:00
Xavier Arteaga
9c84f8e3fd
SRSLTE: Added Uniform Random vector generator; Delay channel test; Fixed Delay channel SEGFAULT; SRSUE channel unique pointer;
2019-05-30 13:07:23 +02:00
Xavier Arteaga
9ab2b2de81
SRSUE: Created delay channel emulator and added fading to the UE
2019-05-30 13:07:23 +02:00
Andre Puschmann
4edcedd2b3
add helper to create cexp function for entire subframe
2019-05-16 12:32:36 +02:00
Andre Puschmann
e647dac3e4
add simple cross-correlation method
...
- implements a cross-correlation that takes the complex conjugate
of one of the input signals (filter)
- the fft of this input signal is only computed once
2019-05-16 12:32:36 +02:00
Xavier Arteaga
c18a59730c
Solved PHY unit test memory leaks
2019-04-30 15:56:47 +02:00
Xavier Arteaga
baac179d95
Added vector complex sine generator
2019-04-30 15:08:39 +02:00
Xavier Arteaga
7bd3a9a43b
Added ringbuffer read function with timeout
2019-04-30 15:06:39 +02:00
Xavier Arteaga
06a9d8eb6f
Added vector estimate frequency
2019-04-30 14:52:16 +02:00
Xavier Arteaga
4187781268
Random module return pointer object and solved NAN issue
2019-04-30 14:48:13 +02:00
Andre Puschmann
4b01a2e4a0
update copyright notice
2019-04-29 09:20:02 +02:00
Ismael Gomez
7780b1aba5
add tdd/ca support
2019-04-25 20:57:58 +02:00
Xavier Arteaga
ed6b138cb2
Added safe and good quality random generator in phy/utils
2019-04-21 21:41:17 +02:00
yagoda
69dc16c4c8
changes to fix arm compilation
2018-11-27 14:27:59 +01:00
Xavier Arteaga
8c3a0153b9
Added missing AVX512 intrinsics and flags. Fixes #291 .
2018-11-21 18:09:09 +01:00
Andre Puschmann
d981f129e0
Merge branch 'master' into next
2018-09-20 12:54:05 +02:00
IgnasJ
67c8bf1368
Fixes for srsLTE on ARM ( #229 )
...
* Fix ARM NEON code compilation
Fix LV_HAVE_NEON defintion incorrecly used instead of HAVE_NEON in some places
Replace vqabsq_s32 with vabsq_f32 as vqabsq_s32 requires int type (fails to compile)
Fix missing NEON code path in mat.h in srslte_mat_2x2_mmse_csi_simd()
* Fix timestamp overflow issue on 32-bit systems with Soapy driver
'time_t secs' can be 32-bit on some systems. This causes calculation:
'secs * 1000000000;' to overflow.
2018-09-19 17:34:59 +02:00
Ismael Gomez
bc9d342959
New optimization on the PHY for both UE and eNodeB ( #251 )
...
* New parallel Turbodecoder implementation in SSE/AVX 16-bit and 8-bit
* Optimised UL Interleaver
* Include TB CRC calculation in FEC encoder
* New threading priorities
2018-09-04 17:51:35 +02:00
Pedro Alvarez
8017b792cf
Changing SRSLTE_PHY_DEBUG back to SRSLTE_DEBUG.
2018-07-13 11:59:03 +01:00
Pedro Alvarez
7aaa9a1789
Moved srslte_debug_handle_crash to common/debug.c
2018-07-09 14:33:50 +01:00
Pedro Alvarez
96786e96da
Splitting the lib debug into phy and common debug.
2018-07-09 13:15:35 +01:00
Xavier Arteaga
f01f7b4945
Added Vector max abs SIMD function
2018-06-28 09:28:17 +02:00
Ismael Gomez
e18ba937dc
Limit uplink signal normalization to avoid clipping
2018-06-27 16:29:40 +02:00
Xavier Arteaga
681b98ae50
Added vector CFO
2018-05-25 16:06:32 +02:00
Xavier Arteaga
0bc3be7abb
Added DL CSI decoding to TM2 and TM3
2018-04-20 11:27:39 +02:00
Ismael Gomez
384e0f8649
Fixed UL interleaver (missing SIMD deinterleaver)
2018-04-17 19:16:55 +02:00
Andre Puschmann
e7a268d79b
fix SIMD compile issue on NEON
2018-04-04 12:20:32 +02:00
David Rupprecht
9d71bec7b6
Unified include guards
2018-03-31 19:04:04 +02:00
Ismael Gomez
321a750f56
Added features to ringbuffer
2018-03-16 11:23:37 +01:00
Andre Puschmann
57e0c01fc4
check max buffer length in hex print
2018-03-07 21:23:57 +01:00
Xavier Arteaga
ec901373d4
Correction ofo simd.h for AVX512
2018-03-01 14:01:36 +01:00
Xavier Arteaga
6fc9c96c58
Added CSI softbits weightening for Single antenna transmission
2018-02-28 12:07:31 +01:00
Xavier Arteaga
ff5ac85c7d
Added int16 to float SIMD vector function
2018-02-21 14:51:09 +01:00
Ismael Gomez
a279ab47f0
Improved neighbour cell accuracy. Changed RRC to avoid segfault when neighbour cell addition
2018-02-02 19:31:22 +01:00
Xavier Arteaga
c4247c7aca
Fix coverity for complex 16bit
2018-01-31 10:44:52 +01:00
Ismael Gomez
e16839d7a7
Merge branch 'next' into 16bit_avx_viterbi
2018-01-10 16:06:49 +01:00
yagoda
d749ee66f4
introducing 16 bit viterbi support
2018-01-08 17:05:23 +00:00
Xavier Arteaga
a01c5ea08f
Fixes #119 : channel estimation subframe averaging
2018-01-08 12:05:31 +01:00
Ismael Gomez
be880e16f4
Do not include srslte.h in debug
2017-12-29 00:25:31 +01:00