Commit Graph

279 Commits

Author SHA1 Message Date
Ismael Gomez 3828e03f33
Refactor in eNodeB, add channel emulator and fixes in OFDM
* Added channel emulator to srsENB. Added support for fixed delay

* Bug in OFDM when using nonguru mode

* A few changes and refactor in eNodeB
2019-10-23 11:09:39 -05:00
Xavier Arteaga 423475173d Refactored magnitude and argument extraction from sf_worker 2019-10-21 16:17:37 +02:00
Xavier Arteaga 10480f62b3 SRSENB: Split sf_worker and cc_worker 2019-10-21 16:17:37 +02:00
Ismael Gomez 1d83bb08e2 Changes in ACK procedure to support CA. Tested 1 cell in SISO/MIMO 2019-10-14 11:20:35 +02:00
Xavier Arteaga 125f1e7282 ZMQ: Split Tx and Rx, bug fixes and clean up 2019-09-20 18:32:38 +02:00
Xavier Arteaga 6eb26be34e Fixed include headers 2019-09-20 16:20:31 +02:00
Xavier Arteaga 35f85c651c SRSUE: Added SCell synchronizer and measurements based on reference signals 2019-09-20 16:20:31 +02:00
Xavier Arteaga 8e17aba5d8 Improved SSS decoding and improved scell_search_test 2019-09-20 16:20:31 +02:00
Xavier Arteaga dedf0f2f78 Added initial time to delay channel simulator 2019-09-20 16:20:31 +02:00
Xavier Arteaga 368690ea6b SRSUE: Added intra frequency SCell search test 2019-09-20 16:20:31 +02:00
Xavier Arteaga d7c1a0bda9 Added High Speed Train model to channel emulator 2019-09-20 16:20:31 +02:00
Xavier Arteaga db5a21e659 Remove set_master_clock_rate from PHY RF API 2019-09-20 15:43:07 +02:00
Andre Puschmann 4869509c7b add write function to netsource
this is useful for listening sockets to also send responses,
i.e. implement bi-directional communication
2019-09-16 21:39:15 +02:00
Ismael Gomez bfddc55148
RRC-PHY interface (#639)
RRC-PHY interface refactor. Moved RRC-MAC interface to rrc_asn1_utils and created RRC-PHY interface also in rrc_asn1_utils. All ASN1 includes should be made from rrc_asn1_utils only keeping ue_interfaces clean of ASN1

Tested with different common and dedicated configurations (64QAM UL, 256QAM, CA, SRS enabled/disabled, etc)
2019-09-04 16:59:10 +02:00
Andre Puschmann ada4e6644f fixing various issues in NB-IoT sync code detected by Coverity and clang-tidy 2019-08-08 11:12:49 +02:00
Andre Puschmann 80655db4a4 fix missing include in filesink 2019-08-05 11:11:04 +02:00
Andre Puschmann 95a5c2dcdb adding NB-IoT sync code 2019-08-05 11:11:04 +02:00
Ismael Gomez 19066c49ab Ad Rel10 info to dci logs 2019-07-30 18:18:44 +02:00
Andre Puschmann e0bd7f156d replace remaining warning macros with pragma message 2019-07-23 15:38:21 +02:00
Xavier Arteaga 5e49aca835
Merge pull request #570 from softwareradiosystems/feature_256qam_fix
Resource allocation extended tables and PDSCH table 2 for 256QAM
2019-07-12 12:32:47 -04:00
Xavier Arteaga aa6652155c Phy: added ue_ul normalization mode parameter 2019-07-12 13:05:10 +02:00
Xavier Arteaga 20823e191d SRSUE: Added UL force amplitude optional parameter 2019-07-12 13:05:10 +02:00
Guillem Foreman 535325bc37 srsLTE: added resource allocation extended tables for 256QAM and integration with PDSCH test 2019-07-04 15:49:43 +02:00
Ismael Gomez 67b6a40c1b Use correlation for neighbour RSRP measurement 2019-06-18 17:55:41 +02:00
Guillem Foreman 50edd9a325 Initial 256QAM Modem and Demodulator 2019-06-17 18:04:32 +02:00
Joseph Giovatto 0bb7f590b3 Moved include complex.h from header files to impl files to prevent
error /wr to complex.h and c linkage in CentOS 7.
2019-06-14 12:19:57 +02:00
Ismael Gomez 594d62f229 Added read_block function to ringbuffer 2019-06-03 21:39:24 +02:00
Ismael Gomez 19cb5c172b Added read-and-convert function to ringbuffer 2019-06-03 21:19:06 +02:00
Xavier Arteaga b903e61548 Initialise all channel emulator attributes by default 2019-05-31 10:51:11 +02:00
Xavier Arteaga 9c84f8e3fd SRSLTE: Added Uniform Random vector generator; Delay channel test; Fixed Delay channel SEGFAULT; SRSUE channel unique pointer; 2019-05-30 13:07:23 +02:00
Xavier Arteaga 2ffa1f9f1e SRSUE: Added RLF simulator in channel emulator and integrated it in SRSUE. Removed Zeros Command 2019-05-30 13:07:23 +02:00
Xavier Arteaga 7c97e40e63 SRSUE: Improved internal channel emulator help 2019-05-30 13:07:23 +02:00
Xavier Arteaga 9ab2b2de81 SRSUE: Created delay channel emulator and added fading to the UE 2019-05-30 13:07:23 +02:00
Xavier Arteaga 2c78111666 SRSUE: Fixed CLang Tidy in ue.cc 2019-05-27 12:21:57 +02:00
Andre Puschmann 4edcedd2b3 add helper to create cexp function for entire subframe 2019-05-16 12:32:36 +02:00
Andre Puschmann 4f42c0796c add CFO correction method with offset
- CFO correction which allows to specify the offset within
  the correction table to allow phase-continuity across
  multi-subframe transmissions (NB-IoT)
2019-05-16 12:32:36 +02:00
Andre Puschmann e647dac3e4 add simple cross-correlation method
- implements a cross-correlation that takes the complex conjugate
  of one of the input signals (filter)
- the fft of this input signal is only computed once
2019-05-16 12:32:36 +02:00
Andre Puschmann 13c17ad9e7 add text output capabilities to filesink 2019-05-16 12:32:36 +02:00
Ismael Gomez efe74e765b Fix coverty non-inititalized variables in tdec 2019-05-08 10:56:48 +02:00
Ismael Gomez 786830daf3 Fix minor issues for TDD 2019-05-02 19:31:46 +02:00
Xavier Arteaga c18a59730c Solved PHY unit test memory leaks 2019-04-30 15:56:47 +02:00
Xavier Arteaga baac179d95 Added vector complex sine generator 2019-04-30 15:08:39 +02:00
Xavier Arteaga 7bd3a9a43b Added ringbuffer read function with timeout 2019-04-30 15:06:39 +02:00
Xavier Arteaga a1a797589a Added UE synchronization error metric (hard-coded disabled by default) 2019-04-30 15:02:08 +02:00
Xavier Arteaga 06a9d8eb6f Added vector estimate frequency 2019-04-30 14:52:16 +02:00
Xavier Arteaga 4187781268 Random module return pointer object and solved NAN issue 2019-04-30 14:48:13 +02:00
Ismael Gomez 47acbc1e08 Compute per-antenna and per-port chest metrics in chest_res 2019-04-29 15:25:01 +02:00
Andre Puschmann 4b01a2e4a0 update copyright notice 2019-04-29 09:20:02 +02:00
Ismael Gomez 7780b1aba5 add tdd/ca support 2019-04-25 20:57:58 +02:00
Andre Puschmann f2266bb264 add uint64 (sample based) time stamp helpers 2019-04-22 15:35:26 +02:00