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srsLTE
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5,173 Commits 3 Branches 23 Tags 67 MiB
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5173 Commits

Author SHA1 Message Date
Ismael Gomez cc7dfefa1a
Fix logic for UL HARQ retx causing Msg3 adaptive retx to be identified as a new transmission 2020-01-28 21:33:10 +01:00
Francisco Paisana af0b80b0a7 fix test for prb==6 and accidental adaptive retx in UL 2020-01-28 17:15:23 +00:00
Francisco Paisana a9b8c3fd55 fix msg3 prb limit for prb==6. It has to collide with PUCCH 2020-01-28 17:15:23 +00:00
Francisco Paisana 39fff9ed68 fix potential bug with grouping of RARs with same RA-RNTI but different prach_tti. The scheduler might not clear the old tti on time before the grouping. 2020-01-28 17:15:23 +00:00
Francisco Paisana de195e9521 changed the RAR schedule to support the allocation of nof_grants lower than the current nof_grants in the queue with same ra-rnti 2020-01-28 17:15:23 +00:00
Francisco Paisana e9ca6e3d52 fix rar size 2020-01-28 17:15:23 +00:00
Francisco Paisana a74dcd947f changed rar/msg3 scheduling to accommodate multiple rars per TTI 2020-01-28 17:15:23 +00:00
Francisco Paisana dc782e514b change the naming from tti --> sf for scheduling operations specific to a subframe 2020-01-28 17:15:23 +00:00
Andre Puschmann 81b46723f6 adding NPDCCH 2020-01-28 17:46:54 +01:00
Andre Puschmann 073c57dc3d add NB-IoT DCI formats and move define to phy_common 2020-01-28 17:46:54 +01:00
Merlin Chlosta c2e95b1e2a Reject TAU to force UE to reconnect 2020-01-28 11:50:28 +00:00
Xavier Arteaga a6105a3020 SRSENB: made possible custom UL/DL frequencies for each carrier 2020-01-28 11:22:50 +01:00
Xavier Arteaga 604e61810e SRSENB: moved set tx/rx frequency to txrx class 2020-01-28 11:22:50 +01:00
Xavier Arteaga c5dcc5e95b SRSENB: moved backwards compatibility enb conf check 2020-01-28 11:22:50 +01:00
Xavier Arteaga c2b23d273b SRSENB: keep backwards compatibility of enb.conf 2020-01-28 11:22:50 +01:00
Xavier Arteaga 5dcb6b5960 SRSENB: Set default PRACH sequence root index in SIB2 2020-01-28 11:22:50 +01:00
Xavier Arteaga 31dffb785f SRSENB: fix segmentation fault 2020-01-28 11:22:50 +01:00
Xavier Arteaga 9a853d8692 SRSUE: fix compilation 2020-01-28 11:22:50 +01:00
Xavier Arteaga 922481659b SRSENB: minor corrections 2020-01-28 11:22:50 +01:00
Xavier Arteaga 9ee651d094 srsLTE: Added set vector zeros for float and cf 2020-01-28 11:22:50 +01:00
Xavier Arteaga b08c1f003e SRSENB: enabled multiple cells from rr.cfg 2020-01-28 11:22:50 +01:00
Andre Puschmann e5b1673b3b move PCAP into own compilation unit 
this removes inline keyword from PCAP functions and puts all functions
into own C file

before forced inlining caused an issue when compiling for ARM on Ubuntu 19.10 on the RPi4
using gcc version 9.2.1
 2020-01-24 13:15:45 +01:00
Francisco Paisana 883c2900c8 fix issue with future clear 2020-01-24 10:10:27 +00:00
Francisco Paisana 91d83fc20d different way to retrieve a proc future 2020-01-24 10:10:27 +00:00
Ismael Gomez 171e26ee68 Add checks more checks for UL grants 2020-01-24 10:40:39 +01:00
Xavier Arteaga dcb3bc0135 srsLTE: apply CLang Format in sch.c 2020-01-24 10:40:39 +01:00
Xavier Arteaga 905273b36a srsLTE: more memory corruption counter measures in ul_sch_encode 2020-01-24 10:40:39 +01:00
Xavier Arteaga 3b138b25c6 srsLTE: UL SCH Beta offset access fortification 2020-01-24 10:40:39 +01:00
Xavier Arteaga 8b6ba1aacf srsLTE: removed overlap bytes check in RLC AM 2020-01-24 10:36:41 +01:00
Xavier Arteaga 5872e763bf SRSLTE: RLC AM remove completely overlapped segments 2020-01-24 10:36:41 +01:00
Xavier Arteaga 39bec9aab1 SRSLTE: fix RLC reordering and segment overlaping 2020-01-24 10:36:41 +01:00
Xavier Arteaga d3537fc340 srsLTE: expanded RLC stress test with the addition of multiple PDU per TTI in reverse order 2020-01-24 10:36:41 +01:00
Francisco Paisana 5ae3afd2b8 created cbit_ref for unpacking const buffers 2020-01-23 12:22:19 +00:00
Francisco Paisana 58e555e86c update all asn1 files 2020-01-23 12:22:19 +00:00
Francisco Paisana 5468189cd9 fix some variables' naming (e.g. x2_ap -> x2ap, e_rab -> erab) 2020-01-21 00:58:19 +00:00
Francisco Paisana 2a83eee0ee fix security key setup 2020-01-21 00:58:19 +00:00
Francisco Paisana 83758e4f55 fix integrity/ciphering bit setting 2020-01-21 00:58:19 +00:00
Francisco Paisana ee24b59924 converted s1ap to new s1ap asn1 lib. Cleaned up bitstring packing/unpacking and bitstring types 2020-01-21 00:58:19 +00:00
Francisco Paisana 25bb36cdc3 converted ho preparation to new s1ap asn1 lib. Extended s1ap test 2020-01-21 00:58:19 +00:00
Francisco Paisana 6d1172de71 converted enbstatustransfer and ulnastransport to the new s1ap asn1 lib 2020-01-21 00:58:19 +00:00
Francisco Paisana 40baed0b3e converted uecontextmodificationresponse, initial setup request, and s1setup request to the new s1ap asn1 lib 2020-01-21 00:58:19 +00:00
Francisco Paisana b1c5bf7185 reverse addrv4 packing in s1ap 2020-01-21 00:58:19 +00:00
Francisco Paisana a740fcb954 bug - wrong ue context release cmd 2020-01-21 00:58:19 +00:00
Francisco Paisana 3066b404ac fix integer ext asn1 generation 2020-01-21 00:58:19 +00:00
Francisco Paisana c87de9d889 added s1ap_asn1_test 2020-01-21 00:58:19 +00:00
Francisco Paisana b6c53d786b updated s1ap rrc interface with new asn1 lib types 2020-01-21 00:58:19 +00:00
Francisco Paisana 61b3e6b57e imported new s1ap asn1 lib 2020-01-21 00:58:19 +00:00
Andre Puschmann b43c531c15 adding CMW500 SLSS capture and enable PSBCH test 2020-01-14 21:23:43 +01:00
Andre Puschmann d98bc71057 fix PSBCH and use UL-SCH interleaver 2020-01-14 21:23:43 +01:00
Andre Puschmann 9012ca5faa fix PSBCH tests 2020-01-14 21:23:43 +01:00