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srsLTE
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317 Commits

Author SHA1 Message Date
Xavier Arteaga d49734b1bc SRSENB: Refactor to accomodate 5G NR 2021-06-28 00:27:36 +02:00
Xavier Arteaga b1e4720721 SRSUE/SRSENB: added tx_enable flag in worker_end 2021-06-21 18:07:53 +02:00
Xavier Arteaga 027201d457 SRSUE/SRSENB: Refactor NR workers to generalise lower PHY 2021-06-21 18:07:53 +02:00
Xavier Arteaga fc5d069743 SRSUE: Default PHY measurements to NAN 2021-06-14 09:21:29 +02:00
Xavier Arteaga a31f3d42ce Added RF NR search tool and added baseband file 2021-06-08 14:55:12 +02:00
Xavier Arteaga 3a011155db SRSUE: Make sure PHY reset is done when SYNC is IDLE 2021-06-08 10:21:38 +02:00
Xavier Arteaga d74f70289e SRSUE: fix last reported RI state 2021-06-02 18:12:36 +02:00
Andre Puschmann b0a2f31478 prach: protect configuration and state getters with mutex 
purely TSAN with unit-test based approach that protects
the state getters and configuration routines with a mutex
 2021-06-02 09:36:44 +02:00
Andre Puschmann d2ec3ca5e1 intra_measure_base: fix race detected with TSAN 
use mutex to protect state getters
 2021-06-02 09:36:44 +02:00
Andre Puschmann 98a91a2057 sync: protect sync_state, access ue_sync object only from one thread 
races detected with TSAN, primarily the ue_sync object which isn't
thread-safe is accessed by all workers to set the CFO and by the
sync thread to receive samples (which read the CFO).

The patch introduces shadow variables that are updates from the
main thread before/after the sync is executed. The atomic shadow
variables can then be read from otherthreads without holding a
mutex, i.e. blocking the sync.
 2021-06-02 09:36:44 +02:00
Xavier Arteaga 5c55ff24ec Minor UE aesthetical changes 2021-05-31 10:48:17 +02:00
Xavier Arteaga 44b6a2b55f Fix SYNC wait for IDLE if the state is reached 2021-05-31 10:48:17 +02:00
Xavier Arteaga 807b60988d Wait for PHY workers to transmit before considering SYNC in IDLE 2021-05-31 10:48:17 +02:00
Xavier Arteaga 7185ec6beb PHY CC configuration is stashed and applied in the next TTI 2021-05-31 10:48:17 +02:00
Xavier Arteaga 235a664120 SRSUE: Removed PUSCH-DMRS/SRS pregeneration methods 2021-05-31 10:48:17 +02:00
Xavier Arteaga cc2a6dc269 Review cell selection and SCell configuration during HO 2021-05-31 10:48:17 +02:00
Xavier Arteaga 65d51f5855 Fix unitialised value 2021-05-31 10:48:17 +02:00
yagoda 9501283c1c fixing support for extended Cyclic Prefix 
small cosmetic fixes of CP code
 2021-05-20 18:16:15 +02:00
Xavier Arteaga 5eadc06dd4 Intra-frequency miscellanous changes 2021-05-18 18:41:03 +02:00
Xavier Arteaga 170fbefbf5 Avoid SCell receiver to copy 2021-05-18 18:41:03 +02:00
Xavier Arteaga d39402ed54 Added TTI trigger condition to intra-frequency measurement base 2021-05-18 18:41:03 +02:00
Xavier Arteaga ac9dc6f31d Compute Performance 2021-05-18 18:41:03 +02:00
Xavier Arteaga fb7623f5b6 Initial intra frequency NR cell search and test 2021-05-18 18:41:03 +02:00
Xavier Arteaga 60015e7ceb Made intra frequency cell search and measurment generic 2021-05-18 18:41:03 +02:00
Xavier Arteaga a57336d64f Integrate periodic SSB measurement in SRSUE and fix related defects 2021-05-13 07:55:46 +02:00
Xavier Arteaga 1396c2a1e2 Mulpiple CSI measurement fixes. Channel and sync metrics from CSI measurements 2021-05-07 09:43:11 +02:00
Xavier Arteaga 653177ca7c SRSUE: Refactored work_dl for NR. Added NZP-CSI-RS measurement 2021-05-07 09:43:11 +02:00
Andre Puschmann 598594c51a all: bunch of pass by const& changes suggested by LGTM 2021-04-29 10:00:09 +02:00
Matan Perelman 7ee52dc676 srsUE: Add option to filter N_id_2 / PSS to configuration 2021-04-23 20:31:36 +02:00
Xavier Arteaga ab6a5ef17a Added NR DCI conversion to string for formats 1_0 and 1_1 2021-04-22 14:16:46 +02:00
Xavier Arteaga 407903e0d6 SRSUE: refactor carrier setting for accepting a dynamic carrier configuration 2021-04-20 21:50:10 +02:00
David Rupprecht f42d4dbc28 Refactored carrier config 2021-04-19 12:13:37 +02:00
Andre Puschmann edd150b29f fix PID not being set when reading pending UL grant 
this should fix #2679
 2021-04-18 15:12:22 +02:00
Xavier Arteaga 01ce0718be NR-PUSCH RE mapping correction and NR-SCH detailed grant information 2021-04-17 15:51:11 +02:00
Andre Puschmann b9ae064338 mac_nr: add DL HARQ 
this commit adds a complete DL HARQ entity to the MAC of the UE.
It also refactors demux into an own class and adapts the PHY-MAC
interface to use the new MAC capabilities.
 2021-04-16 15:32:09 +02:00
Xavier Arteaga b5e879db47 SRSUE: review metrics interfaces 2021-04-13 16:02:53 +02:00
Xavier Arteaga 044da18db9 SRSUE: Reviewed PHY metrics getter 2021-04-13 16:02:53 +02:00
Xavier Arteaga 2f453b43ba Initial NR PHY interface 2021-04-13 16:02:53 +02:00
Xavier Arteaga db1a1c059c NR PHY workers TTI synchronization between DL and UL work 2021-04-08 11:39:55 +02:00
Xavier Arteaga 991c6e7016 Refactored NR HARQ-ACK feedback enqueue 2021-04-08 11:39:55 +02:00
Xavier Arteaga 49731ab5a1 Initial NR-DCI refactor 
Added NR DCI 1_1 size

Several DCI NR fixes
 2021-04-07 16:57:12 +02:00
Xavier Arteaga dee2ec30cd SRSUE: use new MAC interface for NR SR procedure 2021-04-07 14:16:46 +02:00
Xavier Arteaga 01990c2e1d SRSUE: Add PHY-MAC SR related interfaces 2021-04-07 14:16:46 +02:00
Xavier Arteaga 5bdf2c93b3 Initial NR PDSCH CSI-RS RE skip and other changes 2021-03-24 09:06:26 +01:00
Xavier Arteaga 7704c09ce2 Fix typos 2021-03-23 15:11:46 +01:00
Codebot 4523ee6087 rename srsLTE to srsRAN 2021-03-21 21:47:01 +01:00
Xavier Arteaga 4ae194581f SRSUE: Adjustments in distance and speed estimations 2021-03-19 11:47:09 +01:00
Xavier Arteaga 2782d96170 SRSUE: compute speed from TA commands 2021-03-19 11:47:09 +01:00
Francisco 3e9f93eb8a refactor - remove old log_filter and logmap libraries from the codebase 2021-03-11 20:10:54 +00:00
Xavier Arteaga 9dffad87f2 Initial UCI bits multiplexing in PUSCH 2021-03-09 17:05:08 +01:00