yagoda
260648582e
small formatting fix
2020-01-14 16:53:57 +01:00
yagoda
fc1c506d1f
refactoring TA command structure in UE
2020-01-14 16:53:57 +01:00
yagoda
2db90c5dd3
allowing TA CE commands in Msg4
2020-01-14 16:53:57 +01:00
Xavier Arteaga
bca5d1a95a
srsLTE: extend viterbi test
2020-01-13 16:20:31 +01:00
Andre Puschmann
d045213fb9
fixing bug in RRC measurement when receiving periodic config
...
in the UE conformance testing we've spotted an issue
where an event was evaluated even though the trigger type for
the report was periodic which caused an exception in RRC
2020-01-08 17:34:06 +01:00
Francisco Paisana
f280720564
this fix was detected by Syed in the mailing list
2020-01-08 13:45:26 +01:00
Francisco Paisana
182a721329
fix some integer printf potential warnings
2020-01-07 21:33:31 +01:00
Xavier Arteaga
8a666ee455
srsLTE: Increase UHD default sampling rate. Enables warning if USB2 is used.
2020-01-07 11:16:37 +01:00
Andre Puschmann
be4ba504bd
fix another bunch of uninit memory in tests, and one in srsENB
2020-01-07 11:12:34 +01:00
Andre Puschmann
0554064bf0
refactor NPBCH init, fix memset with zero length
2020-01-07 11:12:34 +01:00
Andre Puschmann
0394d21dd2
fix uninit memory in chest sl test when not test is executed
2020-01-07 11:12:34 +01:00
Andre Puschmann
369cde2989
add coverity badge
2020-01-07 11:12:34 +01:00
Andre Puschmann
bc6aa1a166
fixing PDCP call in TTCN3 SS
...
this fixes an issue introduced in 6ec573987a
2020-01-07 11:05:20 +01:00
Andre Puschmann
4d9a092bb4
adding LGTM code quality badge
2020-01-02 23:25:06 +01:00
Andre Puschmann
06afe74bef
add virtual dtor in sched_interface base class
2019-12-30 22:15:31 +01:00
Andre Puschmann
e24d33562a
disabling ue_phy_test temporarily
2019-12-30 00:16:59 +01:00
Andre Puschmann
6ec573987a
remove default value for 'blocking' param from pdcp::write_sdu()
...
there were two defaults and one was shadowing the other. This
commit removes both defaults and uses blocking-mode for RRC
calls to PDCP in the UE. The eNB write_sdu() uses the non-blocking
mode by default. We have to review the eNB's RRC perhaps and use blocking
there too and non-blocking only for data plane
2019-12-29 23:45:37 +01:00
Andre Puschmann
8f419c035b
fixing snprintf issue where return value was used for length calculation
2019-12-29 23:38:27 +01:00
Andre Puschmann
1155adf007
fixing printfs in asn1_utils
2019-12-29 23:37:49 +01:00
Andre Puschmann
bf1982e28d
bump version and add changelog for 19.12
2019-12-26 22:24:39 +01:00
Andre Puschmann
0bd493b567
call byte_buffer cleanup in two enb tests and fix typo
2019-12-26 22:06:34 +01:00
Andre Puschmann
c54fa568be
fixing typo in CMake for PHY DL test
2019-12-24 10:51:48 +01:00
Andre Puschmann
03512547f5
add test for Sidelink channel estimator
2019-12-23 23:08:32 +01:00
Xavier Arteaga
0912701cb0
srsLTE: sidelink minor corrections
2019-12-23 23:08:32 +01:00
Andre Puschmann
7de51c8236
refactor Sidelink PSBCH and DMRS code
2019-12-23 23:08:32 +01:00
Andre Puschmann
e5609e299d
fix UE PHY test compilation on 32 bit systems
2019-12-23 23:06:52 +01:00
Xavier Arteaga
36b2102de8
SRSUE: avoid testing ue_phy_test
2019-12-23 22:57:37 +01:00
Xavier Arteaga
307c27dc30
srsLTE: ZMQ renamed struct field
2019-12-23 22:57:37 +01:00
Xavier Arteaga
2d98f92823
srsLTE: upgraded ZMQ for supporting frequency selection
2019-12-23 22:57:37 +01:00
Xavier Arteaga
0134d47ee8
SRSUE: clear EARFCN list if the list is not empty
2019-12-23 22:57:37 +01:00
Xavier Arteaga
11eafa8ab4
srsLTE: FFTW wisdom gets loaded and saved by default
2019-12-23 22:57:37 +01:00
Xavier Arteaga
892ece8cdd
srsLTE: reduce number of SF for rf_zmq_test
2019-12-23 22:57:37 +01:00
Xavier Arteaga
c92dce71b7
srsLTE: AGC only uses boundaries for requesting gain to Radio
2019-12-23 22:57:37 +01:00
Xavier Arteaga
097f492430
srsLTE: fix ZMQ RF module gain
2019-12-23 22:57:37 +01:00
Andre Puschmann
9f281b621e
Merge pull request #880 from softwareradiosystems/next_merge_master3
...
Merge master into next before merge (after 32bit fixes)
2019-12-23 22:56:55 +01:00
Andre Puschmann
9e1b8bc95e
disabling certain PHY DL tests that aren't working on ARM due to Turbo issues
2019-12-20 18:54:41 +01:00
Andre Puschmann
30eb808015
Merge branch 'master' into next_merge_master3
2019-12-20 17:49:55 +01:00
Pedro Alvarez
6d4303cd94
Added option to force 32bit compilation (useful for debug). Fixed various warnings when compiling in a 32 bit arch.
2019-12-20 17:33:55 +01:00
Xavier Arteaga
a96a7fe20a
Removed srsue_phy from thread_test
2019-12-19 13:01:05 +01:00
Xavier Arteaga
089a5e21dc
Label test that memcheck is excessively long
2019-12-19 13:01:05 +01:00
Xavier Arteaga
b1c4cd7189
srsLTE: removed timout in tti semaphore
2019-12-19 13:01:05 +01:00
Xavier Arteaga
6bef91a788
srsLTE: TTI sempahore wait for all resuses wait code.
2019-12-19 13:01:05 +01:00
Xavier Arteaga
ad46fc006f
srsLTE: Fix thread memory leak. Moved test. Fix CLang warnings.
2019-12-19 13:01:05 +01:00
Xavier Arteaga
a7e92c384e
srsLTE: applied minor comments in tti semaphore
2019-12-19 13:01:05 +01:00
Xavier Arteaga
d2c6dda025
SRSUE: Avoid sf_worker return without calling worker_end
2019-12-19 13:01:05 +01:00
Xavier Arteaga
447ede327c
srsLTE: removed unused argument
2019-12-19 13:01:05 +01:00
Xavier Arteaga
384c420c7c
SRSUE: fix phy workers concurrency issue
2019-12-19 13:01:05 +01:00
Xavier Arteaga
173defd676
srsLTE: Execute load and save FFTW wisdom automatically
2019-12-19 13:01:05 +01:00
Xavier Arteaga
dc7ac0a8d6
SRSUE: Updated PHY test
2019-12-19 13:01:05 +01:00
Xavier Arteaga
6895bfa70a
SRSUE initial PHY worker test
2019-12-19 13:01:05 +01:00