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471 Commits

Author SHA1 Message Date
Xavier Arteaga 5258f27490 Fix start-of_burst for PRACH Test USRP 2020-07-28 09:31:34 +02:00
Xavier Arteaga fda1d040e7 SRSENB: implement PUSCH threshold for UCI bits 2020-07-27 16:44:15 +02:00
Ismael Gomez 1eaf7efab0 Fix UL adaptive retx rv index 2020-07-15 18:24:23 +02:00
Xavier Arteaga 729986f259 srsLTE: Added PUCCH format 3 valid correlation 2020-07-15 07:34:14 +02:00
Andre Puschmann 9f98bb3f54 disable prach_test_usrp compilation if no RF is selected 2020-06-11 11:07:06 +02:00
Xavier Arteaga 258f7a180c Improved PRACH test USRP 2020-06-10 11:44:44 +02:00
Xavier Arteaga 9d5c2d70df SRSENB: Fix PHY reconfiguration for HO 
Minimal aesthetic change
 2020-05-19 16:38:55 +02:00
faluco 340ec61e8e Code review. 2020-05-07 18:53:40 +02:00
faluco e28d9bb473 Fix for 1492950. 2020-05-07 18:53:40 +02:00
Andre Puschmann a0665b721e prach: fix illegal mem access when wrong configs are passed 
this fixes Coverity issue 1480095
 2020-05-07 13:25:02 +02:00
faluco d9529a3a8f Fix for 1480071. 2020-05-07 10:12:29 +02:00
faluco 7ff251f112 - Fixed warnings caught by Clang 9.0.0 2020-05-07 10:10:24 +02:00
Andre Puschmann f5d55847c2 nbiot: add r14 parameter to NPDSCH eNB and file test and make it the default 
also add skip SIB2 option to UE example
 2020-05-04 17:52:21 +02:00
Andre Puschmann 92fb6a94f4 npdsch: use r14 bcch sequence when encoding SIB 2020-05-04 17:52:21 +02:00
Xavier Arteaga d94078d543 Minor changes 
Fix UE sequence generation

minor change
 2020-05-01 21:07:33 +02:00
Xavier Arteaga 2d39c7261c renamed vector copy prefix from to 2020-04-30 13:43:17 +02:00
Andre Puschmann 6a764ae87c psbch: change memcpy() to srs_vec alternative 2020-04-29 15:31:29 +02:00
Xavier Arteaga 9d0a3268e8 Added DL channel estimator algorithm options 2020-04-28 17:26:01 +02:00
yagoda 1f6d5fd23a small fixed to limiting prach search 2020-04-28 14:40:20 +02:00
yagoda faf1cf6975 limiting prach search space to number of prachs set in sib2 2020-04-28 14:40:20 +02:00
Xavier Arteaga b9583d4182 Fix Extended CSI request bits in DCI 2020-04-27 21:03:44 +02:00
Andre Puschmann 8d52343c72 pssch: address review comments 2020-04-27 21:01:46 +02:00
Andre Puschmann d6e0153b40 sci: add SCI format 1 transmission format flag 2020-04-27 21:01:46 +02:00
Andre Puschmann 7109379d83 pssch_test: fix memleak 2020-04-27 21:01:46 +02:00
Andre Puschmann edcf6d1e51 pssch_test: zero sample vectors after alloc 2020-04-27 21:01:46 +02:00
Andre Puschmann 723503fded pssch_test: disable PSSCH tests that currently fail decoding TB 2020-04-27 21:01:46 +02:00
Andre Puschmann 28de7a9c93 pssch_test: expose start SF index as parameter and use helper to calc PRB 2020-04-27 21:01:46 +02:00
Andre Puschmann 955960f22d write decoded PSSCH symbols to file with PHY debug enabled 2020-04-27 21:01:46 +02:00
luis_pereira87 baf0ad5bf4 PSSCH implementation 2020-04-27 21:01:46 +02:00
Andre Puschmann 13b59b42c7 npdcch: replace fixme with todo 2020-04-24 12:21:17 +02:00
Xavier Arteaga 89dcd6339f More LGTM fixes 2020-04-22 18:01:43 +02:00
Xavier Arteaga 77d5dedddc Fix LGTM warnings and recommendations 2020-04-22 18:01:43 +02:00
Xavier Arteaga 562590e595 Fix LGTM warnings 2020-04-22 18:01:43 +02:00
Xavier Arteaga a7525d3e12 Fix somememory leaks 2020-04-20 16:10:27 +02:00
Xavier Arteaga e6792cf9b7 Refactored OFDM and added half CP window offset in UL Demodulator 2020-04-20 16:10:27 +02:00
Andre Puschmann c145d80547 nbiot: address review comments 2020-04-17 23:12:11 +02:00
Andre Puschmann e76e31e652 adding NB-IoT DL shared channel, UE DL object and PHY examples 2020-04-17 23:12:11 +02:00
luis_pereira87 653a1e0619 Added PSBCH Extended CP 2020-04-15 21:59:14 +02:00
Andre Puschmann 8e7b49b949 pscch: fix PSCCH memory allocation and failing tests 
the missing mem zero'ing caused the unit test to fail on some
machines where the memory wasn't initialized by default.

for d and d16 allocate the maximum number of bits, not
only the max length of a DCI
 2020-04-15 13:42:26 +02:00
Xavier Arteaga 11a8db202a Removed PDSCH traces 2020-04-15 11:39:57 +02:00
Xavier Arteaga 210ce0ac48 Fix modulation table 2020-04-15 11:39:57 +02:00
Xavier Arteaga 93771126ed More clear PDSCH CP function 2020-04-15 11:39:57 +02:00
Xavier Arteaga a0fb150e58 Fix memory issues in PSCCH decoder 2020-04-13 20:39:15 +02:00
Xavier Arteaga 5b7493cab5 Added 256QAM modulation tables to scheduler 2020-04-10 17:48:53 +02:00
Xavier Arteaga 784bf81a1a Multiple fixes HARQ ACK/NACK feedback and CSI reporting for MIMO and CA 2020-04-10 15:58:25 +02:00
Tiago Alves 47145c18b7 sidelink: refactor channel estimation 2020-04-10 14:58:18 +02:00
Xavier Arteaga 9a2b0b7cc7 Standard vector allocation uses vector library 2020-04-02 20:49:58 +02:00
Xavier Arteaga 2c93f6d20a Fix PUCCH DMRS correlation 2020-03-22 08:49:12 +01:00
Xavier Arteaga f3f03ad12d SRSUE PHY: Add extra debugging information to errors 2020-03-18 16:12:51 +01:00
Xavier Arteaga 0408d357a7 Minor fixes 2020-03-16 15:07:12 +01:00
Xavier Arteaga e832769ae6 Updated copyright 2020-03-16 11:26:06 +01:00
Xavier Arteaga 834a081c09 Add EPRE measurement to PUSCH decoder 2020-03-13 14:01:58 +01:00
Francisco Paisana fad897cb35 DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations 2020-03-10 22:06:07 +00:00
Xavier Arteaga 002a68e183 SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold 2020-03-10 09:19:54 +01:00
Xavier Arteaga 64caa4321b Fix UL control decoding. Some minor aesthetic changes. 2020-03-10 09:19:54 +01:00
Xavier Arteaga 5aff042c6e Avoid repeated PDCCH locations 2020-03-06 13:58:49 +01:00
Xavier Arteaga 02dd5bd8c4 Fix PUSCH segfault 2020-03-06 13:58:49 +01:00
Xavier Arteaga da701cd82b SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup. 2020-03-06 13:58:49 +01:00
Xavier Arteaga 47cbbcbd57 Improve PUSCH UCI decoder 2020-03-06 13:58:49 +01:00
Andre Puschmann 4553ce7ff1 temporarily disable SCI checks for PSCCH file tests 2020-03-06 11:20:11 +01:00
Francisco Paisana a6320f93b8 remove remaining const_casts 2020-03-05 20:23:07 +00:00
Francisco Paisana ec1f1cc677 remove const_casts from scheduler. Fix ODR issue 2020-03-05 20:23:07 +00:00
Andre Puschmann 3adfbcadbc disbable three Sidelink tests that are currently failing on AVX2 2020-03-03 16:22:51 +01:00
Andre Puschmann e4b5fa122f add set_cell() call to PSCCH and allocate for max PRB in pscch_init() 2020-03-03 16:22:51 +01:00
Andre Puschmann 151ce10a96 remove SL specific CFO correction method 2020-03-03 16:22:51 +01:00
Andre Puschmann 09f7355870 use srslte_cell_sl_t in PSCCH 2020-03-03 16:22:51 +01:00
Andre Puschmann 14000f7ae7 adding phy_common_sl.{c,h} 2020-03-03 16:22:51 +01:00
Andre Puschmann d85339187a pass offset parameter to CMW capture to compensate SFO 2020-03-03 16:22:51 +01:00
Tiago Alves cabd9ae742 baseline implementation of pscch 2020-03-03 16:22:51 +01:00
Xavier Arteaga a4135e41a5 Added PUCCH collision checker 2020-03-02 12:19:09 +01:00
Xavier Arteaga 2fc0832f05 Addition of DL HARQ-ACK generation procedure for eNb DL and minor aesthetic changes 2020-03-02 12:19:09 +01:00
Xavier Arteaga e621853566 Minor aesthetics changes 2020-02-28 12:10:32 +01:00
Xavier Arteaga f261365c91 Initial EVM calculation commit and other easthetic changes 2020-02-28 12:10:32 +01:00
Ismael Gomez 72e6fa40fc Fix multiple issues with DCI sizes when using CA. 2020-02-17 11:21:34 +01:00
Ismael Gomez d8d10daebe
Fix bug in SRS using the previous grant to compute collision with PUSCH (#958) 2020-02-16 21:30:04 +01:00
Xavier Arteaga 6c960da808 Fix UE's SR transmission 2020-02-13 16:10:26 +01:00
Xavier Arteaga 385102fa2d SRSENB: minor format, renaming and interface changes 2020-02-13 10:29:00 +01:00
Xavier Arteaga 67c07dfb56 Moved UL/DL PUCCH procedures into pucch_proc 2020-02-13 10:29:00 +01:00
Xavier Arteaga bc10943a2b Added get max TB from DCI format 2020-02-13 10:29:00 +01:00
Xavier Arteaga 231431f569 SRSENB: enabled CA PUCCH decode in eNb 2020-02-13 10:29:00 +01:00
Xavier Arteaga f6cf7780e8 Minor aesthetic corrections 2020-02-13 10:29:00 +01:00
Xavier Arteaga d66fdefbb3 Added more docs to PUCCH 1b CS resource selection 2020-02-13 10:29:00 +01:00
Xavier Arteaga b4d1f737f3 Minor PUCCH 1b CS resouce selection fix 2020-02-13 10:29:00 +01:00
Xavier Arteaga cd12307c91 SRSLTE: fix PUCCH 1b Channel selection resource 2020-02-13 10:29:00 +01:00
Xavier Arteaga 86a62c3584 removed unreachable code 2020-02-13 10:29:00 +01:00
Xavier Arteaga 1f762844ee Initial PUCCH format 3 decoder 2020-02-13 10:29:00 +01:00
Xavier Arteaga 35f4e5d69a Initial PUCCH 1B with channel selection 2020-02-13 10:29:00 +01:00
Xavier Arteaga f8294fb9df SRSUE: RRC measurements refactor and more fixes 2020-02-03 12:51:46 +01:00
Andre Puschmann 81b46723f6 adding NPDCCH 2020-01-28 17:46:54 +01:00
Andre Puschmann 073c57dc3d add NB-IoT DCI formats and move define to phy_common 2020-01-28 17:46:54 +01:00
Ismael Gomez 171e26ee68 Add checks more checks for UL grants 2020-01-24 10:40:39 +01:00
Xavier Arteaga dcb3bc0135 srsLTE: apply CLang Format in sch.c 2020-01-24 10:40:39 +01:00
Xavier Arteaga 905273b36a srsLTE: more memory corruption counter measures in ul_sch_encode 2020-01-24 10:40:39 +01:00
Xavier Arteaga 3b138b25c6 srsLTE: UL SCH Beta offset access fortification 2020-01-24 10:40:39 +01:00
Andre Puschmann b43c531c15 adding CMW500 SLSS capture and enable PSBCH test 2020-01-14 21:23:43 +01:00
Andre Puschmann d98bc71057 fix PSBCH and use UL-SCH interleaver 2020-01-14 21:23:43 +01:00
Andre Puschmann 9012ca5faa fix PSBCH tests 2020-01-14 21:23:43 +01:00
Andre Puschmann 2e7a357226 expose UL-SCH interleaver to use in Sidelink 2020-01-14 21:23:43 +01:00
Andre Puschmann 0554064bf0 refactor NPBCH init, fix memset with zero length 2020-01-07 11:12:34 +01:00
Xavier Arteaga 0912701cb0 srsLTE: sidelink minor corrections 2019-12-23 23:08:32 +01:00
Andre Puschmann 7de51c8236 refactor Sidelink PSBCH and DMRS code 2019-12-23 23:08:32 +01:00
Xavier Arteaga 36b2102de8 SRSUE: avoid testing ue_phy_test 2019-12-23 22:57:37 +01:00
Xavier Arteaga 11eafa8ab4 srsLTE: FFTW wisdom gets loaded and saved by default 2019-12-23 22:57:37 +01:00
Xavier Arteaga 089a5e21dc Label test that memcheck is excessively long 2019-12-19 13:01:05 +01:00
Tiago Ferreira Alves 3fed21ce3e PSSS and SSSS implementation 2019-12-18 11:27:10 +01:00
Andre Puschmann 476f970ee1 replace FIXME with TODO 2019-12-18 11:25:56 +01:00
Pedro Alvarez c5979f59eb Clang format UE, eNB and lib (#850) 
* Clang-formated UE, eNB and lib.
* Fixed compiling errors from clang-format.
* Fix linking issues introduced by clang-format
* Fix poor formating in initializing arrays of arrays.
* Fix mistake in conflict resolution on rm_turbo.c
* Re-apply clang format to gtpc_ies.h
 2019-12-16 16:04:22 +01:00
Vasil Velichkov ef9d16a3cf PHY: Initialize pucch3_w_n_oc_5 using precomputed constants when compiled with clang 
Fixes the following clang-7's error

srsLTE/lib/src/phy/phch/pucch.c:307:9: error: initializer element is not a compile-time constant
    {1, cexpf(I * 2 * M_PI / 5), cexpf(I * 4 * M_PI / 5), cexpf(I * 6 * M_PI / 5), cexpf(I * 8 * M_PI / 5)},
        ^~~~~~~~~~~~~~~~~~~~~~~

Add SRSLTE_PUCCH_FORMAT_3 in the pucch_test
 2019-12-16 14:06:26 +01:00
Andre Puschmann 94ca9bcf22 fix potential invalid array access 2019-12-12 16:29:04 +01:00
Xavier Arteaga a51d989e2e Fixed static analysis float/double conversion 2019-12-05 09:41:12 +01:00
Xavier Arteaga b48bb0d754 Removed atof, atoll and atoi calls 2019-12-02 09:47:22 +01:00
Xavier Arteaga 8dd1c59e18 Added amplitude and power conversions to dB and viceversa 2019-12-02 09:47:22 +01:00
Xavier Arteaga f75d0e5b26 Change M_SQRT2 and M_SQRT1_2 instead of sqrt(2) and 1/sqrt(2) 2019-12-02 09:47:22 +01:00
Andre Puschmann 40bacb80b1 fixing comments from Xavier's review 2019-11-17 18:51:24 +01:00
Andre Puschmann e05ecdb139 adding NB-IoT DL channel estamiation and NPBCH code 2019-11-17 18:51:24 +01:00
Andre Puschmann 2401a2982b adding various NB-IoT test captures 2019-11-17 18:51:24 +01:00
Andre Puschmann 792e2f7f8f add NB-IoT scrambling sequences 2019-11-17 18:51:24 +01:00
Xavier Arteaga 4227da9bd0 Fixed DCI Format1B length 2019-10-18 13:02:10 +02:00
Xavier Arteaga 0b00e6d94a SRSUE: fixed CSI and HARQ collision for CA 2019-10-14 11:20:35 +02:00
Ismael Gomez 1d83bb08e2 Changes in ACK procedure to support CA. Tested 1 cell in SISO/MIMO 2019-10-14 11:20:35 +02:00
Xavier Arteaga db5a21e659 Remove set_master_clock_rate from PHY RF API 2019-09-20 15:43:07 +02:00
Robert Falkenberg bf35f83a5e Fixed inverted interpretation of new data indication (ndi) field in dci_format1As_pack() function 2019-08-29 20:49:24 +02:00
Igor Kim dd613c1514 Fix TBS table with auto-generated one (#368) 2019-08-29 20:47:07 +02:00
Ismael Gomez 19066c49ab Ad Rel10 info to dci logs 2019-07-30 18:18:44 +02:00
Ismael Gomez d32739c315 Minor logging changes in PHY 2019-07-25 13:21:47 +02:00
Guillem Foreman eab73829f6 Changes requested 2019-07-12 14:11:26 +02:00
Guillem Foreman 46724c336d Fixed errors for phy_dl_test and pdsch test 2019-07-04 15:49:43 +02:00
Guillem Foreman db4127ca64 Fixes 256QAM, added pdsch table 2, fixed warnings 2019-07-04 15:49:43 +02:00
Guillem Foreman 535325bc37 srsLTE: added resource allocation extended tables for 256QAM and integration with PDSCH test 2019-07-04 15:49:43 +02:00
Xavier Arteaga a417d3a70a Added DCI trace if cqi is requested 2019-07-02 16:36:06 +02:00
Joseph Giovatto 0bb7f590b3 Moved include complex.h from header files to impl files to prevent 
error /wr to complex.h and c linkage in CentOS 7.
 2019-06-14 12:19:57 +02:00
Ismael Gomez 786830daf3 Fix minor issues for TDD 2019-05-02 19:31:46 +02:00
Xavier Arteaga c18a59730c Solved PHY unit test memory leaks 2019-04-30 15:56:47 +02:00
yagoda 3842beab0f - fixing pmch file test for standard LTE rates 
- adding special value for MTCH stop
- adding error messages for config values incompatible with MBMS
 2019-04-29 12:04:42 +02:00
Andre Puschmann 4b01a2e4a0 update copyright notice 2019-04-29 09:20:02 +02:00
Ismael Gomez 7780b1aba5 add tdd/ca support 2019-04-25 20:57:58 +02:00
Francisco Paisana 0204db2e12 new asn1 rrc library 2019-01-17 17:43:13 +01:00
Andre Puschmann e328681343 add decode/encode when printing CB misconfig 2019-01-11 13:28:27 +01:00
Ismael Gomez a8a0c3ebe7 Fixed compilation in zynq 2018-12-12 14:34:13 +01:00
yagoda 69dc16c4c8 changes to fix arm compilation 2018-11-27 14:27:59 +01:00
Xavier Arteaga 27df357a66 Fixes #273 2018-10-04 10:44:41 +02:00
Xavier Arteaga 717d767c2b Removed PUSCH redundant line 2018-10-03 12:50:41 +02:00
Ismael Gomez 6f0c554445 TA estimate correction factor calibrated for all bandwidths 2018-09-24 15:39:14 +02:00
Ismael Gomez 2cf381823c Fixed bug in commit 197d855d3f 2018-09-19 18:00:47 +02:00
Ismael Gomez 0294923e2b Merge branch 'next' of github.com:softwareradiosystems/srsLTE into next 2018-09-19 16:42:11 +02:00
Ismael Gomez 197d855d3f Fix issue #240 2018-09-19 16:41:59 +02:00
Xavier Arteaga 7f72a90051 Implemented 16 bit LLR CSI in SSE 2018-09-17 12:33:14 +02:00
Ismael Gomez bc9d342959
New optimization on the PHY for both UE and eNodeB (#251) 
* New parallel Turbodecoder implementation in SSE/AVX 16-bit and 8-bit

* Optimised UL Interleaver

* Include TB CRC calculation in FEC encoder

* New threading priorities
 2018-09-04 17:51:35 +02:00
Xavier Arteaga a21db86a78 SCH Codeblock CRC is computed at same time than parity 0 2018-07-17 15:37:57 +02:00
Ismael Gomez c012a6ea83 Mutex more operations in worker to fix segfault when HO. Protect pdsch/pusch from regenerating sequence 2018-07-13 12:48:57 +02:00
Ismael Gomez c32ee8944f Merge branch 'next' of github.com:softwareradiosystems/srsLTE into next 2018-07-03 18:57:32 +02:00
Ismael Gomez 1a1471955e Fix incorrect MIB generation. Fixes issue #232 2018-07-03 18:57:10 +02:00
Ismael Gomez a8f6081837 Minor changes in scheduler logs and style 2018-07-03 18:23:46 +02:00
Xavier Arteaga 92954c1aa4 Fixed UCI decoder defect in eNb. Improved PUSCH Unit Test. PUSCH CQI is printed like UE. 2018-07-03 17:29:22 +02:00
Xavier Arteaga 2c1608f6f1 Fixed UCI short CQI decoder. Fixed possible interleaver segfault. PUSCH Unit test tidied up. 2018-07-02 18:22:15 +02:00
jctallon 50589108c6 Mbms fixes (#225) 
* fixing the threading structure for mbms in the gtpu

fixing some leaks in pmch tests

fixing stack overflow caused by radio objext

* adding sib.conf.mbsfn.example

* creating a different thread_mch object for the gtpu

* Make mch_thread an isolated class

* excluding mbsfn subframes from noise estimation and cfo estimation

* fixing pdsch ue plotting to only show pmch constellation when mbsfn is activated.
 2018-07-02 17:51:09 +02:00
Ismael Gomez 8c92f3fddc
Improvements and fixes on srsENB scheduler (#228) 2018-06-29 11:25:22 +02:00
Xavier Arteaga 5e4fb48184 Refactored CQI reporting logging in UE. Fixes #199 2018-06-25 14:57:12 +02:00
Ismael Gomez 94bb1912b7 Fix distributed ngap not printing in dci info 2018-06-13 11:12:53 +02:00
Xavier Arteaga 30eb5c62a6
Merge pull request #211 from softwareradiosystems/pdsch-coworkers 
Add pdsch coworkers, minifal noise estimation defect and fixed AGC out of bounds
 2018-06-11 14:25:21 +02:00
Xavier Arteaga 78912694c5 Fixed PDSCH coworker deadlock 2018-06-11 13:12:46 +02:00
Ismael Gomez ca9047e555 validate DL type1 sched grant rbg_subset 2018-06-09 11:10:54 -07:00
Xavier Arteaga d9db80d17c Merge branch 'next' into pdsch-coworkers 2018-06-06 17:35:09 +02:00
Xavier Arteaga 6ab69b1d4c Added PDSCH coworkers 2018-06-06 16:59:00 +02:00
Ismael Gomez bd4e1c9690 Fixed number of iterations lower than 1 in metrics 2018-06-04 13:14:27 +02:00
Xavier Arteaga 63df8d4c19 Fixed PDSCH test with OFDM 2018-05-25 16:06:32 +02:00
Ismael Gomez 08654efd1c minor changes 2018-05-25 12:14:54 +02:00
Xavier Arteaga 1ba18f1ddc Fix Resource Allocation Type 1 Defect 2018-05-24 16:20:27 +02:00
Andre Puschmann cb15dee3d4 Merge branch 'embms_merge_final' into next 2018-05-23 21:25:37 +02:00
Ismael Gomez 4662b83fe9 Use bzero instead of {} for initializing structs 2018-05-22 15:14:03 +02:00
yagoda e4c3f0bc30 adding mbms-gw and mch generation tables 2018-05-15 17:27:10 +02:00
yagoda 9d7d6c9415 adding adaptations to the phy layer for mbms 2018-05-15 16:13:03 +02:00
Ismael Gomez 3847daa137 Fixed order of PCI and PRB in log print 2018-05-14 16:10:01 +02:00
Ismael Gomez 443d2b7fa0 Merge branch 'next' of github.com:softwareradiosystems/srsLTE into next 2018-05-14 14:22:30 +02:00
Ismael Gomez d139a73593 Fix SIGFPE in pdsch_codeword_decode 2018-05-14 14:14:55 +02:00
Xavier Arteaga 36936349fe PUSCH test cases generator in CMake 2018-05-14 10:45:37 +02:00
Ismael Gomez 3065941638 Check for non-zero nof_re/nof_bits in pdsch_codeword_decode 2018-05-10 13:41:08 -05:00
Ismael Gomez 4ffee4326b Fix memory leaks in unit tests 2018-05-03 17:36:39 +02:00
Joseph Giovatto ab1d9e98f3 Format and typelimit warnings (#169) 
* merge with origin 4fc7dbc3 8daa8346

* fixed whitespace diff

* added .gitignore

* added format warning flags to C_FLAGS
added typelimit check to C_FLAGS and CXX_CLAGS

* Revert "added format warning flags to C_FLAGS"

Apply to branch format_and_typelimt branch

This reverts commit bf7467e82ec7b056ad06dc50cc964fcce18be99b.

* check for format warnings to top level C_FLAGS
added typelimit warnings to top level C_FLAGS and CXX_FLAGS
beset effort attempt to remedy warnings
removed unused param names in hex_log baseclass methods due to multitude of unused-warnings
 2018-04-29 17:26:35 +02:00
Xavier Arteaga 0bc3be7abb Added DL CSI decoding to TM2 and TM3 2018-04-20 11:27:39 +02:00
Ismael Gomez 384e0f8649 Fixed UL interleaver (missing SIMD deinterleaver) 2018-04-17 19:16:55 +02:00
Ismael Gomez f470645e90 Fix for real issue #164 2018-03-15 10:56:46 +01:00
Ismael Gomez bd258372ea Fixes #164 2018-03-14 23:08:36 +01:00
Andre Puschmann 7acc021a4e fix mem leak in pmch_test 2018-03-07 21:23:57 +01:00
Ismael Gomez 3adc6b5cbc
Merge pull request #158 from softwareradiosystems/csi 
Csi
 2018-03-07 14:40:57 +01:00
Andre Puschmann cae09a8d58 fix mem leak in PMCH 2018-03-06 21:35:15 +01:00
Xavier Arteaga 962164277a Normalize CSI to maximum. 2018-03-06 17:09:59 +01:00
Ismael Gomez fce672954e Minor edit to SNR-to-CQI table 2018-03-06 13:37:20 +01:00
Xavier Arteaga 2a69211f32 SCH does not terminate all codeblocks if one fail. Also, SCH does not decode blocks with CRC=OK 2018-03-01 14:01:36 +01:00
Xavier Arteaga 6fc9c96c58 Added CSI softbits weightening for Single antenna transmission 2018-02-28 12:07:31 +01:00
Ismael Gomez 4117119510 Correct a possible sign overflow 2018-02-13 18:17:15 +01:00
Ismael Gomez ea07f695ad Removed printf 2018-02-13 18:07:50 +01:00
Ismael Gomez a568db3b04 Fixed PRACH HS=TRUE bug and indentation 2018-02-13 18:05:02 +01:00
Ismael Gomez 86818ad65f Fix compilations warnings and remove printf debugs 2018-02-09 17:36:44 +01:00
Ismael Gomez b5bda138f3 Merge branch 'next' 2018-02-09 15:37:34 +01:00
Ismael Gomez ed76d73bbc Print tpc_pucch for format2 dci also 2018-02-08 20:57:36 +01:00
Andre Puschmann 8f850754f3 check malloc return value in various tests 2018-02-06 16:42:43 +01:00
Ismael Gomez a279ab47f0 Improved neighbour cell accuracy. Changed RRC to avoid segfault when neighbour cell addition 2018-02-02 19:31:22 +01:00
Ismael Gomez 2347fe0e6f Fixed incorrect DCI location bug. Make all calls to regs/pdcch atomic w.r.t. the CFI 2018-02-02 16:27:11 +01:00
Andre Puschmann dfe430a584 Merge branch 'next' 2018-02-01 16:35:53 +01:00