Parallelize CPU sig verify
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24
src/ecdsa.rs
24
src/ecdsa.rs
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@ -73,19 +73,17 @@ fn verify_packet(packet: &Packet) -> u8 {
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#[cfg(not(feature = "cuda"))]
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pub fn ed25519_verify(batches: &Vec<SharedPackets>) -> Vec<Vec<u8>> {
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let mut locks = Vec::new();
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let mut rvs = Vec::new();
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for packets in batches {
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locks.push(packets.read().unwrap());
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}
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for p in locks {
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let mut v = Vec::new();
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v.resize(p.packets.len(), 0);
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v = p.packets.par_iter().map(|x| verify_packet(x)).collect();
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rvs.push(v);
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}
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rvs
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batches
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.into_par_iter()
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.map(|p| {
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p.read()
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.unwrap()
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.packets
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.par_iter()
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.map(verify_packet)
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.collect()
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})
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.collect()
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}
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#[cfg(feature = "cuda")]
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