00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. July 2011 00005 * $Revision: V1.0.10 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_mult_q7.c 00009 * 00010 * Description: Q7 vector multiplication. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Version 1.0.10 2011/7/15 00015 * Big Endian support added and Merged M0 and M3/M4 Source code. 00016 * 00017 * Version 1.0.3 2010/11/29 00018 * Re-organized the CMSIS folders and updated documentation. 00019 * 00020 * Version 1.0.2 2010/11/11 00021 * Documentation updated. 00022 * 00023 * Version 1.0.1 2010/10/05 00024 * Production release and review comments incorporated. 00025 * 00026 * Version 1.0.0 2010/09/20 00027 * Production release and review comments incorporated. 00028 * 00029 * Version 0.0.7 2010/06/10 00030 * Misra-C changes done 00031 * 00032 * Version 0.0.5 2010/04/26 00033 * incorporated review comments and updated with latest CMSIS layer 00034 * 00035 * Version 0.0.3 2010/03/10 DP 00036 * Initial version 00037 * -------------------------------------------------------------------- */ 00038 00039 #include "arm_math.h" 00040 00064 void arm_mult_q7( 00065 q7_t * pSrcA, 00066 q7_t * pSrcB, 00067 q7_t * pDst, 00068 uint32_t blockSize) 00069 { 00070 uint32_t blkCnt; /* loop counters */ 00071 00072 #ifndef ARM_MATH_CM0 00073 00074 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00075 q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ 00076 00077 /* loop Unrolling */ 00078 blkCnt = blockSize >> 2u; 00079 00080 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00081 ** a second loop below computes the remaining 1 to 3 samples. */ 00082 while(blkCnt > 0u) 00083 { 00084 /* C = A * B */ 00085 /* Multiply the inputs and store the results in temporary variables */ 00086 out1 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7); 00087 out2 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7); 00088 out3 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7); 00089 out4 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7); 00090 00091 /* Store the results of 4 inputs in the destination buffer in single cycle by packing */ 00092 *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); 00093 00094 /* Decrement the blockSize loop counter */ 00095 blkCnt--; 00096 } 00097 00098 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00099 ** No loop unrolling is used. */ 00100 blkCnt = blockSize % 0x4u; 00101 00102 #else 00103 00104 /* Run the below code for Cortex-M0 */ 00105 00106 /* Initialize blkCnt with number of samples */ 00107 blkCnt = blockSize; 00108 00109 #endif /* #ifndef ARM_MATH_CM0 */ 00110 00111 00112 while(blkCnt > 0u) 00113 { 00114 /* C = A * B */ 00115 /* Multiply the inputs and store the result in the destination buffer */ 00116 *pDst++ = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7); 00117 00118 /* Decrement the blockSize loop counter */ 00119 blkCnt--; 00120 } 00121 } 00122