From cd4a8e96405ae05a14cc4b1e003db71bd0ad776b Mon Sep 17 00:00:00 2001 From: Josh Stewart Date: Thu, 9 May 2024 19:31:12 +1000 Subject: [PATCH] Clear interrupt flag before enabling schedule timers on T4.1 --- speeduino/board_teensy41.h | 48 +++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/speeduino/board_teensy41.h b/speeduino/board_teensy41.h index d7c35814..c77c0cfd 100644 --- a/speeduino/board_teensy41.h +++ b/speeduino/board_teensy41.h @@ -82,14 +82,14 @@ #define IGN7_COMPARE TMR4_COMP12 #define IGN8_COMPARE TMR4_COMP13 - static inline void FUEL1_TIMER_ENABLE(void) {TMR1_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} //Write 1 to the TCFIEN (Channel Interrupt Enable) bit of channel 0 Status/Control - static inline void FUEL2_TIMER_ENABLE(void) {TMR1_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} - static inline void FUEL3_TIMER_ENABLE(void) {TMR1_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} - static inline void FUEL4_TIMER_ENABLE(void) {TMR1_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} - static inline void FUEL5_TIMER_ENABLE(void) {TMR3_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} - static inline void FUEL6_TIMER_ENABLE(void) {TMR3_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} - static inline void FUEL7_TIMER_ENABLE(void) {TMR3_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} - static inline void FUEL8_TIMER_ENABLE(void) {TMR3_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL1_TIMER_ENABLE(void) {TMR1_CSCTRL0 &= ~TMR_CSCTRL_TCF1; TMR1_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} //Write 1 to the TCFIEN (Channel Interrupt Enable) bit of channel 0 Status/Control + static inline void FUEL2_TIMER_ENABLE(void) {TMR1_CSCTRL1 &= ~TMR_CSCTRL_TCF1; TMR1_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL3_TIMER_ENABLE(void) {TMR1_CSCTRL2 &= ~TMR_CSCTRL_TCF1; TMR1_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL4_TIMER_ENABLE(void) {TMR1_CSCTRL3 &= ~TMR_CSCTRL_TCF1; TMR1_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL5_TIMER_ENABLE(void) {TMR3_CSCTRL0 &= ~TMR_CSCTRL_TCF1; TMR3_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL6_TIMER_ENABLE(void) {TMR3_CSCTRL1 &= ~TMR_CSCTRL_TCF1; TMR3_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL7_TIMER_ENABLE(void) {TMR3_CSCTRL2 &= ~TMR_CSCTRL_TCF1; TMR3_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} + static inline void FUEL8_TIMER_ENABLE(void) {TMR3_CSCTRL3 &= ~TMR_CSCTRL_TCF1; TMR3_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} static inline void FUEL1_TIMER_DISABLE(void) {TMR1_CSCTRL0 &= ~TMR_CSCTRL_TCF1EN;} //Write 0 to the TCFIEN (Channel Interrupt Enable) bit of channel 0 Status/Control static inline void FUEL2_TIMER_DISABLE(void) {TMR1_CSCTRL1 &= ~TMR_CSCTRL_TCF1EN;} @@ -100,23 +100,23 @@ static inline void FUEL7_TIMER_DISABLE(void) {TMR3_CSCTRL2 &= ~TMR_CSCTRL_TCF1EN;} static inline void FUEL8_TIMER_DISABLE(void) {TMR3_CSCTRL3 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN1_TIMER_ENABLE(void) {TMR2_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN2_TIMER_ENABLE(void) {TMR2_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN3_TIMER_ENABLE(void) {TMR2_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN4_TIMER_ENABLE(void) {TMR2_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN5_TIMER_ENABLE(void) {TMR4_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN6_TIMER_ENABLE(void) {TMR4_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN7_TIMER_ENABLE(void) {TMR4_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN8_TIMER_ENABLE(void) {TMR4_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN1_TIMER_ENABLE(void) {TMR2_CSCTRL0 &= ~TMR_CSCTRL_TCF1; TMR2_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN2_TIMER_ENABLE(void) {TMR2_CSCTRL1 &= ~TMR_CSCTRL_TCF1; TMR2_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN3_TIMER_ENABLE(void) {TMR2_CSCTRL2 &= ~TMR_CSCTRL_TCF1; TMR2_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN4_TIMER_ENABLE(void) {TMR2_CSCTRL3 &= ~TMR_CSCTRL_TCF1; TMR2_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN5_TIMER_ENABLE(void) {TMR4_CSCTRL0 &= ~TMR_CSCTRL_TCF1; TMR4_CSCTRL0 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN6_TIMER_ENABLE(void) {TMR4_CSCTRL1 &= ~TMR_CSCTRL_TCF1; TMR4_CSCTRL1 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN7_TIMER_ENABLE(void) {TMR4_CSCTRL2 &= ~TMR_CSCTRL_TCF1; TMR4_CSCTRL2 |= TMR_CSCTRL_TCF1EN;} + static inline void IGN8_TIMER_ENABLE(void) {TMR4_CSCTRL3 &= ~TMR_CSCTRL_TCF1; TMR4_CSCTRL3 |= TMR_CSCTRL_TCF1EN;} - static inline void IGN1_TIMER_DISABLE(void) {TMR2_CSCTRL0 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN2_TIMER_DISABLE(void) {TMR2_CSCTRL1 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN3_TIMER_DISABLE(void) {TMR2_CSCTRL2 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN4_TIMER_DISABLE(void) {TMR2_CSCTRL3 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN5_TIMER_DISABLE(void) {TMR4_CSCTRL0 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN6_TIMER_DISABLE(void) {TMR4_CSCTRL1 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN7_TIMER_DISABLE(void) {TMR4_CSCTRL2 &= ~TMR_CSCTRL_TCF1EN;} - static inline void IGN8_TIMER_DISABLE(void) {TMR4_CSCTRL3 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN1_TIMER_DISABLE(void) {TMR2_CSCTRL0 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN2_TIMER_DISABLE(void) {TMR2_CSCTRL1 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN3_TIMER_DISABLE(void) {TMR2_CSCTRL2 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN4_TIMER_DISABLE(void) {TMR2_CSCTRL3 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN5_TIMER_DISABLE(void) {TMR4_CSCTRL0 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN6_TIMER_DISABLE(void) {TMR4_CSCTRL1 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN7_TIMER_DISABLE(void) {TMR4_CSCTRL2 &= ~TMR_CSCTRL_TCF1EN;} + static inline void IGN8_TIMER_DISABLE(void) {TMR4_CSCTRL3 &= ~TMR_CSCTRL_TCF1EN;} //Bus Clock is 150Mhz @ 600 Mhz CPU. Need to handle this dynamically in the future for other frequencies //#define TMR_PRESCALE 128