Compare commits
3 Commits
37bab78946
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da60f919ac
Author | SHA1 | Date |
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benas-gavea | da60f919ac | |
benas-gavea | e477f9694e | |
benas-gavea | ad6b9faadf |
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@ -1,310 +1,311 @@
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|
||||
<entry excluding="generated/simulator/src/mainBase.cpp|generated/simulator/src/video/SoftwareMJPEGDecoder.cpp|simulator/main.cpp" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="TouchGFX"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="USB_DEVICE"/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="429IG_LCD.null.1317214156" name="429IG_LCD"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1587463719;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1587463719.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.358120778;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.93776071">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449899571;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449899571.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.96091759;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.1691175898">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449899571;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1449899571.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1319767368;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.593704245">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1587463719;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1587463719.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.191614217;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1959246107">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Debug">
|
||||
<resource resourceType="PROJECT" workspacePath="/LCD_CAR_WIDE"/>
|
||||
</configuration>
|
||||
<configuration configurationName="Release">
|
||||
<resource resourceType="PROJECT" workspacePath="/LCD_CAR_WIDE"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
</cproject>
|
File diff suppressed because one or more lines are too long
|
@ -5,7 +5,7 @@
|
|||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1011554442862454506" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-365781360784966777" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
@ -16,7 +16,7 @@
|
|||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1065854750519717842" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-311481053127703441" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
|
|
@ -15,15 +15,16 @@ extern "C" {
|
|||
|
||||
|
||||
#define BH1750_ENABLED 0
|
||||
#define GPS_ENABLED 1
|
||||
#define GPS_ENABLED 0
|
||||
#define CAN_ENABLED 1
|
||||
#define RGB_ENABLED 1
|
||||
#define UART_ENABLED 0
|
||||
#define IND_ENABLED 0
|
||||
#define ALERT_ENABLED 0
|
||||
#define DEMO 0
|
||||
|
||||
#define LED_NUMBER 24
|
||||
#define LED_DEFAULT_BRIGHTNESS 2
|
||||
#define LED_DEFAULT_BRIGHTNESS 50
|
||||
|
||||
#define LCD_DEFAULT_BRIGHTNESS 400
|
||||
|
||||
|
|
|
@ -6,11 +6,11 @@
|
|||
#include "extern.h"
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
TIM_HandleTypeDef htim1;
|
||||
TIM_HandleTypeDef htim2;
|
||||
|
||||
#define WS2812_NUM_LEDS_CH1 LED_NUMBER
|
||||
|
||||
#define WS2812_TIM_PERIODE htim1.Instance->ARR //52 // F_PWM 84000000/800000 = 225 -> 800 kHz (1.25us)
|
||||
#define WS2812_TIM_PERIODE htim2.Instance->ARR //52 // F_PWM 84000000/800000 = 225 -> 800 kHz (1.25us)
|
||||
|
||||
#define WS2812_LO_TIME (WS2812_TIM_PERIODE / (1.25 / 0.22)) - 1 //(1.25 / 0.22) 0.220us - 0.380us
|
||||
#define WS2812_HI_TIME (WS2812_TIM_PERIODE / (1.25 / 0.58)) - 1 //(1.25 / 0.58) 0.580us - 1us
|
||||
|
|
|
@ -197,10 +197,6 @@ void show_neopixels();
|
|||
#define BTN_4_PE5_GPIO_Port GPIOC
|
||||
#define BTN_3_PE4_Pin GPIO_PIN_9
|
||||
#define BTN_3_PE4_GPIO_Port GPIOC
|
||||
#define GPS_UART1_RX_Pin GPIO_PIN_9
|
||||
#define GPS_UART1_RX_GPIO_Port GPIOA
|
||||
#define GPS_UART1_TX_Pin GPIO_PIN_10
|
||||
#define GPS_UART1_TX_GPIO_Port GPIOA
|
||||
#define USB_OTG__Pin GPIO_PIN_11
|
||||
#define USB_OTG__GPIO_Port GPIOA
|
||||
#define USB_OTG_A12_Pin GPIO_PIN_12
|
||||
|
|
|
@ -1,34 +0,0 @@
|
|||
/*
|
||||
* flash_lib.h
|
||||
*
|
||||
* Created on: Oct 16, 2022
|
||||
* Author: Ben
|
||||
*/
|
||||
|
||||
#ifndef INC_MCU_FLASH_H_
|
||||
#define INC_MCU_FLASH_H_
|
||||
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
//Typedefs
|
||||
//1. data size
|
||||
typedef enum
|
||||
{
|
||||
DATA_TYPE_8=0,
|
||||
DATA_TYPE_16,
|
||||
DATA_TYPE_32,
|
||||
}DataTypeDef;
|
||||
|
||||
//functions prototypes
|
||||
//1. Erase Sector
|
||||
void FLASH_EraseSector(void);
|
||||
//2. Set Sector Adress
|
||||
void FLASH_SetSectorAddrs(uint8_t sector, uint32_t addrs);
|
||||
//3. Write Flash
|
||||
void FLASH_WriteN(uint32_t idx, void *wrBuf, uint32_t Nsize, DataTypeDef dataType);
|
||||
//4. Read Flash
|
||||
void FLASH_ReadN(uint32_t idx, void *rdBuf, uint32_t Nsize, DataTypeDef dataType);
|
||||
|
||||
|
||||
|
||||
#endif /* INC_MCU_FLASH_H_ */
|
|
@ -6,7 +6,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
|
@ -1,102 +0,0 @@
|
|||
/*
|
||||
* w25qxx.h
|
||||
*
|
||||
* Created on: Oct 16, 2022
|
||||
* Author: Ben
|
||||
*/
|
||||
|
||||
#ifndef _W25QXX_H
|
||||
#define _W25QXX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "stm32f4xx_hal.h"
|
||||
#include "main.h"
|
||||
|
||||
SPI_HandleTypeDef hspi1;
|
||||
|
||||
#define _W25QXX_SPI hspi1
|
||||
#define _W25QXX_CS_GPIO SPI1_FLASH_GPIO_Port
|
||||
#define _W25QXX_CS_PIN SPI1_FLASH_Pin
|
||||
#define _W25QXX_USE_FREERTOS 1
|
||||
#define _W25QXX_DEBUG 1
|
||||
|
||||
typedef enum
|
||||
{
|
||||
W25Q10=1,
|
||||
W25Q20,
|
||||
W25Q40,
|
||||
W25Q80,
|
||||
W25Q16,
|
||||
W25Q32,
|
||||
W25Q64,
|
||||
W25Q128,
|
||||
W25Q256,
|
||||
W25Q512,
|
||||
|
||||
}W25QXX_ID_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
W25QXX_ID_t ID;
|
||||
uint8_t UniqID[8];
|
||||
|
||||
uint16_t PageSize;
|
||||
uint32_t PageCount;
|
||||
uint32_t SectorSize;
|
||||
uint32_t SectorCount;
|
||||
uint32_t BlockSize;
|
||||
uint32_t BlockCount;
|
||||
|
||||
uint32_t CapacityInKiloByte;
|
||||
|
||||
uint8_t StatusRegister1;
|
||||
uint8_t StatusRegister2;
|
||||
uint8_t StatusRegister3;
|
||||
|
||||
uint8_t Lock;
|
||||
|
||||
}w25qxx_t;
|
||||
|
||||
extern w25qxx_t w25qxx;
|
||||
//############################################################################
|
||||
// in Page,Sector and block read/write functions, can put 0 to read maximum bytes
|
||||
//############################################################################
|
||||
bool W25qxx_Init(void);
|
||||
|
||||
void W25qxx_EraseChip(void);
|
||||
void W25qxx_EraseSector(uint32_t SectorAddr);
|
||||
void W25qxx_EraseBlock(uint32_t BlockAddr);
|
||||
|
||||
uint32_t W25qxx_PageToSector(uint32_t PageAddress);
|
||||
uint32_t W25qxx_PageToBlock(uint32_t PageAddress);
|
||||
uint32_t W25qxx_SectorToBlock(uint32_t SectorAddress);
|
||||
uint32_t W25qxx_SectorToPage(uint32_t SectorAddress);
|
||||
uint32_t W25qxx_BlockToPage(uint32_t BlockAddress);
|
||||
|
||||
bool W25qxx_IsEmptyPage(uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_PageSize);
|
||||
bool W25qxx_IsEmptySector(uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_SectorSize);
|
||||
bool W25qxx_IsEmptyBlock(uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_BlockSize);
|
||||
|
||||
void W25qxx_WriteByte(uint8_t pBuffer,uint32_t Bytes_Address);
|
||||
void W25qxx_WritePage(uint8_t *pBuffer ,uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_PageSize);
|
||||
void W25qxx_WriteSector(uint8_t *pBuffer,uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_SectorSize);
|
||||
void W25qxx_WriteBlock(uint8_t* pBuffer,uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_BlockSize);
|
||||
|
||||
void W25qxx_ReadByte(uint8_t *pBuffer,uint32_t Bytes_Address);
|
||||
void W25qxx_ReadBytes(uint8_t *pBuffer,uint32_t ReadAddr,uint32_t NumByteToRead);
|
||||
void W25qxx_ReadPage(uint8_t *pBuffer,uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_PageSize);
|
||||
void W25qxx_ReadSector(uint8_t *pBuffer,uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_SectorSize);
|
||||
void W25qxx_ReadBlock(uint8_t* pBuffer,uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_BlockSize);
|
||||
//############################################################################
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -53,7 +53,7 @@
|
|||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
#define HAL_SDRAM_MODULE_ENABLED
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
/* #define HAL_I2C_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
#define HAL_LTDC_MODULE_ENABLED
|
||||
|
@ -62,9 +62,9 @@
|
|||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/* #define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/* #define HAL_UART_MODULE_ENABLED */
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
|
|
@ -52,10 +52,10 @@ void MemManage_Handler(void);
|
|||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void DMA1_Stream6_IRQHandler(void);
|
||||
void CAN1_RX0_IRQHandler(void);
|
||||
void FMC_IRQHandler(void);
|
||||
void TIM6_DAC_IRQHandler(void);
|
||||
void CAN2_RX0_IRQHandler(void);
|
||||
void OTG_FS_IRQHandler(void);
|
||||
void LTDC_IRQHandler(void);
|
||||
void DMA2D_IRQHandler(void);
|
||||
|
|
|
@ -74,7 +74,7 @@ void calcBuf(void)
|
|||
*/
|
||||
void startDMA(void) {
|
||||
dma_ready = 0;
|
||||
if (HAL_TIM_PWM_Start_DMA(&htim1, TIM_CHANNEL_1, (uint32_t *)WS2812_TIM_BUF, WS2812_BUFLEN) != HAL_OK)
|
||||
if (HAL_TIM_PWM_Start_DMA(&htim2, TIM_CHANNEL_2, (uint32_t *)WS2812_TIM_BUF, WS2812_BUFLEN) != HAL_OK)
|
||||
{
|
||||
|
||||
}
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,102 +0,0 @@
|
|||
/*
|
||||
* flash_lib.c
|
||||
*
|
||||
* Created on: Oct 16, 2022
|
||||
* Author: Ben
|
||||
*/
|
||||
|
||||
#include "mcu_flash.h"
|
||||
|
||||
//Private variables
|
||||
//1. sector start address
|
||||
static uint32_t FLASH_SectorAddrs;
|
||||
static uint8_t FLASH_SectorNum;
|
||||
|
||||
//functions definitions
|
||||
void FLASH_EraseSector(void)
|
||||
{
|
||||
HAL_FLASH_Unlock();
|
||||
//Erase the required Flash sector
|
||||
FLASH_Erase_Sector(FLASH_SectorNum, FLASH_VOLTAGE_RANGE_3);
|
||||
HAL_FLASH_Lock();
|
||||
}
|
||||
|
||||
//2. Set Sector Adress
|
||||
void FLASH_SetSectorAddrs(uint8_t sector, uint32_t addrs)
|
||||
{
|
||||
FLASH_SectorNum = sector;
|
||||
FLASH_SectorAddrs = addrs;
|
||||
}
|
||||
|
||||
//3. Write Flash
|
||||
void FLASH_WriteN(uint32_t idx, void *wrBuf, uint32_t Nsize, DataTypeDef dataType)
|
||||
{
|
||||
uint32_t flashAddress = FLASH_SectorAddrs + idx;
|
||||
|
||||
//Erase sector before write
|
||||
FLASH_EraseSector();
|
||||
|
||||
//Unlock Flash
|
||||
HAL_FLASH_Unlock();
|
||||
//Write to Flash
|
||||
switch(dataType)
|
||||
{
|
||||
case DATA_TYPE_8:
|
||||
for(uint32_t i=0; i<Nsize; i++)
|
||||
{
|
||||
HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, flashAddress , ((uint8_t *)wrBuf)[i]);
|
||||
flashAddress++;
|
||||
}
|
||||
break;
|
||||
|
||||
case DATA_TYPE_16:
|
||||
for(uint32_t i=0; i<Nsize; i++)
|
||||
{
|
||||
HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, flashAddress , ((uint16_t *)wrBuf)[i]);
|
||||
flashAddress+=2;
|
||||
}
|
||||
break;
|
||||
|
||||
case DATA_TYPE_32:
|
||||
for(uint32_t i=0; i<Nsize; i++)
|
||||
{
|
||||
HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, flashAddress , ((uint32_t *)wrBuf)[i]);
|
||||
flashAddress+=4;
|
||||
}
|
||||
break;
|
||||
}
|
||||
//Lock the Flash space
|
||||
HAL_FLASH_Lock();
|
||||
}
|
||||
//4. Read Flash
|
||||
void FLASH_ReadN(uint32_t idx, void *rdBuf, uint32_t Nsize, DataTypeDef dataType)
|
||||
{
|
||||
uint32_t flashAddress = FLASH_SectorAddrs + idx;
|
||||
|
||||
switch(dataType)
|
||||
{
|
||||
case DATA_TYPE_8:
|
||||
for(uint32_t i=0; i<Nsize; i++)
|
||||
{
|
||||
*((uint8_t *)rdBuf + i) = *(uint8_t *)flashAddress;
|
||||
flashAddress++;
|
||||
}
|
||||
break;
|
||||
|
||||
case DATA_TYPE_16:
|
||||
for(uint32_t i=0; i<Nsize; i++)
|
||||
{
|
||||
*((uint16_t *)rdBuf + i) = *(uint16_t *)flashAddress;
|
||||
flashAddress+=2;
|
||||
}
|
||||
break;
|
||||
|
||||
case DATA_TYPE_32:
|
||||
for(uint32_t i=0; i<Nsize; i++)
|
||||
{
|
||||
*((uint32_t *)rdBuf + i) = *(uint32_t *)flashAddress;
|
||||
flashAddress+=4;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
|
@ -1,893 +0,0 @@
|
|||
#if (_W25QXX_DEBUG==1)
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
#include "spi_flash.h"
|
||||
|
||||
|
||||
|
||||
|
||||
#define W25QXX_DUMMY_BYTE 0xA5
|
||||
|
||||
w25qxx_t w25qxx;
|
||||
|
||||
#if (_W25QXX_USE_FREERTOS==1)
|
||||
#define W25qxx_Delay(delay) osDelay(delay)
|
||||
#include "cmsis_os.h"
|
||||
#else
|
||||
#define W25qxx_Delay(delay) HAL_Delay(delay)
|
||||
#endif
|
||||
//###################################################################################################################
|
||||
uint8_t W25qxx_Spi(uint8_t Data)
|
||||
{
|
||||
uint8_t ret;
|
||||
HAL_SPI_TransmitReceive(&_W25QXX_SPI,&Data,&ret,1,10);
|
||||
return ret;
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint32_t W25qxx_ReadID(void)
|
||||
{
|
||||
uint32_t Temp = 0, Temp0 = 0, Temp1 = 0, Temp2 = 0;
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x9F);
|
||||
Temp0 = W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
Temp1 = W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
Temp2 = W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
Temp = (Temp0 << 16) | (Temp1 << 8) | Temp2;
|
||||
return Temp;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_ReadUniqID(void)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x4B);
|
||||
for(uint8_t i=0;i<4;i++)
|
||||
W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
for(uint8_t i=0;i<8;i++)
|
||||
w25qxx.UniqID[i] = W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WriteEnable(void)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x06);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_Delay(1);
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WriteDisable(void)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x04);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_Delay(1);
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint8_t W25qxx_ReadStatusRegister(uint8_t SelectStatusRegister_1_2_3)
|
||||
{
|
||||
uint8_t status=0;
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
if(SelectStatusRegister_1_2_3==1)
|
||||
{
|
||||
W25qxx_Spi(0x05);
|
||||
status=W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
w25qxx.StatusRegister1 = status;
|
||||
}
|
||||
else if(SelectStatusRegister_1_2_3==2)
|
||||
{
|
||||
W25qxx_Spi(0x35);
|
||||
status=W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
w25qxx.StatusRegister2 = status;
|
||||
}
|
||||
else
|
||||
{
|
||||
W25qxx_Spi(0x15);
|
||||
status=W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
w25qxx.StatusRegister3 = status;
|
||||
}
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
return status;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WriteStatusRegister(uint8_t SelectStatusRegister_1_2_3,uint8_t Data)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
if(SelectStatusRegister_1_2_3==1)
|
||||
{
|
||||
W25qxx_Spi(0x01);
|
||||
w25qxx.StatusRegister1 = Data;
|
||||
}
|
||||
else if(SelectStatusRegister_1_2_3==2)
|
||||
{
|
||||
W25qxx_Spi(0x31);
|
||||
w25qxx.StatusRegister2 = Data;
|
||||
}
|
||||
else
|
||||
{
|
||||
W25qxx_Spi(0x11);
|
||||
w25qxx.StatusRegister3 = Data;
|
||||
}
|
||||
W25qxx_Spi(Data);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WaitForWriteEnd(void)
|
||||
{
|
||||
W25qxx_Delay(1);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x05);
|
||||
do
|
||||
{
|
||||
w25qxx.StatusRegister1 = W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
W25qxx_Delay(1);
|
||||
}
|
||||
while ((w25qxx.StatusRegister1 & 0x01) == 0x01);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
}
|
||||
//###################################################################################################################
|
||||
bool W25qxx_Init(void)
|
||||
{
|
||||
w25qxx.Lock=1;
|
||||
while(HAL_GetTick()<100)
|
||||
W25qxx_Delay(1);
|
||||
uint32_t id;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Init Begin...\r\n");
|
||||
#endif
|
||||
id=W25qxx_ReadID();
|
||||
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx ID:0x%X\r\n",id);
|
||||
#endif
|
||||
switch(id&0x0000FFFF)
|
||||
{
|
||||
case 0x401A: // w25q512
|
||||
w25qxx.ID=W25Q512;
|
||||
w25qxx.BlockCount=1024;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q512\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4019: // w25q256
|
||||
w25qxx.ID=W25Q256;
|
||||
w25qxx.BlockCount=512;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q256\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4018: // w25q128
|
||||
w25qxx.ID=W25Q128;
|
||||
w25qxx.BlockCount=256;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q128\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4017: // w25q64
|
||||
w25qxx.ID=W25Q64;
|
||||
w25qxx.BlockCount=128;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q64\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4016: // w25q32
|
||||
w25qxx.ID=W25Q32;
|
||||
w25qxx.BlockCount=64;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q32\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4015: // w25q16
|
||||
w25qxx.ID=W25Q16;
|
||||
w25qxx.BlockCount=32;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q16\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4014: // w25q80
|
||||
w25qxx.ID=W25Q80;
|
||||
w25qxx.BlockCount=16;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q80\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4013: // w25q40
|
||||
w25qxx.ID=W25Q40;
|
||||
w25qxx.BlockCount=8;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q40\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4012: // w25q20
|
||||
w25qxx.ID=W25Q20;
|
||||
w25qxx.BlockCount=4;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q20\r\n");
|
||||
#endif
|
||||
break;
|
||||
case 0x4011: // w25q10
|
||||
w25qxx.ID=W25Q10;
|
||||
w25qxx.BlockCount=2;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Chip: w25q10\r\n");
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Unknown ID\r\n");
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return false;
|
||||
|
||||
}
|
||||
w25qxx.PageSize=256;
|
||||
w25qxx.SectorSize=0x1000;
|
||||
w25qxx.SectorCount=w25qxx.BlockCount*16;
|
||||
w25qxx.PageCount=(w25qxx.SectorCount*w25qxx.SectorSize)/w25qxx.PageSize;
|
||||
w25qxx.BlockSize=w25qxx.SectorSize*16;
|
||||
w25qxx.CapacityInKiloByte=(w25qxx.SectorCount*w25qxx.SectorSize)/1024;
|
||||
W25qxx_ReadUniqID();
|
||||
W25qxx_ReadStatusRegister(1);
|
||||
W25qxx_ReadStatusRegister(2);
|
||||
W25qxx_ReadStatusRegister(3);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx Page Size: %d Bytes\r\n",w25qxx.PageSize);
|
||||
printf("w25qxx Page Count: %d\r\n",w25qxx.PageCount);
|
||||
printf("w25qxx Sector Size: %d Bytes\r\n",w25qxx.SectorSize);
|
||||
printf("w25qxx Sector Count: %d\r\n",w25qxx.SectorCount);
|
||||
printf("w25qxx Block Size: %d Bytes\r\n",w25qxx.BlockSize);
|
||||
printf("w25qxx Block Count: %d\r\n",w25qxx.BlockCount);
|
||||
printf("w25qxx Capacity: %d KiloBytes\r\n",w25qxx.CapacityInKiloByte);
|
||||
printf("w25qxx Init Done\r\n");
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return true;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_EraseChip(void)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
printf("w25qxx EraseChip Begin...\r\n");
|
||||
#endif
|
||||
W25qxx_WriteEnable();
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0xC7);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_WaitForWriteEnd();
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx EraseBlock done after %d ms!\r\n",HAL_GetTick()-StartTime);
|
||||
#endif
|
||||
W25qxx_Delay(10);
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_EraseSector(uint32_t SectorAddr)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
printf("w25qxx EraseSector %d Begin...\r\n",SectorAddr);
|
||||
#endif
|
||||
W25qxx_WaitForWriteEnd();
|
||||
SectorAddr = SectorAddr * w25qxx.SectorSize;
|
||||
W25qxx_WriteEnable();
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x20);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((SectorAddr & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((SectorAddr & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((SectorAddr & 0xFF00) >> 8);
|
||||
W25qxx_Spi(SectorAddr & 0xFF);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_WaitForWriteEnd();
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx EraseSector done after %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
#endif
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_EraseBlock(uint32_t BlockAddr)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx EraseBlock %d Begin...\r\n",BlockAddr);
|
||||
W25qxx_Delay(100);
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
#endif
|
||||
W25qxx_WaitForWriteEnd();
|
||||
BlockAddr = BlockAddr * w25qxx.SectorSize*16;
|
||||
W25qxx_WriteEnable();
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0xD8);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((BlockAddr & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((BlockAddr & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((BlockAddr & 0xFF00) >> 8);
|
||||
W25qxx_Spi(BlockAddr & 0xFF);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_WaitForWriteEnd();
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx EraseBlock done after %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint32_t W25qxx_PageToSector(uint32_t PageAddress)
|
||||
{
|
||||
return ((PageAddress*w25qxx.PageSize)/w25qxx.SectorSize);
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint32_t W25qxx_PageToBlock(uint32_t PageAddress)
|
||||
{
|
||||
return ((PageAddress*w25qxx.PageSize)/w25qxx.BlockSize);
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint32_t W25qxx_SectorToBlock(uint32_t SectorAddress)
|
||||
{
|
||||
return ((SectorAddress*w25qxx.SectorSize)/w25qxx.BlockSize);
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint32_t W25qxx_SectorToPage(uint32_t SectorAddress)
|
||||
{
|
||||
return (SectorAddress*w25qxx.SectorSize)/w25qxx.PageSize;
|
||||
}
|
||||
//###################################################################################################################
|
||||
uint32_t W25qxx_BlockToPage(uint32_t BlockAddress)
|
||||
{
|
||||
return (BlockAddress*w25qxx.BlockSize)/w25qxx.PageSize;
|
||||
}
|
||||
//###################################################################################################################
|
||||
bool W25qxx_IsEmptyPage(uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_PageSize)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
if(((NumByteToCheck_up_to_PageSize+OffsetInByte)>w25qxx.PageSize)||(NumByteToCheck_up_to_PageSize==0))
|
||||
NumByteToCheck_up_to_PageSize=w25qxx.PageSize-OffsetInByte;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckPage:%d, Offset:%d, Bytes:%d begin...\r\n",Page_Address,OffsetInByte,NumByteToCheck_up_to_PageSize);
|
||||
W25qxx_Delay(100);
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
#endif
|
||||
uint8_t pBuffer[32];
|
||||
uint32_t WorkAddress;
|
||||
uint32_t i;
|
||||
for(i=OffsetInByte; i<w25qxx.PageSize; i+=sizeof(pBuffer))
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
WorkAddress=(i+Page_Address*w25qxx.PageSize);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WorkAddress & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WorkAddress & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WorkAddress & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WorkAddress & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,sizeof(pBuffer),100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
for(uint8_t x=0;x<sizeof(pBuffer);x++)
|
||||
{
|
||||
if(pBuffer[x]!=0xFF)
|
||||
goto NOT_EMPTY;
|
||||
}
|
||||
}
|
||||
if((w25qxx.PageSize+OffsetInByte)%sizeof(pBuffer)!=0)
|
||||
{
|
||||
i-=sizeof(pBuffer);
|
||||
for( ; i<w25qxx.PageSize; i++)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
WorkAddress=(i+Page_Address*w25qxx.PageSize);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WorkAddress & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WorkAddress & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WorkAddress & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WorkAddress & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,1,100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
if(pBuffer[0]!=0xFF)
|
||||
goto NOT_EMPTY;
|
||||
}
|
||||
}
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckPage is Empty in %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return true;
|
||||
NOT_EMPTY:
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckPage is Not Empty in %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return false;
|
||||
}
|
||||
//###################################################################################################################
|
||||
bool W25qxx_IsEmptySector(uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_SectorSize)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
if((NumByteToCheck_up_to_SectorSize>w25qxx.SectorSize)||(NumByteToCheck_up_to_SectorSize==0))
|
||||
NumByteToCheck_up_to_SectorSize=w25qxx.SectorSize;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckSector:%d, Offset:%d, Bytes:%d begin...\r\n",Sector_Address,OffsetInByte,NumByteToCheck_up_to_SectorSize);
|
||||
W25qxx_Delay(100);
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
#endif
|
||||
uint8_t pBuffer[32];
|
||||
uint32_t WorkAddress;
|
||||
uint32_t i;
|
||||
for(i=OffsetInByte; i<w25qxx.SectorSize; i+=sizeof(pBuffer))
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
WorkAddress=(i+Sector_Address*w25qxx.SectorSize);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WorkAddress & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WorkAddress & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WorkAddress & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WorkAddress & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,sizeof(pBuffer),100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
for(uint8_t x=0;x<sizeof(pBuffer);x++)
|
||||
{
|
||||
if(pBuffer[x]!=0xFF)
|
||||
goto NOT_EMPTY;
|
||||
}
|
||||
}
|
||||
if((w25qxx.SectorSize+OffsetInByte)%sizeof(pBuffer)!=0)
|
||||
{
|
||||
i-=sizeof(pBuffer);
|
||||
for( ; i<w25qxx.SectorSize; i++)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
WorkAddress=(i+Sector_Address*w25qxx.SectorSize);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WorkAddress & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WorkAddress & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WorkAddress & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WorkAddress & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,1,100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
if(pBuffer[0]!=0xFF)
|
||||
goto NOT_EMPTY;
|
||||
}
|
||||
}
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckSector is Empty in %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return true;
|
||||
NOT_EMPTY:
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckSector is Not Empty in %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return false;
|
||||
}
|
||||
//###################################################################################################################
|
||||
bool W25qxx_IsEmptyBlock(uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToCheck_up_to_BlockSize)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
if((NumByteToCheck_up_to_BlockSize>w25qxx.BlockSize)||(NumByteToCheck_up_to_BlockSize==0))
|
||||
NumByteToCheck_up_to_BlockSize=w25qxx.BlockSize;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckBlock:%d, Offset:%d, Bytes:%d begin...\r\n",Block_Address,OffsetInByte,NumByteToCheck_up_to_BlockSize);
|
||||
W25qxx_Delay(100);
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
#endif
|
||||
uint8_t pBuffer[32];
|
||||
uint32_t WorkAddress;
|
||||
uint32_t i;
|
||||
for(i=OffsetInByte; i<w25qxx.BlockSize; i+=sizeof(pBuffer))
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
WorkAddress=(i+Block_Address*w25qxx.BlockSize);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WorkAddress & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WorkAddress & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WorkAddress & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WorkAddress & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,sizeof(pBuffer),100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
for(uint8_t x=0;x<sizeof(pBuffer);x++)
|
||||
{
|
||||
if(pBuffer[x]!=0xFF)
|
||||
goto NOT_EMPTY;
|
||||
}
|
||||
}
|
||||
if((w25qxx.BlockSize+OffsetInByte)%sizeof(pBuffer)!=0)
|
||||
{
|
||||
i-=sizeof(pBuffer);
|
||||
for( ; i<w25qxx.BlockSize; i++)
|
||||
{
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
WorkAddress=(i+Block_Address*w25qxx.BlockSize);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WorkAddress & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WorkAddress & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WorkAddress & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WorkAddress & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,1,100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
if(pBuffer[0]!=0xFF)
|
||||
goto NOT_EMPTY;
|
||||
}
|
||||
}
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckBlock is Empty in %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return true;
|
||||
NOT_EMPTY:
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx CheckBlock is Not Empty in %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
return false;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WriteByte(uint8_t pBuffer, uint32_t WriteAddr_inBytes)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
printf("w25qxx WriteByte 0x%02X at address %d begin...",pBuffer,WriteAddr_inBytes);
|
||||
#endif
|
||||
W25qxx_WaitForWriteEnd();
|
||||
W25qxx_WriteEnable();
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x02);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((WriteAddr_inBytes & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((WriteAddr_inBytes & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((WriteAddr_inBytes & 0xFF00) >> 8);
|
||||
W25qxx_Spi(WriteAddr_inBytes & 0xFF);
|
||||
W25qxx_Spi(pBuffer);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_WaitForWriteEnd();
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx WriteByte done after %d ms\r\n",HAL_GetTick()-StartTime);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WritePage(uint8_t *pBuffer ,uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToWrite_up_to_PageSize)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
if(((NumByteToWrite_up_to_PageSize+OffsetInByte)>w25qxx.PageSize)||(NumByteToWrite_up_to_PageSize==0))
|
||||
NumByteToWrite_up_to_PageSize=w25qxx.PageSize-OffsetInByte;
|
||||
if((OffsetInByte+NumByteToWrite_up_to_PageSize) > w25qxx.PageSize)
|
||||
NumByteToWrite_up_to_PageSize = w25qxx.PageSize-OffsetInByte;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx WritePage:%d, Offset:%d ,Writes %d Bytes, begin...\r\n",Page_Address,OffsetInByte,NumByteToWrite_up_to_PageSize);
|
||||
W25qxx_Delay(100);
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
#endif
|
||||
W25qxx_WaitForWriteEnd();
|
||||
W25qxx_WriteEnable();
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x02);
|
||||
Page_Address = (Page_Address*w25qxx.PageSize)+OffsetInByte;
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((Page_Address & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((Page_Address & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((Page_Address & 0xFF00) >> 8);
|
||||
W25qxx_Spi(Page_Address&0xFF);
|
||||
HAL_SPI_Transmit(&_W25QXX_SPI,pBuffer,NumByteToWrite_up_to_PageSize,100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
W25qxx_WaitForWriteEnd();
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
StartTime = HAL_GetTick()-StartTime;
|
||||
for(uint32_t i=0;i<NumByteToWrite_up_to_PageSize ; i++)
|
||||
{
|
||||
if((i%8==0)&&(i>2))
|
||||
{
|
||||
printf("\r\n");
|
||||
W25qxx_Delay(10);
|
||||
}
|
||||
printf("0x%02X,",pBuffer[i]);
|
||||
}
|
||||
printf("\r\n");
|
||||
printf("w25qxx WritePage done after %d ms\r\n",StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WriteSector(uint8_t *pBuffer ,uint32_t Sector_Address,uint32_t OffsetInByte ,uint32_t NumByteToWrite_up_to_SectorSize)
|
||||
{
|
||||
if((NumByteToWrite_up_to_SectorSize>w25qxx.SectorSize)||(NumByteToWrite_up_to_SectorSize==0))
|
||||
NumByteToWrite_up_to_SectorSize=w25qxx.SectorSize;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("+++w25qxx WriteSector:%d, Offset:%d ,Write %d Bytes, begin...\r\n",Sector_Address,OffsetInByte,NumByteToWrite_up_to_SectorSize);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
if(OffsetInByte>=w25qxx.SectorSize)
|
||||
{
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx WriteSector Faild!\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
uint32_t StartPage;
|
||||
int32_t BytesToWrite;
|
||||
uint32_t LocalOffset;
|
||||
if((OffsetInByte+NumByteToWrite_up_to_SectorSize) > w25qxx.SectorSize)
|
||||
BytesToWrite = w25qxx.SectorSize-OffsetInByte;
|
||||
else
|
||||
BytesToWrite = NumByteToWrite_up_to_SectorSize;
|
||||
StartPage = W25qxx_SectorToPage(Sector_Address)+(OffsetInByte/w25qxx.PageSize);
|
||||
LocalOffset = OffsetInByte%w25qxx.PageSize;
|
||||
do
|
||||
{
|
||||
W25qxx_WritePage(pBuffer,StartPage,LocalOffset,BytesToWrite);
|
||||
StartPage++;
|
||||
BytesToWrite-=w25qxx.PageSize-LocalOffset;
|
||||
pBuffer+=w25qxx.PageSize;
|
||||
LocalOffset=0;
|
||||
}while(BytesToWrite>0);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx WriteSector Done\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_WriteBlock (uint8_t* pBuffer ,uint32_t Block_Address ,uint32_t OffsetInByte ,uint32_t NumByteToWrite_up_to_BlockSize)
|
||||
{
|
||||
if((NumByteToWrite_up_to_BlockSize>w25qxx.BlockSize)||(NumByteToWrite_up_to_BlockSize==0))
|
||||
NumByteToWrite_up_to_BlockSize=w25qxx.BlockSize;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("+++w25qxx WriteBlock:%d, Offset:%d ,Write %d Bytes, begin...\r\n",Block_Address,OffsetInByte,NumByteToWrite_up_to_BlockSize);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
if(OffsetInByte>=w25qxx.BlockSize)
|
||||
{
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx WriteBlock Faild!\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
uint32_t StartPage;
|
||||
int32_t BytesToWrite;
|
||||
uint32_t LocalOffset;
|
||||
if((OffsetInByte+NumByteToWrite_up_to_BlockSize) > w25qxx.BlockSize)
|
||||
BytesToWrite = w25qxx.BlockSize-OffsetInByte;
|
||||
else
|
||||
BytesToWrite = NumByteToWrite_up_to_BlockSize;
|
||||
StartPage = W25qxx_BlockToPage(Block_Address)+(OffsetInByte/w25qxx.PageSize);
|
||||
LocalOffset = OffsetInByte%w25qxx.PageSize;
|
||||
do
|
||||
{
|
||||
W25qxx_WritePage(pBuffer,StartPage,LocalOffset,BytesToWrite);
|
||||
StartPage++;
|
||||
BytesToWrite-=w25qxx.PageSize-LocalOffset;
|
||||
pBuffer+=w25qxx.PageSize;
|
||||
LocalOffset=0;
|
||||
}while(BytesToWrite>0);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx WriteBlock Done\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_ReadByte(uint8_t *pBuffer,uint32_t Bytes_Address)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
printf("w25qxx ReadByte at address %d begin...\r\n",Bytes_Address);
|
||||
#endif
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((Bytes_Address & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((Bytes_Address & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((Bytes_Address& 0xFF00) >> 8);
|
||||
W25qxx_Spi(Bytes_Address & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
*pBuffer = W25qxx_Spi(W25QXX_DUMMY_BYTE);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx ReadByte 0x%02X done after %d ms\r\n",*pBuffer,HAL_GetTick()-StartTime);
|
||||
#endif
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_ReadBytes(uint8_t* pBuffer, uint32_t ReadAddr, uint32_t NumByteToRead)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
printf("w25qxx ReadBytes at Address:%d, %d Bytes begin...\r\n",ReadAddr,NumByteToRead);
|
||||
#endif
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((ReadAddr & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((ReadAddr & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((ReadAddr& 0xFF00) >> 8);
|
||||
W25qxx_Spi(ReadAddr & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,NumByteToRead,2000);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
StartTime = HAL_GetTick()-StartTime;
|
||||
for(uint32_t i=0;i<NumByteToRead ; i++)
|
||||
{
|
||||
if((i%8==0)&&(i>2))
|
||||
{
|
||||
printf("\r\n");
|
||||
W25qxx_Delay(10);
|
||||
}
|
||||
printf("0x%02X,",pBuffer[i]);
|
||||
}
|
||||
printf("\r\n");
|
||||
printf("w25qxx ReadBytes done after %d ms\r\n",StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_ReadPage(uint8_t *pBuffer,uint32_t Page_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_PageSize)
|
||||
{
|
||||
while(w25qxx.Lock==1)
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=1;
|
||||
if((NumByteToRead_up_to_PageSize>w25qxx.PageSize)||(NumByteToRead_up_to_PageSize==0))
|
||||
NumByteToRead_up_to_PageSize=w25qxx.PageSize;
|
||||
if((OffsetInByte+NumByteToRead_up_to_PageSize) > w25qxx.PageSize)
|
||||
NumByteToRead_up_to_PageSize = w25qxx.PageSize-OffsetInByte;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx ReadPage:%d, Offset:%d ,Read %d Bytes, begin...\r\n",Page_Address,OffsetInByte,NumByteToRead_up_to_PageSize);
|
||||
W25qxx_Delay(100);
|
||||
uint32_t StartTime=HAL_GetTick();
|
||||
#endif
|
||||
Page_Address = Page_Address*w25qxx.PageSize+OffsetInByte;
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_RESET);
|
||||
W25qxx_Spi(0x0B);
|
||||
if(w25qxx.ID>=W25Q256)
|
||||
W25qxx_Spi((Page_Address & 0xFF000000) >> 24);
|
||||
W25qxx_Spi((Page_Address & 0xFF0000) >> 16);
|
||||
W25qxx_Spi((Page_Address& 0xFF00) >> 8);
|
||||
W25qxx_Spi(Page_Address & 0xFF);
|
||||
W25qxx_Spi(0);
|
||||
HAL_SPI_Receive(&_W25QXX_SPI,pBuffer,NumByteToRead_up_to_PageSize,100);
|
||||
HAL_GPIO_WritePin(_W25QXX_CS_GPIO,_W25QXX_CS_PIN,GPIO_PIN_SET);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
StartTime = HAL_GetTick()-StartTime;
|
||||
for(uint32_t i=0;i<NumByteToRead_up_to_PageSize ; i++)
|
||||
{
|
||||
if((i%8==0)&&(i>2))
|
||||
{
|
||||
printf("\r\n");
|
||||
W25qxx_Delay(10);
|
||||
}
|
||||
printf("0x%02X,",pBuffer[i]);
|
||||
}
|
||||
printf("\r\n");
|
||||
printf("w25qxx ReadPage done after %d ms\r\n",StartTime);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
W25qxx_Delay(1);
|
||||
w25qxx.Lock=0;
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_ReadSector(uint8_t *pBuffer,uint32_t Sector_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_SectorSize)
|
||||
{
|
||||
if((NumByteToRead_up_to_SectorSize>w25qxx.SectorSize)||(NumByteToRead_up_to_SectorSize==0))
|
||||
NumByteToRead_up_to_SectorSize=w25qxx.SectorSize;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("+++w25qxx ReadSector:%d, Offset:%d ,Read %d Bytes, begin...\r\n",Sector_Address,OffsetInByte,NumByteToRead_up_to_SectorSize);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
if(OffsetInByte>=w25qxx.SectorSize)
|
||||
{
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx ReadSector Faild!\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
uint32_t StartPage;
|
||||
int32_t BytesToRead;
|
||||
uint32_t LocalOffset;
|
||||
if((OffsetInByte+NumByteToRead_up_to_SectorSize) > w25qxx.SectorSize)
|
||||
BytesToRead = w25qxx.SectorSize-OffsetInByte;
|
||||
else
|
||||
BytesToRead = NumByteToRead_up_to_SectorSize;
|
||||
StartPage = W25qxx_SectorToPage(Sector_Address)+(OffsetInByte/w25qxx.PageSize);
|
||||
LocalOffset = OffsetInByte%w25qxx.PageSize;
|
||||
do
|
||||
{
|
||||
W25qxx_ReadPage(pBuffer,StartPage,LocalOffset,BytesToRead);
|
||||
StartPage++;
|
||||
BytesToRead-=w25qxx.PageSize-LocalOffset;
|
||||
pBuffer+=w25qxx.PageSize;
|
||||
LocalOffset=0;
|
||||
}while(BytesToRead>0);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx ReadSector Done\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
}
|
||||
//###################################################################################################################
|
||||
void W25qxx_ReadBlock(uint8_t* pBuffer,uint32_t Block_Address,uint32_t OffsetInByte,uint32_t NumByteToRead_up_to_BlockSize)
|
||||
{
|
||||
if((NumByteToRead_up_to_BlockSize>w25qxx.BlockSize)||(NumByteToRead_up_to_BlockSize==0))
|
||||
NumByteToRead_up_to_BlockSize=w25qxx.BlockSize;
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("+++w25qxx ReadBlock:%d, Offset:%d ,Read %d Bytes, begin...\r\n",Block_Address,OffsetInByte,NumByteToRead_up_to_BlockSize);
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
if(OffsetInByte>=w25qxx.BlockSize)
|
||||
{
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("w25qxx ReadBlock Faild!\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
uint32_t StartPage;
|
||||
int32_t BytesToRead;
|
||||
uint32_t LocalOffset;
|
||||
if((OffsetInByte+NumByteToRead_up_to_BlockSize) > w25qxx.BlockSize)
|
||||
BytesToRead = w25qxx.BlockSize-OffsetInByte;
|
||||
else
|
||||
BytesToRead = NumByteToRead_up_to_BlockSize;
|
||||
StartPage = W25qxx_BlockToPage(Block_Address)+(OffsetInByte/w25qxx.PageSize);
|
||||
LocalOffset = OffsetInByte%w25qxx.PageSize;
|
||||
do
|
||||
{
|
||||
W25qxx_ReadPage(pBuffer,StartPage,LocalOffset,BytesToRead);
|
||||
StartPage++;
|
||||
BytesToRead-=w25qxx.PageSize-LocalOffset;
|
||||
pBuffer+=w25qxx.PageSize;
|
||||
LocalOffset=0;
|
||||
}while(BytesToRead>0);
|
||||
#if (_W25QXX_DEBUG==1)
|
||||
printf("---w25qxx ReadBlock Done\r\n");
|
||||
W25qxx_Delay(100);
|
||||
#endif
|
||||
}
|
||||
//###################################################################################################################
|
|
@ -23,6 +23,7 @@
|
|||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
extern DMA_HandleTypeDef hdma_tim2_ch2_ch4;
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
@ -151,8 +152,6 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
|||
|
||||
}
|
||||
|
||||
static uint32_t HAL_RCC_CAN1_CLK_ENABLED=0;
|
||||
|
||||
/**
|
||||
* @brief CAN MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
@ -168,10 +167,7 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
|
|||
|
||||
/* USER CODE END CAN1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
HAL_RCC_CAN1_CLK_ENABLED++;
|
||||
if(HAL_RCC_CAN1_CLK_ENABLED==1){
|
||||
__HAL_RCC_CAN1_CLK_ENABLE();
|
||||
}
|
||||
__HAL_RCC_CAN1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**CAN1 GPIO Configuration
|
||||
|
@ -192,37 +188,6 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
|
|||
|
||||
/* USER CODE END CAN1_MspInit 1 */
|
||||
}
|
||||
else if(hcan->Instance==CAN2)
|
||||
{
|
||||
/* USER CODE BEGIN CAN2_MspInit 0 */
|
||||
|
||||
/* USER CODE END CAN2_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_CAN2_CLK_ENABLE();
|
||||
HAL_RCC_CAN1_CLK_ENABLED++;
|
||||
if(HAL_RCC_CAN1_CLK_ENABLED==1){
|
||||
__HAL_RCC_CAN1_CLK_ENABLE();
|
||||
}
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**CAN2 GPIO Configuration
|
||||
PB12 ------> CAN2_RX
|
||||
PB13 ------> CAN2_TX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* CAN2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
|
||||
/* USER CODE BEGIN CAN2_MspInit 1 */
|
||||
|
||||
/* USER CODE END CAN2_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
@ -240,10 +205,7 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
|
|||
|
||||
/* USER CODE END CAN1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
HAL_RCC_CAN1_CLK_ENABLED--;
|
||||
if(HAL_RCC_CAN1_CLK_ENABLED==0){
|
||||
__HAL_RCC_CAN1_CLK_DISABLE();
|
||||
}
|
||||
__HAL_RCC_CAN1_CLK_DISABLE();
|
||||
|
||||
/**CAN1 GPIO Configuration
|
||||
PB8 ------> CAN1_RX
|
||||
|
@ -257,30 +219,6 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
|
|||
|
||||
/* USER CODE END CAN1_MspDeInit 1 */
|
||||
}
|
||||
else if(hcan->Instance==CAN2)
|
||||
{
|
||||
/* USER CODE BEGIN CAN2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END CAN2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_CAN2_CLK_DISABLE();
|
||||
HAL_RCC_CAN1_CLK_ENABLED--;
|
||||
if(HAL_RCC_CAN1_CLK_ENABLED==0){
|
||||
__HAL_RCC_CAN1_CLK_DISABLE();
|
||||
}
|
||||
|
||||
/**CAN2 GPIO Configuration
|
||||
PB12 ------> CAN2_RX
|
||||
PB13 ------> CAN2_TX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13);
|
||||
|
||||
/* CAN2 interrupt DeInit */
|
||||
HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
|
||||
/* USER CODE BEGIN CAN2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END CAN2_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
@ -378,73 +316,6 @@ void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hi2c: I2C handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hi2c->Instance==I2C2)
|
||||
{
|
||||
/* USER CODE BEGIN I2C2_MspInit 0 */
|
||||
|
||||
/* USER CODE END I2C2_MspInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
/**I2C2 GPIO Configuration
|
||||
PH4 ------> I2C2_SCL
|
||||
PH5 ------> I2C2_SDA
|
||||
*/
|
||||
GPIO_InitStruct.Pin = I2C2_SCL_PH4_Pin|I2C2_SDA_PH5_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF4_I2C2;
|
||||
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_I2C2_CLK_ENABLE();
|
||||
/* USER CODE BEGIN I2C2_MspInit 1 */
|
||||
|
||||
/* USER CODE END I2C2_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief I2C MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hi2c: I2C handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
|
||||
{
|
||||
if(hi2c->Instance==I2C2)
|
||||
{
|
||||
/* USER CODE BEGIN I2C2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END I2C2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_I2C2_CLK_DISABLE();
|
||||
|
||||
/**I2C2 GPIO Configuration
|
||||
PH4 ------> I2C2_SCL
|
||||
PH5 ------> I2C2_SDA
|
||||
*/
|
||||
HAL_GPIO_DeInit(I2C2_SCL_PH4_GPIO_Port, I2C2_SCL_PH4_Pin);
|
||||
|
||||
HAL_GPIO_DeInit(I2C2_SDA_PH5_GPIO_Port, I2C2_SDA_PH5_Pin);
|
||||
|
||||
/* USER CODE BEGIN I2C2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END I2C2_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LTDC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
@ -464,9 +335,9 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
|
|||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 60;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_4;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
|
@ -631,117 +502,6 @@ void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**SPI1 GPIO Configuration
|
||||
PB3 ------> SPI1_SCK
|
||||
PB4 ------> SPI1_MISO
|
||||
PB5 ------> SPI1_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
else if(hspi->Instance==SPI3)
|
||||
{
|
||||
/* USER CODE BEGIN SPI3_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI3_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI3_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
/**SPI3 GPIO Configuration
|
||||
PC10 ------> SPI3_SCK
|
||||
PC11 ------> SPI3_MISO
|
||||
PC12 ------> SPI3_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI3_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI3_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PB3 ------> SPI1_SCK
|
||||
PB4 ------> SPI1_MISO
|
||||
PB5 ------> SPI1_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
}
|
||||
else if(hspi->Instance==SPI3)
|
||||
{
|
||||
/* USER CODE BEGIN SPI3_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI3_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI3_CLK_DISABLE();
|
||||
|
||||
/**SPI3 GPIO Configuration
|
||||
PC10 ------> SPI3_SCK
|
||||
PC11 ------> SPI3_MISO
|
||||
PC12 ------> SPI3_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12);
|
||||
|
||||
/* USER CODE BEGIN SPI3_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI3_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
@ -750,6 +510,7 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
|||
*/
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
@ -761,6 +522,54 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
|||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM2 GPIO Configuration
|
||||
PA2 ------> TIM2_CH3
|
||||
*/
|
||||
GPIO_InitStruct.Pin = LED_TIM2_CH3_PA2_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
|
||||
HAL_GPIO_Init(LED_TIM2_CH3_PA2_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* TIM2 DMA Init */
|
||||
/* TIM2_CH2_CH4 Init */
|
||||
hdma_tim2_ch2_ch4.Instance = DMA1_Stream6;
|
||||
hdma_tim2_ch2_ch4.Init.Channel = DMA_CHANNEL_3;
|
||||
hdma_tim2_ch2_ch4.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_tim2_ch2_ch4.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_tim2_ch2_ch4.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_tim2_ch2_ch4.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
hdma_tim2_ch2_ch4.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_tim2_ch2_ch4.Init.Mode = DMA_NORMAL;
|
||||
hdma_tim2_ch2_ch4.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_tim2_ch2_ch4.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
|
||||
hdma_tim2_ch2_ch4.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||
hdma_tim2_ch2_ch4.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||
hdma_tim2_ch2_ch4.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||
if (HAL_DMA_Init(&hdma_tim2_ch2_ch4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Several peripheral DMA handle pointers point to the same DMA handle.
|
||||
Be aware that there is only one stream to perform all the requested DMAs. */
|
||||
__HAL_LINKDMA(htim_base,hdma[TIM_DMA_ID_CC2],hdma_tim2_ch2_ch4);
|
||||
__HAL_LINKDMA(htim_base,hdma[TIM_DMA_ID_CC4],hdma_tim2_ch2_ch4);
|
||||
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM13)
|
||||
{
|
||||
/* USER CODE BEGIN TIM13_MspInit 0 */
|
||||
|
@ -775,28 +584,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_PWM MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_pwm: TIM_PWM handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
|
||||
{
|
||||
if(htim_pwm->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
|
@ -808,14 +595,13 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
|||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM2 GPIO Configuration
|
||||
PA1 ------> TIM2_CH2
|
||||
PA2 ------> TIM2_CH3
|
||||
*/
|
||||
GPIO_InitStruct.Pin = LED_TIM2_CH2_PA1_Pin|LED_TIM2_CH3_PA2_Pin;
|
||||
GPIO_InitStruct.Pin = LED_TIM2_CH2_PA1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
HAL_GPIO_Init(LED_TIM2_CH2_PA1_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM2_MspPostInit 1 */
|
||||
|
||||
|
@ -863,6 +649,27 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
|||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
|
||||
/**TIM2 GPIO Configuration
|
||||
PA1 ------> TIM2_CH2
|
||||
PA2 ------> TIM2_CH3
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, LED_TIM2_CH2_PA1_Pin|LED_TIM2_CH3_PA2_Pin);
|
||||
|
||||
/* TIM2 DMA DeInit */
|
||||
HAL_DMA_DeInit(htim_base->hdma[TIM_DMA_ID_CC2]);
|
||||
HAL_DMA_DeInit(htim_base->hdma[TIM_DMA_ID_CC4]);
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM13)
|
||||
{
|
||||
/* USER CODE BEGIN TIM13_MspDeInit 0 */
|
||||
|
@ -877,135 +684,6 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_PWM MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_pwm: TIM_PWM handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
|
||||
{
|
||||
if(htim_pwm->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPS_UART1_RX_Pin|GPS_UART1_TX_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
}
|
||||
else if(huart->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART3_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**USART3 GPIO Configuration
|
||||
PB10 ------> USART3_TX
|
||||
PB11 ------> USART3_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = ESP_TX_Pin|ESP_RX_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART3_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART3_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPS_UART1_RX_Pin|GPS_UART1_TX_Pin);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
else if(huart->Instance==USART3)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART3_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART3_CLK_DISABLE();
|
||||
|
||||
/**USART3 GPIO Configuration
|
||||
PB10 ------> USART3_TX
|
||||
PB11 ------> USART3_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, ESP_TX_Pin|ESP_RX_Pin);
|
||||
|
||||
/* USER CODE BEGIN USART3_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART3_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static uint32_t FMC_Initialized = 0;
|
||||
|
||||
static void HAL_FMC_MspInit(void){
|
||||
|
|
|
@ -58,10 +58,10 @@
|
|||
/* External variables --------------------------------------------------------*/
|
||||
extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
|
||||
extern CAN_HandleTypeDef hcan1;
|
||||
extern CAN_HandleTypeDef hcan2;
|
||||
extern DMA2D_HandleTypeDef hdma2d;
|
||||
extern SDRAM_HandleTypeDef hsdram1;
|
||||
extern LTDC_HandleTypeDef hltdc;
|
||||
extern DMA_HandleTypeDef hdma_tim2_ch2_ch4;
|
||||
extern TIM_HandleTypeDef htim6;
|
||||
|
||||
/* USER CODE BEGIN EV */
|
||||
|
@ -166,6 +166,20 @@ void DebugMon_Handler(void)
|
|||
/* please refer to the startup file (startup_stm32f4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream6 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream6_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
|
||||
DMA_Callback();
|
||||
/* USER CODE END DMA1_Stream6_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_tim2_ch2_ch4);
|
||||
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Stream6_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN1 RX0 interrupts.
|
||||
*/
|
||||
|
@ -208,20 +222,6 @@ void TIM6_DAC_IRQHandler(void)
|
|||
/* USER CODE END TIM6_DAC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles CAN2 RX0 interrupts.
|
||||
*/
|
||||
void CAN2_RX0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN CAN2_RX0_IRQn 0 */
|
||||
|
||||
/* USER CODE END CAN2_RX0_IRQn 0 */
|
||||
HAL_CAN_IRQHandler(&hcan2);
|
||||
/* USER CODE BEGIN CAN2_RX0_IRQn 1 */
|
||||
|
||||
/* USER CODE END CAN2_RX0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USB On The Go FS global interrupt.
|
||||
*/
|
||||
|
|
|
@ -1,741 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of I2C HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_I2C_H
|
||||
#define __STM32F4xx_HAL_I2C_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2C
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup I2C_Exported_Types I2C Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
|
||||
* @brief I2C Configuration Structure definition
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ClockSpeed; /*!< Specifies the clock frequency.
|
||||
This parameter must be set to a value lower than 400kHz */
|
||||
|
||||
uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
|
||||
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
||||
|
||||
uint32_t OwnAddress1; /*!< Specifies the first device own address.
|
||||
This parameter can be a 7-bit or 10-bit address. */
|
||||
|
||||
uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
|
||||
This parameter can be a value of @ref I2C_addressing_mode */
|
||||
|
||||
uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
|
||||
This parameter can be a value of @ref I2C_dual_addressing_mode */
|
||||
|
||||
uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
|
||||
This parameter can be a 7-bit address. */
|
||||
|
||||
uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
|
||||
This parameter can be a value of @ref I2C_general_call_addressing_mode */
|
||||
|
||||
uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
|
||||
This parameter can be a value of @ref I2C_nostretch_mode */
|
||||
|
||||
} I2C_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_state_structure_definition HAL state structure definition
|
||||
* @brief HAL State structure definition
|
||||
* @note HAL I2C State value coding follow below described bitmap :
|
||||
* b7-b6 Error information
|
||||
* 00 : No Error
|
||||
* 01 : Abort (Abort user request on going)
|
||||
* 10 : Timeout
|
||||
* 11 : Error
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
|
||||
* b4 (not used)
|
||||
* x : Should be set to 0
|
||||
* b3
|
||||
* 0 : Ready or Busy (No Listen mode ongoing)
|
||||
* 1 : Listen (Peripheral in Address Listen Mode)
|
||||
* b2 Intrinsic process state
|
||||
* 0 : Ready
|
||||
* 1 : Busy (Peripheral busy with some configuration or internal operations)
|
||||
* b1 Rx state
|
||||
* 0 : Ready (no Rx operation ongoing)
|
||||
* 1 : Busy (Rx operation ongoing)
|
||||
* b0 Tx state
|
||||
* 0 : Ready (no Tx operation ongoing)
|
||||
* 1 : Busy (Tx operation ongoing)
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
|
||||
HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
|
||||
HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
|
||||
HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
|
||||
HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
|
||||
HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
|
||||
process is ongoing */
|
||||
HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
|
||||
process is ongoing */
|
||||
HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
|
||||
HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
|
||||
HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
|
||||
|
||||
} HAL_I2C_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_mode_structure_definition HAL mode structure definition
|
||||
* @brief HAL Mode structure definition
|
||||
* @note HAL I2C Mode value coding follow below described bitmap :\n
|
||||
* b7 (not used)\n
|
||||
* x : Should be set to 0\n
|
||||
* b6\n
|
||||
* 0 : None\n
|
||||
* 1 : Memory (HAL I2C communication is in Memory Mode)\n
|
||||
* b5\n
|
||||
* 0 : None\n
|
||||
* 1 : Slave (HAL I2C communication is in Slave Mode)\n
|
||||
* b4\n
|
||||
* 0 : None\n
|
||||
* 1 : Master (HAL I2C communication is in Master Mode)\n
|
||||
* b3-b2-b1-b0 (not used)\n
|
||||
* xxxx : Should be set to 0000
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
|
||||
HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
|
||||
HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
|
||||
HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
|
||||
|
||||
} HAL_I2C_ModeTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Error_Code_definition I2C Error Code definition
|
||||
* @brief I2C Error Code definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */
|
||||
#define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */
|
||||
#define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */
|
||||
#define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */
|
||||
#define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */
|
||||
#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
|
||||
#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
|
||||
#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
|
||||
#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
|
||||
* @brief I2C handle Structure definition
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __I2C_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
{
|
||||
I2C_TypeDef *Instance; /*!< I2C registers base address */
|
||||
|
||||
I2C_InitTypeDef Init; /*!< I2C communication parameters */
|
||||
|
||||
uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
|
||||
|
||||
uint16_t XferSize; /*!< I2C transfer size */
|
||||
|
||||
__IO uint16_t XferCount; /*!< I2C transfer counter */
|
||||
|
||||
__IO uint32_t XferOptions; /*!< I2C transfer options */
|
||||
|
||||
__IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
|
||||
context for internal usage */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< I2C locking object */
|
||||
|
||||
__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
|
||||
|
||||
__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< I2C Error code */
|
||||
|
||||
__IO uint32_t Devaddress; /*!< I2C Target device address */
|
||||
|
||||
__IO uint32_t Memaddress; /*!< I2C Target memory address */
|
||||
|
||||
__IO uint32_t MemaddSize; /*!< I2C Target memory address size */
|
||||
|
||||
__IO uint32_t EventCount; /*!< I2C Event counter */
|
||||
|
||||
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */
|
||||
void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */
|
||||
void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */
|
||||
void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */
|
||||
void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */
|
||||
void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */
|
||||
void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */
|
||||
void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */
|
||||
void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */
|
||||
|
||||
void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */
|
||||
|
||||
void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
} I2C_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL I2C Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
|
||||
HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
|
||||
HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
|
||||
HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
|
||||
HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
|
||||
HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
|
||||
HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
|
||||
HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
|
||||
HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
|
||||
|
||||
HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
|
||||
HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
|
||||
|
||||
} HAL_I2C_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL I2C Callback pointer definition
|
||||
*/
|
||||
typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
|
||||
typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
|
||||
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup I2C_Exported_Constants I2C Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
|
||||
* @{
|
||||
*/
|
||||
#define I2C_DUTYCYCLE_2 0x00000000U
|
||||
#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_addressing_mode I2C addressing mode
|
||||
* @{
|
||||
*/
|
||||
#define I2C_ADDRESSINGMODE_7BIT 0x00004000U
|
||||
#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
|
||||
* @{
|
||||
*/
|
||||
#define I2C_DUALADDRESS_DISABLE 0x00000000U
|
||||
#define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
|
||||
* @{
|
||||
*/
|
||||
#define I2C_GENERALCALL_DISABLE 0x00000000U
|
||||
#define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_nostretch_mode I2C nostretch mode
|
||||
* @{
|
||||
*/
|
||||
#define I2C_NOSTRETCH_DISABLE 0x00000000U
|
||||
#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
|
||||
* @{
|
||||
*/
|
||||
#define I2C_MEMADD_SIZE_8BIT 0x00000001U
|
||||
#define I2C_MEMADD_SIZE_16BIT 0x00000010U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
|
||||
* @{
|
||||
*/
|
||||
#define I2C_DIRECTION_RECEIVE 0x00000000U
|
||||
#define I2C_DIRECTION_TRANSMIT 0x00000001U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_XferOptions_definition I2C XferOptions definition
|
||||
* @{
|
||||
*/
|
||||
#define I2C_FIRST_FRAME 0x00000001U
|
||||
#define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
|
||||
#define I2C_NEXT_FRAME 0x00000004U
|
||||
#define I2C_FIRST_AND_LAST_FRAME 0x00000008U
|
||||
#define I2C_LAST_FRAME_NO_STOP 0x00000010U
|
||||
#define I2C_LAST_FRAME 0x00000020U
|
||||
|
||||
/* List of XferOptions in usage of :
|
||||
* 1- Restart condition in all use cases (direction change or not)
|
||||
*/
|
||||
#define I2C_OTHER_FRAME (0x00AA0000U)
|
||||
#define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
|
||||
* @brief I2C Interrupt definition
|
||||
* Elements values convention: 0xXXXXXXXX
|
||||
* - XXXXXXXX : Interrupt control mask
|
||||
* @{
|
||||
*/
|
||||
#define I2C_IT_BUF I2C_CR2_ITBUFEN
|
||||
#define I2C_IT_EVT I2C_CR2_ITEVTEN
|
||||
#define I2C_IT_ERR I2C_CR2_ITERREN
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Flag_definition I2C Flag definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_FLAG_OVR 0x00010800U
|
||||
#define I2C_FLAG_AF 0x00010400U
|
||||
#define I2C_FLAG_ARLO 0x00010200U
|
||||
#define I2C_FLAG_BERR 0x00010100U
|
||||
#define I2C_FLAG_TXE 0x00010080U
|
||||
#define I2C_FLAG_RXNE 0x00010040U
|
||||
#define I2C_FLAG_STOPF 0x00010010U
|
||||
#define I2C_FLAG_ADD10 0x00010008U
|
||||
#define I2C_FLAG_BTF 0x00010004U
|
||||
#define I2C_FLAG_ADDR 0x00010002U
|
||||
#define I2C_FLAG_SB 0x00010001U
|
||||
#define I2C_FLAG_DUALF 0x00100080U
|
||||
#define I2C_FLAG_GENCALL 0x00100010U
|
||||
#define I2C_FLAG_TRA 0x00100004U
|
||||
#define I2C_FLAG_BUSY 0x00100002U
|
||||
#define I2C_FLAG_MSL 0x00100001U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/** @defgroup I2C_Exported_Macros I2C Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset I2C handle state.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_I2C_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/** @brief Enable or disable the specified I2C interrupts.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_IT_BUF: Buffer interrupt enable
|
||||
* @arg I2C_IT_EVT: Event interrupt enable
|
||||
* @arg I2C_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
|
||||
#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Checks if the specified I2C interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @param __INTERRUPT__ specifies the I2C interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_IT_BUF: Buffer interrupt enable
|
||||
* @arg I2C_IT_EVT: Event interrupt enable
|
||||
* @arg I2C_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks whether the specified I2C flag is set or not.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_FLAG_OVR: Overrun/Underrun flag
|
||||
* @arg I2C_FLAG_AF: Acknowledge failure flag
|
||||
* @arg I2C_FLAG_ARLO: Arbitration lost flag
|
||||
* @arg I2C_FLAG_BERR: Bus error flag
|
||||
* @arg I2C_FLAG_TXE: Data register empty flag
|
||||
* @arg I2C_FLAG_RXNE: Data register not empty flag
|
||||
* @arg I2C_FLAG_STOPF: Stop detection flag
|
||||
* @arg I2C_FLAG_ADD10: 10-bit header sent flag
|
||||
* @arg I2C_FLAG_BTF: Byte transfer finished flag
|
||||
* @arg I2C_FLAG_ADDR: Address sent flag
|
||||
* Address matched flag
|
||||
* @arg I2C_FLAG_SB: Start bit flag
|
||||
* @arg I2C_FLAG_DUALF: Dual flag
|
||||
* @arg I2C_FLAG_GENCALL: General call header flag
|
||||
* @arg I2C_FLAG_TRA: Transmitter/Receiver flag
|
||||
* @arg I2C_FLAG_BUSY: Bus busy flag
|
||||
* @arg I2C_FLAG_MSL: Master/Slave flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
|
||||
(((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
|
||||
(((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
|
||||
|
||||
/** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @param __FLAG__ specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
|
||||
* @arg I2C_FLAG_AF: Acknowledge failure flag
|
||||
* @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
|
||||
* @arg I2C_FLAG_BERR: Bus error flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
|
||||
|
||||
/** @brief Clears the I2C ADDR pending flag.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR1; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR2; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0)
|
||||
|
||||
/** @brief Clears the I2C STOPF pending flag.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR1; \
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0)
|
||||
|
||||
/** @brief Enable the specified I2C peripheral.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
|
||||
|
||||
/** @brief Disable the specified I2C peripheral.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include I2C HAL Extension module */
|
||||
#include "stm32f4xx_hal_i2c_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup I2C_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions******************************/
|
||||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions ****************************************************/
|
||||
/******* Blocking mode: Polling */
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
|
||||
|
||||
/******* Non-Blocking mode: Interrupt */
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
|
||||
|
||||
/******* Non-Blocking mode: DMA */
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
||||
* @{
|
||||
*/
|
||||
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
||||
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
|
||||
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State, Mode and Error functions *********************************/
|
||||
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
|
||||
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
|
||||
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup I2C_Private_Constants I2C Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define I2C_FLAG_MASK 0x0000FFFFU
|
||||
#define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */
|
||||
#define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup I2C_Private_Macros I2C Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
|
||||
#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
|
||||
#define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
|
||||
#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
|
||||
#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
|
||||
#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
|
||||
#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
|
||||
((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
|
||||
((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
|
||||
|
||||
#define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
|
||||
#define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
|
||||
|
||||
#define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
|
||||
#define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
|
||||
#define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
|
||||
|
||||
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
|
||||
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
|
||||
|
||||
/** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
|
||||
* @{
|
||||
*/
|
||||
#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
|
||||
((CYCLE) == I2C_DUTYCYCLE_16_9))
|
||||
#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
|
||||
((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
|
||||
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
|
||||
((ADDRESS) == I2C_DUALADDRESS_ENABLE))
|
||||
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
|
||||
((CALL) == I2C_GENERALCALL_ENABLE))
|
||||
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
|
||||
((STRETCH) == I2C_NOSTRETCH_ENABLE))
|
||||
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
|
||||
((SIZE) == I2C_MEMADD_SIZE_16BIT))
|
||||
#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
|
||||
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
|
||||
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
|
||||
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
|
||||
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
|
||||
((REQUEST) == I2C_NEXT_FRAME) || \
|
||||
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
||||
((REQUEST) == I2C_LAST_FRAME) || \
|
||||
((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
|
||||
IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
|
||||
|
||||
#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
|
||||
((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
|
||||
|
||||
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
|
||||
#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup I2C_Private_Functions I2C Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F4xx_HAL_I2C_H */
|
||||
|
|
@ -1,115 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_i2c_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of I2C HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_I2C_EX_H
|
||||
#define __STM32F4xx_HAL_I2C_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Exported_Constants I2C Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx_Analog_Filter I2C Analog Filter
|
||||
* @{
|
||||
*/
|
||||
#define I2C_ANALOGFILTER_ENABLE 0x00000000U
|
||||
#define I2C_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup I2CEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Private_Constants I2C Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Private_Macros I2C Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
|
||||
((FILTER) == I2C_ANALOGFILTER_DISABLE))
|
||||
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_I2C_EX_H */
|
||||
|
||||
|
|
@ -1,729 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_spi.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of SPI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F4xx_HAL_SPI_H
|
||||
#define STM32F4xx_HAL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Types SPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Configuration Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_Mode */
|
||||
|
||||
uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
|
||||
This parameter can be a value of @ref SPI_Direction */
|
||||
|
||||
uint32_t DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_Data_Size */
|
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
|
||||
This parameter can be a value of @ref SPI_TI_mode */
|
||||
|
||||
uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
|
||||
This parameter can be a value of @ref SPI_CRC_Calculation */
|
||||
|
||||
uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
|
||||
This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */
|
||||
} SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI State structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
|
||||
HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
|
||||
HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */
|
||||
HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */
|
||||
} HAL_SPI_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI handle Structure definition
|
||||
*/
|
||||
typedef struct __SPI_HandleTypeDef
|
||||
{
|
||||
SPI_TypeDef *Instance; /*!< SPI registers base address */
|
||||
|
||||
SPI_InitTypeDef Init; /*!< SPI communication parameters */
|
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< SPI Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< SPI Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
|
||||
|
||||
void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */
|
||||
|
||||
void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
__IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< SPI Error code */
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */
|
||||
void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */
|
||||
void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */
|
||||
void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */
|
||||
void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */
|
||||
void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */
|
||||
void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */
|
||||
void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */
|
||||
void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
} SPI_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
/**
|
||||
* @brief HAL SPI Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */
|
||||
HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */
|
||||
HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */
|
||||
HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */
|
||||
HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */
|
||||
HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */
|
||||
HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */
|
||||
HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */
|
||||
HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */
|
||||
HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */
|
||||
|
||||
} HAL_SPI_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Constants SPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Error_Code SPI Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */
|
||||
#define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */
|
||||
#define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */
|
||||
#define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */
|
||||
#define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */
|
||||
#define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Mode SPI Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_MODE_SLAVE (0x00000000U)
|
||||
#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Direction SPI Direction Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DIRECTION_2LINES (0x00000000U)
|
||||
#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
|
||||
#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Data_Size SPI Data Size
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DATASIZE_8BIT (0x00000000U)
|
||||
#define SPI_DATASIZE_16BIT SPI_CR1_DFF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define SPI_POLARITY_LOW (0x00000000U)
|
||||
#define SPI_POLARITY_HIGH SPI_CR1_CPOL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase SPI Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define SPI_PHASE_1EDGE (0x00000000U)
|
||||
#define SPI_PHASE_2EDGE SPI_CR1_CPHA
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NSS_SOFT SPI_CR1_SSM
|
||||
#define SPI_NSS_HARD_INPUT (0x00000000U)
|
||||
#define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define SPI_BAUDRATEPRESCALER_2 (0x00000000U)
|
||||
#define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2)
|
||||
#define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FIRSTBIT_MSB (0x00000000U)
|
||||
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TI_mode SPI TI Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_TIMODE_DISABLE (0x00000000U)
|
||||
#define SPI_TIMODE_ENABLE SPI_CR2_FRF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
|
||||
* @{
|
||||
*/
|
||||
#define SPI_CRCCALCULATION_DISABLE (0x00000000U)
|
||||
#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_IT_TXE SPI_CR2_TXEIE
|
||||
#define SPI_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define SPI_IT_ERR SPI_CR2_ERRIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Flags_definition SPI Flags Definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
|
||||
#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
|
||||
#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
|
||||
#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
|
||||
#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
|
||||
#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
|
||||
#define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
|
||||
#define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\
|
||||
| SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Macros SPI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset SPI handle state.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_SPI_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Enable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI handle.
|
||||
* This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check whether the specified SPI interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the SPI CRCERR pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
|
||||
|
||||
/** @brief Clear the SPI MODF pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_modf = 0x00U; \
|
||||
tmpreg_modf = (__HANDLE__)->Instance->SR; \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
|
||||
UNUSED(tmpreg_modf); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the SPI OVR pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_ovr); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the SPI FRE pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_fre = 0x00U; \
|
||||
tmpreg_fre = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_fre); \
|
||||
}while(0U)
|
||||
|
||||
/** @brief Enable the SPI peripheral.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/** @brief Disable the SPI peripheral.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Macros SPI Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Set the SPI transmit-only mode.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Set the SPI receive-only mode.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Reset the CRC calculation of the SPI.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __SR__ copy of SPI SR register.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \
|
||||
((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI Interrupt is set or not.
|
||||
* @param __CR2__ copy of SPI CR2 register.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \
|
||||
(__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks if SPI Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Mode.
|
||||
* This parameter can be a value of @ref SPI_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \
|
||||
((__MODE__) == SPI_MODE_MASTER))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* This parameter can be a value of @ref SPI_Direction
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Data Size parameter is in allowed range.
|
||||
* @param __DATASIZE__ specifies the SPI Data Size.
|
||||
* This parameter can be a value of @ref SPI_Data_Size
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_8BIT))
|
||||
|
||||
/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__ specifies the SPI serial clock steady state.
|
||||
* This parameter can be a value of @ref SPI_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
|
||||
((__CPOL__) == SPI_POLARITY_HIGH))
|
||||
|
||||
/** @brief Checks if SPI Clock Phase parameter is in allowed range.
|
||||
* @param __CPHA__ specifies the SPI Clock Phase.
|
||||
* This parameter can be a value of @ref SPI_Clock_Phase
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
|
||||
((__CPHA__) == SPI_PHASE_2EDGE))
|
||||
|
||||
/** @brief Checks if SPI Slave Select parameter is in allowed range.
|
||||
* @param __NSS__ specifies the SPI Slave Select management parameter.
|
||||
* This parameter can be a value of @ref SPI_Slave_Select_management
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_INPUT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_OUTPUT))
|
||||
|
||||
/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
|
||||
* @param __PRESCALER__ specifies the SPI Baudrate prescaler.
|
||||
* This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
|
||||
* @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
|
||||
* This parameter can be a value of @ref SPI_MSB_LSB_transmission
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
|
||||
((__BIT__) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
/** @brief Checks if SPI TI mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI TI mode.
|
||||
* This parameter can be a value of @ref SPI_TI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
|
||||
((__MODE__) == SPI_TIMODE_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
|
||||
* @param __CALCULATION__ specifies the SPI CRC calculation enable state.
|
||||
* This parameter can be a value of @ref SPI_CRC_Calculation
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
|
||||
* @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation.
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \
|
||||
((__POLYNOMIAL__) <= 0xFFFFU) && \
|
||||
(((__POLYNOMIAL__)&0x1U) != 0U))
|
||||
|
||||
/** @brief Checks if DMA handle is valid.
|
||||
* @param __HANDLE__ specifies a DMA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
|
||||
pSPI_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* I/O operation functions ***************************************************/
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
|
||||
|
||||
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
|
||||
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32F4xx_HAL_SPI_H */
|
||||
|
|
@ -1,884 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_uart.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of UART HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_UART_H
|
||||
#define __STM32F4xx_HAL_UART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Types UART Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
|
||||
Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
|
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref UART_Word_Length */
|
||||
|
||||
uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref UART_Stop_Bits */
|
||||
|
||||
uint32_t Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref UART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref UART_Mode */
|
||||
|
||||
uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
|
||||
This parameter can be a value of @ref UART_Hardware_Flow_Control */
|
||||
|
||||
uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
|
||||
This parameter can be a value of @ref UART_Over_Sampling */
|
||||
} UART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART State structures definition
|
||||
* @note HAL UART State value is a combination of 2 different substates: gState and RxState.
|
||||
* - gState contains UART state information related to global Handle management
|
||||
* and also information related to Tx operations.
|
||||
* gState value coding follow below described bitmap :
|
||||
* b7-b6 Error information
|
||||
* 00 : No Error
|
||||
* 01 : (Not Used)
|
||||
* 10 : Timeout
|
||||
* 11 : Error
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral initialized. HAL UART Init function already called)
|
||||
* b4-b3 (not used)
|
||||
* xx : Should be set to 00
|
||||
* b2 Intrinsic process state
|
||||
* 0 : Ready
|
||||
* 1 : Busy (Peripheral busy with some configuration or internal operations)
|
||||
* b1 (not used)
|
||||
* x : Should be set to 0
|
||||
* b0 Tx state
|
||||
* 0 : Ready (no Tx operation ongoing)
|
||||
* 1 : Busy (Tx operation ongoing)
|
||||
* - RxState contains information related to Rx operations.
|
||||
* RxState value coding follow below described bitmap :
|
||||
* b7-b6 (not used)
|
||||
* xx : Should be set to 00
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral initialized)
|
||||
* b4-b2 (not used)
|
||||
* xxx : Should be set to 000
|
||||
* b1 Rx state
|
||||
* 0 : Ready (no Rx operation ongoing)
|
||||
* 1 : Busy (Rx operation ongoing)
|
||||
* b0 (not used)
|
||||
* x : Should be set to 0.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */
|
||||
HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
|
||||
Not to be used for neither gState nor RxState.
|
||||
Value is result of combination (Or) between gState and RxState values */
|
||||
HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
|
||||
Value is allowed for gState only */
|
||||
HAL_UART_STATE_ERROR = 0xE0U /*!< Error
|
||||
Value is allowed for gState only */
|
||||
} HAL_UART_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART Reception type definition
|
||||
* @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
|
||||
* It is expected to admit following values :
|
||||
* HAL_UART_RECEPTION_STANDARD = 0x00U,
|
||||
* HAL_UART_RECEPTION_TOIDLE = 0x01U,
|
||||
*/
|
||||
typedef uint32_t HAL_UART_RxTypeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART handle Structure definition
|
||||
*/
|
||||
typedef struct __UART_HandleTypeDef
|
||||
{
|
||||
USART_TypeDef *Instance; /*!< UART registers base address */
|
||||
|
||||
UART_InitTypeDef Init; /*!< UART communication parameters */
|
||||
|
||||
const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< UART Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< UART Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
|
||||
|
||||
__IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
|
||||
and also related to Tx operations.
|
||||
This parameter can be a value of @ref HAL_UART_StateTypeDef */
|
||||
|
||||
__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
|
||||
This parameter can be a value of @ref HAL_UART_StateTypeDef */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< UART Error code */
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
|
||||
void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
|
||||
void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
|
||||
void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
|
||||
void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
|
||||
void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
|
||||
void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
|
||||
void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
|
||||
void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
|
||||
void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */
|
||||
|
||||
void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
} UART_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL UART Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
|
||||
HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
|
||||
HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
|
||||
HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
|
||||
HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
|
||||
HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
|
||||
HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
|
||||
HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
|
||||
HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
|
||||
|
||||
HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
|
||||
HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
|
||||
|
||||
} HAL_UART_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL UART Callback pointer definition
|
||||
*/
|
||||
typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
|
||||
typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
|
||||
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Constants UART Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Error_Code UART Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
|
||||
#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
|
||||
#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
|
||||
#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
|
||||
#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Word_Length UART Word Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_WORDLENGTH_8B 0x00000000U
|
||||
#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Stop_Bits UART Number of Stop Bits
|
||||
* @{
|
||||
*/
|
||||
#define UART_STOPBITS_1 0x00000000U
|
||||
#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Parity UART Parity
|
||||
* @{
|
||||
*/
|
||||
#define UART_PARITY_NONE 0x00000000U
|
||||
#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
|
||||
#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
|
||||
* @{
|
||||
*/
|
||||
#define UART_HWCONTROL_NONE 0x00000000U
|
||||
#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
|
||||
#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
|
||||
#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Mode UART Transfer Mode
|
||||
* @{
|
||||
*/
|
||||
#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
|
||||
#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
|
||||
#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_State UART State
|
||||
* @{
|
||||
*/
|
||||
#define UART_STATE_DISABLE 0x00000000U
|
||||
#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Over_Sampling UART Over Sampling
|
||||
* @{
|
||||
*/
|
||||
#define UART_OVERSAMPLING_16 0x00000000U
|
||||
#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
|
||||
#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_WakeUp_functions UART Wakeup Functions
|
||||
* @{
|
||||
*/
|
||||
#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
|
||||
#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Flags UART FLags
|
||||
* Elements values convention: 0xXXXX
|
||||
* - 0xXXXX : Flag mask in the SR register
|
||||
* @{
|
||||
*/
|
||||
#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
|
||||
#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
|
||||
#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
|
||||
#define UART_FLAG_TC ((uint32_t)USART_SR_TC)
|
||||
#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
|
||||
#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
|
||||
#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
|
||||
#define UART_FLAG_NE ((uint32_t)USART_SR_NE)
|
||||
#define UART_FLAG_FE ((uint32_t)USART_SR_FE)
|
||||
#define UART_FLAG_PE ((uint32_t)USART_SR_PE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_Interrupt_definition UART Interrupt Definitions
|
||||
* Elements values convention: 0xY000XXXX
|
||||
* - XXXX : Interrupt mask (16 bits) in the Y register
|
||||
* - Y : Interrupt source register (2bits)
|
||||
* - 0001: CR1 register
|
||||
* - 0010: CR2 register
|
||||
* - 0011: CR3 register
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
|
||||
#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
|
||||
#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
|
||||
#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
|
||||
#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
|
||||
|
||||
#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
|
||||
|
||||
#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
|
||||
#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values
|
||||
* @{
|
||||
*/
|
||||
#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
|
||||
#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Exported_Macros UART Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset UART handle gstate & RxState
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0U)
|
||||
#else
|
||||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
|
||||
} while(0U)
|
||||
#endif /*USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Flushes the UART DR register
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
*/
|
||||
#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
|
||||
|
||||
/** @brief Checks whether the specified UART flag is set or not.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag
|
||||
* @arg UART_FLAG_TXE: Transmit data register empty flag
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag
|
||||
* @arg UART_FLAG_IDLE: Idle Line detection flag
|
||||
* @arg UART_FLAG_ORE: Overrun Error flag
|
||||
* @arg UART_FLAG_NE: Noise Error flag
|
||||
* @arg UART_FLAG_FE: Framing Error flag
|
||||
* @arg UART_FLAG_PE: Parity Error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clears the specified UART pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
|
||||
* @arg UART_FLAG_LBD: LIN Break detection flag.
|
||||
* @arg UART_FLAG_TC: Transmission Complete flag.
|
||||
* @arg UART_FLAG_RXNE: Receive data register not empty flag.
|
||||
*
|
||||
* @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
|
||||
* error) and IDLE (Idle line detected) flags are cleared by software
|
||||
* sequence: a read operation to USART_SR register followed by a read
|
||||
* operation to USART_DR register.
|
||||
* @note RXNE flag can be also cleared by a read to the USART_DR register.
|
||||
* @note TC flag can be also cleared by software sequence: a read operation to
|
||||
* USART_SR register followed by a write operation to USART_DR register.
|
||||
* @note TXE flag is cleared only by a write to the USART_DR register.
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
|
||||
|
||||
/** @brief Clears the UART PE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
tmpreg = (__HANDLE__)->Instance->DR; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clears the UART FE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART NE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART ORE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Clears the UART IDLE pending flag.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
|
||||
|
||||
/** @brief Enable the specified UART interrupt.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __INTERRUPT__ specifies the UART interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Disable the specified UART interrupt.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __INTERRUPT__ specifies the UART interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
|
||||
|
||||
/** @brief Checks whether the specified UART interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* UART Handle selects the USARTx or UARTy peripheral
|
||||
* (USART,UART availability and x,y values depending on device).
|
||||
* @param __IT__ specifies the UART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
||||
* @arg UART_IT_LBD: LIN Break detection interrupt
|
||||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt
|
||||
* @arg UART_IT_TC: Transmission complete interrupt
|
||||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt
|
||||
* @arg UART_IT_IDLE: Idle line detection interrupt
|
||||
* @arg UART_IT_ERR: Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
|
||||
|
||||
/** @brief Enable CTS flow control
|
||||
* @note This macro allows to enable CTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Disable CTS flow control
|
||||
* @note This macro allows to disable CTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Enable RTS flow control
|
||||
* This macro allows to enable RTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
|
||||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Disable RTS flow control
|
||||
* This macro allows to disable RTS hardware flow control for a given UART instance,
|
||||
* without need to call HAL_UART_Init() function.
|
||||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
|
||||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
|
||||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
|
||||
* - UART instance should have already been initialised (through call of HAL_UART_Init() )
|
||||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
|
||||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature).
|
||||
* It is used to select the USART peripheral (USART availability and x value depending on device).
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
|
||||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Macro to enable the UART's one bit sample method
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
|
||||
|
||||
/** @brief Macro to disable the UART's one bit sample method
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
|
||||
&= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
|
||||
|
||||
/** @brief Enable UART
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
|
||||
/** @brief Disable UART
|
||||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup UART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
|
||||
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
|
||||
pUART_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *******************************************************/
|
||||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
|
||||
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
|
||||
|
||||
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
|
||||
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
|
||||
|
||||
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Exported_Functions_Group4
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State functions **************************************************/
|
||||
HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
|
||||
uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Constants UART Private Constants
|
||||
* @{
|
||||
*/
|
||||
/** @brief UART interruptions flag mask
|
||||
*
|
||||
*/
|
||||
#define UART_IT_MASK 0x0000FFFFU
|
||||
|
||||
#define UART_CR1_REG_INDEX 1U
|
||||
#define UART_CR2_REG_INDEX 2U
|
||||
#define UART_CR3_REG_INDEX 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Macros UART Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
|
||||
((LENGTH) == UART_WORDLENGTH_9B))
|
||||
#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
|
||||
#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
|
||||
((STOPBITS) == UART_STOPBITS_2))
|
||||
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
|
||||
((PARITY) == UART_PARITY_EVEN) || \
|
||||
((PARITY) == UART_PARITY_ODD))
|
||||
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == UART_HWCONTROL_NONE) || \
|
||||
((CONTROL) == UART_HWCONTROL_RTS) || \
|
||||
((CONTROL) == UART_HWCONTROL_CTS) || \
|
||||
((CONTROL) == UART_HWCONTROL_RTS_CTS))
|
||||
#define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
|
||||
#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
|
||||
((STATE) == UART_STATE_ENABLE))
|
||||
#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
|
||||
((SAMPLING) == UART_OVERSAMPLING_8))
|
||||
#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
|
||||
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
|
||||
((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
|
||||
#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
|
||||
((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
|
||||
#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 10500000U)
|
||||
#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
|
||||
|
||||
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(4U*((uint64_t)(_BAUD_)))))
|
||||
#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
|
||||
#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\
|
||||
+ 50U) / 100U)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
|
||||
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
|
||||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U) + \
|
||||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
|
||||
|
||||
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(2U*((uint64_t)(_BAUD_)))))
|
||||
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
|
||||
#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\
|
||||
+ 50U) / 100U)
|
||||
/* UART BRR = mantissa + overflow + fraction
|
||||
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
|
||||
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
|
||||
((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U) + \
|
||||
(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup UART_Private_Functions UART Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_UART_H */
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -1,182 +0,0 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_i2c_ex.c
|
||||
* @author MCD Application Team
|
||||
* @brief I2C Extension HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of I2C extension peripheral:
|
||||
* + Extension features functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### I2C peripheral extension features #####
|
||||
==============================================================================
|
||||
|
||||
[..] Comparing to other previous devices, the I2C interface for STM32F427xx/437xx/
|
||||
429xx/439xx devices contains the following additional features :
|
||||
|
||||
(+) Possibility to disable or enable Analog Noise Filter
|
||||
(+) Use of a configured Digital Noise Filter
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..] This driver provides functions to configure Noise Filter
|
||||
(#) Configure I2C Analog noise filter using the function HAL_I2C_AnalogFilter_Config()
|
||||
(#) Configure I2C Digital noise filter using the function HAL_I2C_DigitalFilter_Config()
|
||||
|
||||
@endverbatim
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx I2CEx
|
||||
* @brief I2C HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
|
||||
#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Exported_Functions I2C Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup I2CEx_Exported_Functions_Group1 Extension features functions
|
||||
* @brief Extension features functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Extension features functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Configure Noise Filters
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Configures I2C Analog noise filter.
|
||||
* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2Cx peripheral.
|
||||
* @param AnalogFilter new state of the Analog filter.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
|
||||
|
||||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||
|
||||
/* Disable the selected I2C peripheral */
|
||||
__HAL_I2C_DISABLE(hi2c);
|
||||
|
||||
/* Reset I2Cx ANOFF bit */
|
||||
hi2c->Instance->FLTR &= ~(I2C_FLTR_ANOFF);
|
||||
|
||||
/* Disable the analog filter */
|
||||
hi2c->Instance->FLTR |= AnalogFilter;
|
||||
|
||||
__HAL_I2C_ENABLE(hi2c);
|
||||
|
||||
hi2c->State = HAL_I2C_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures I2C Digital noise filter.
|
||||
* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2Cx peripheral.
|
||||
* @param DigitalFilter Coefficient of digital noise filter between 0x00 and 0x0F.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
|
||||
{
|
||||
uint16_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
|
||||
|
||||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||||
{
|
||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||
|
||||
/* Disable the selected I2C peripheral */
|
||||
__HAL_I2C_DISABLE(hi2c);
|
||||
|
||||
/* Get the old register value */
|
||||
tmpreg = hi2c->Instance->FLTR;
|
||||
|
||||
/* Reset I2Cx DNF bit [3:0] */
|
||||
tmpreg &= ~(I2C_FLTR_DNF);
|
||||
|
||||
/* Set I2Cx DNF coefficient */
|
||||
tmpreg |= DigitalFilter;
|
||||
|
||||
/* Store the new register value */
|
||||
hi2c->Instance->FLTR = tmpreg;
|
||||
|
||||
__HAL_I2C_ENABLE(hi2c);
|
||||
|
||||
hi2c->State = HAL_I2C_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif
|
||||
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -8,25 +8,33 @@ ADC1.master=1
|
|||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
CAN1.BS1=CAN_BS1_3TQ
|
||||
CAN1.BS2=CAN_BS2_3TQ
|
||||
CAN1.BS1=CAN_BS1_4TQ
|
||||
CAN1.BS2=CAN_BS2_2TQ
|
||||
CAN1.CalculateBaudRate=500000
|
||||
CAN1.CalculateTimeBit=2000
|
||||
CAN1.CalculateTimeQuantum=285.7142857142857
|
||||
CAN1.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2
|
||||
CAN1.Prescaler=12
|
||||
CAN2.BS1=CAN_BS1_3TQ
|
||||
CAN2.BS2=CAN_BS2_3TQ
|
||||
CAN2.CalculateBaudRate=500000
|
||||
CAN2.CalculateTimeBit=2000
|
||||
CAN2.CalculateTimeQuantum=285.7142857142857
|
||||
CAN2.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS2,BS1
|
||||
CAN2.Prescaler=12
|
||||
DMA2D.ColorMode=DMA2D_OUTPUT_RGB565
|
||||
DMA2D.IPParameters=ColorMode,Mode,InputColorModeForeground,InputColorModeBackground
|
||||
DMA2D.InputColorModeBackground=DMA2D_INPUT_RGB565
|
||||
DMA2D.InputColorModeForeground=DMA2D_INPUT_RGB565
|
||||
DMA2D.Mode=DMA2D_M2M_BLEND
|
||||
Dma.Request0=TIM2_CH2/CH4
|
||||
Dma.RequestsNb=1
|
||||
Dma.TIM2_CH2/CH4.0.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.TIM2_CH2/CH4.0.FIFOMode=DMA_FIFOMODE_ENABLE
|
||||
Dma.TIM2_CH2/CH4.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
|
||||
Dma.TIM2_CH2/CH4.0.Instance=DMA1_Stream6
|
||||
Dma.TIM2_CH2/CH4.0.MemBurst=DMA_MBURST_SINGLE
|
||||
Dma.TIM2_CH2/CH4.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.TIM2_CH2/CH4.0.MemInc=DMA_MINC_ENABLE
|
||||
Dma.TIM2_CH2/CH4.0.Mode=DMA_NORMAL
|
||||
Dma.TIM2_CH2/CH4.0.PeriphBurst=DMA_PBURST_SINGLE
|
||||
Dma.TIM2_CH2/CH4.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
|
||||
Dma.TIM2_CH2/CH4.0.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.TIM2_CH2/CH4.0.Priority=DMA_PRIORITY_LOW
|
||||
Dma.TIM2_CH2/CH4.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
|
||||
FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_3
|
||||
FMC.ColumnBitsNumber1=FMC_SDRAM_COLUMN_BITS_NUM_9
|
||||
FMC.ExitSelfRefreshDelay1=8
|
||||
|
@ -43,7 +51,7 @@ FMC.SelfRefreshTime1=6
|
|||
FMC.WriteRecoveryTime1=5
|
||||
FREERTOS.FootprintOK=true
|
||||
FREERTOS.IPParameters=Tasks01,FootprintOK,configUSE_NEWLIB_REENTRANT,configPRIO_BITS,configASSERT( x ),configTIMER_QUEUE_LENGTH,configMINIMAL_STACK_SIZE,configTOTAL_HEAP_SIZE
|
||||
FREERTOS.Tasks01=START_Task,24,128,Start_START_Task,Default,NULL,Dynamic,NULL,NULL;TouchGFXTask,8,2048,TouchGFX_Task,As weak,NULL,Dynamic,NULL,NULL;SD_Task,8,128,Start_SD_Task,Default,NULL,Dynamic,NULL,NULL;LED_Task,8,128,Start_LED_Task,Default,NULL,Dynamic,NULL,NULL;CAN_Task,8,128,Start_CAN_Task,Default,NULL,Dynamic,NULL,NULL;BTN_Task,8,128,Start_BTN_Task,Default,NULL,Dynamic,NULL,NULL;ALERT_Task,8,128,Start_ALERT_Task,Default,NULL,Dynamic,NULL,NULL;RGB_Task,8,128,Start_RGB_Task,Default,NULL,Dynamic,NULL,NULL;INPUT_Task,8,128,Start_INPUT_Task,Default,NULL,Dynamic,NULL,NULL;OUTPUT_Task,8,128,Start_OUTPUT_Task,Default,NULL,Dynamic,NULL,NULL;ADC_Task,8,128,Start_ADC_Task,Default,NULL,Dynamic,NULL,NULL;UART_Task,40,256,Start_UART_task,Default,NULL,Dynamic,NULL,NULL
|
||||
FREERTOS.Tasks01=START_Task,24,128,Start_START_Task,Default,NULL,Dynamic,NULL,NULL;TouchGFXTask,40,2048,TouchGFX_Task,As weak,NULL,Dynamic,NULL,NULL;LED_Task,8,128,Start_LED_Task,Default,NULL,Dynamic,NULL,NULL;CAN_Task,8,128,Start_CAN_Task,Default,NULL,Dynamic,NULL,NULL;ALERT_Task,8,128,Start_ALERT_Task,Default,NULL,Dynamic,NULL,NULL;RGB_Task,8,128,Start_RGB_Task,Default,NULL,Dynamic,NULL,NULL
|
||||
FREERTOS.configASSERT(\ x\ )=if ((x) \=\= 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
|
||||
FREERTOS.configMINIMAL_STACK_SIZE=64
|
||||
FREERTOS.configPRIO_BITS=4
|
||||
|
@ -94,55 +102,49 @@ Mcu.CPN=STM32F429IIT6
|
|||
Mcu.Family=STM32F4
|
||||
Mcu.IP0=ADC1
|
||||
Mcu.IP1=CAN1
|
||||
Mcu.IP10=RCC
|
||||
Mcu.IP11=SPI1
|
||||
Mcu.IP12=SPI3
|
||||
Mcu.IP13=SYS
|
||||
Mcu.IP14=TIM1
|
||||
Mcu.IP15=TIM2
|
||||
Mcu.IP16=TIM13
|
||||
Mcu.IP17=USART1
|
||||
Mcu.IP18=USART3
|
||||
Mcu.IP19=USB_DEVICE
|
||||
Mcu.IP2=CAN2
|
||||
Mcu.IP20=USB_OTG_FS
|
||||
Mcu.IP3=CRC
|
||||
Mcu.IP10=SYS
|
||||
Mcu.IP11=TIM1
|
||||
Mcu.IP12=TIM2
|
||||
Mcu.IP13=TIM13
|
||||
Mcu.IP14=USB_DEVICE
|
||||
Mcu.IP15=USB_OTG_FS
|
||||
Mcu.IP2=CRC
|
||||
Mcu.IP3=DMA
|
||||
Mcu.IP4=DMA2D
|
||||
Mcu.IP5=FMC
|
||||
Mcu.IP6=FREERTOS
|
||||
Mcu.IP7=I2C2
|
||||
Mcu.IP8=LTDC
|
||||
Mcu.IP9=NVIC
|
||||
Mcu.IPNb=21
|
||||
Mcu.IP7=LTDC
|
||||
Mcu.IP8=NVIC
|
||||
Mcu.IP9=RCC
|
||||
Mcu.IPNb=16
|
||||
Mcu.Name=STM32F429IITx
|
||||
Mcu.Package=LQFP176
|
||||
Mcu.Pin0=PE2
|
||||
Mcu.Pin1=PE3
|
||||
Mcu.Pin10=PF2
|
||||
Mcu.Pin100=PG14
|
||||
Mcu.Pin101=PG15
|
||||
Mcu.Pin102=PB3
|
||||
Mcu.Pin103=PB4
|
||||
Mcu.Pin104=PB5
|
||||
Mcu.Pin105=PB7
|
||||
Mcu.Pin106=PB8
|
||||
Mcu.Pin107=PB9
|
||||
Mcu.Pin108=PE0
|
||||
Mcu.Pin109=PE1
|
||||
Mcu.Pin100=PB3
|
||||
Mcu.Pin101=PB4
|
||||
Mcu.Pin102=PB5
|
||||
Mcu.Pin103=PB7
|
||||
Mcu.Pin104=PB8
|
||||
Mcu.Pin105=PB9
|
||||
Mcu.Pin106=PE0
|
||||
Mcu.Pin107=PE1
|
||||
Mcu.Pin108=PI4
|
||||
Mcu.Pin109=PI5
|
||||
Mcu.Pin11=PF3
|
||||
Mcu.Pin110=PI4
|
||||
Mcu.Pin111=PI5
|
||||
Mcu.Pin112=PI6
|
||||
Mcu.Pin113=PI7
|
||||
Mcu.Pin114=VP_CRC_VS_CRC
|
||||
Mcu.Pin115=VP_DMA2D_VS_DMA2D
|
||||
Mcu.Pin116=VP_FREERTOS_VS_CMSIS_V2
|
||||
Mcu.Pin117=VP_SYS_VS_tim6
|
||||
Mcu.Pin118=VP_TIM1_VS_ClockSourceINT
|
||||
Mcu.Pin119=VP_TIM13_VS_ClockSourceINT
|
||||
Mcu.Pin110=PI6
|
||||
Mcu.Pin111=PI7
|
||||
Mcu.Pin112=VP_CRC_VS_CRC
|
||||
Mcu.Pin113=VP_DMA2D_VS_DMA2D
|
||||
Mcu.Pin114=VP_FREERTOS_VS_CMSIS_V2
|
||||
Mcu.Pin115=VP_SYS_VS_tim6
|
||||
Mcu.Pin116=VP_TIM1_VS_ClockSourceINT
|
||||
Mcu.Pin117=VP_TIM2_VS_ClockSourceINT
|
||||
Mcu.Pin118=VP_TIM13_VS_ClockSourceINT
|
||||
Mcu.Pin119=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
|
||||
Mcu.Pin12=PF4
|
||||
Mcu.Pin120=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
|
||||
Mcu.Pin121=VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.21.1
|
||||
Mcu.Pin120=VP_STMicroelectronics.X-CUBE-TOUCHGFX_VS_GraphicsJjApplication_4.21.1
|
||||
Mcu.Pin13=PF5
|
||||
Mcu.Pin14=PF6
|
||||
Mcu.Pin15=PF7
|
||||
|
@ -208,37 +210,37 @@ Mcu.Pin69=PC8
|
|||
Mcu.Pin7=PI11
|
||||
Mcu.Pin70=PC9
|
||||
Mcu.Pin71=PA8
|
||||
Mcu.Pin72=PA9
|
||||
Mcu.Pin73=PA10
|
||||
Mcu.Pin74=PA11
|
||||
Mcu.Pin75=PA12
|
||||
Mcu.Pin76=PA13
|
||||
Mcu.Pin77=PH13
|
||||
Mcu.Pin78=PH14
|
||||
Mcu.Pin79=PH15
|
||||
Mcu.Pin72=PA11
|
||||
Mcu.Pin73=PA12
|
||||
Mcu.Pin74=PA13
|
||||
Mcu.Pin75=PH13
|
||||
Mcu.Pin76=PH14
|
||||
Mcu.Pin77=PH15
|
||||
Mcu.Pin78=PI0
|
||||
Mcu.Pin79=PI1
|
||||
Mcu.Pin8=PF0
|
||||
Mcu.Pin80=PI0
|
||||
Mcu.Pin81=PI1
|
||||
Mcu.Pin82=PI2
|
||||
Mcu.Pin83=PI3
|
||||
Mcu.Pin84=PA14
|
||||
Mcu.Pin85=PC10
|
||||
Mcu.Pin86=PC11
|
||||
Mcu.Pin87=PC12
|
||||
Mcu.Pin88=PD0
|
||||
Mcu.Pin89=PD1
|
||||
Mcu.Pin80=PI2
|
||||
Mcu.Pin81=PI3
|
||||
Mcu.Pin82=PA14
|
||||
Mcu.Pin83=PC10
|
||||
Mcu.Pin84=PC11
|
||||
Mcu.Pin85=PC12
|
||||
Mcu.Pin86=PD0
|
||||
Mcu.Pin87=PD1
|
||||
Mcu.Pin88=PD2
|
||||
Mcu.Pin89=PD3
|
||||
Mcu.Pin9=PF1
|
||||
Mcu.Pin90=PD2
|
||||
Mcu.Pin91=PD3
|
||||
Mcu.Pin92=PD4
|
||||
Mcu.Pin93=PD6
|
||||
Mcu.Pin94=PD7
|
||||
Mcu.Pin95=PG9
|
||||
Mcu.Pin96=PG10
|
||||
Mcu.Pin97=PG11
|
||||
Mcu.Pin98=PG12
|
||||
Mcu.Pin99=PG13
|
||||
Mcu.PinsNb=122
|
||||
Mcu.Pin90=PD4
|
||||
Mcu.Pin91=PD6
|
||||
Mcu.Pin92=PD7
|
||||
Mcu.Pin93=PG9
|
||||
Mcu.Pin94=PG10
|
||||
Mcu.Pin95=PG11
|
||||
Mcu.Pin96=PG12
|
||||
Mcu.Pin97=PG13
|
||||
Mcu.Pin98=PG14
|
||||
Mcu.Pin99=PG15
|
||||
Mcu.PinsNb=121
|
||||
Mcu.ThirdParty0=STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1
|
||||
Mcu.ThirdPartyNb=1
|
||||
Mcu.UserConstants=
|
||||
|
@ -247,7 +249,7 @@ MxCube.Version=6.6.1
|
|||
MxDb.Version=DB.6.0.60
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.CAN1_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.CAN2_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA2D_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.FMC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
|
@ -272,14 +274,11 @@ PA0/WKUP.GPIOParameters=GPIO_Label
|
|||
PA0/WKUP.GPIO_Label=BRV_CPU
|
||||
PA0/WKUP.Locked=true
|
||||
PA0/WKUP.Signal=ADCx_IN0
|
||||
PA1.GPIOParameters=GPIO_Label
|
||||
PA1.GPIOParameters=GPIO_Speed,GPIO_Label
|
||||
PA1.GPIO_Label=LED_TIM2_CH2_PA1
|
||||
PA1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA1.Locked=true
|
||||
PA1.Signal=S_TIM2_CH2
|
||||
PA10.GPIOParameters=GPIO_Label
|
||||
PA10.GPIO_Label=GPS_UART1_TX
|
||||
PA10.Mode=Asynchronous
|
||||
PA10.Signal=USART1_RX
|
||||
PA11.GPIOParameters=GPIO_Label
|
||||
PA11.GPIO_Label=USB_OTG-
|
||||
PA11.Locked=true
|
||||
|
@ -300,16 +299,13 @@ PA14.GPIO_Label=SWCLK
|
|||
PA14.Locked=true
|
||||
PA14.Mode=Serial_Wire
|
||||
PA14.Signal=SYS_JTCK-SWCLK
|
||||
PA2.GPIOParameters=GPIO_Label
|
||||
PA2.GPIOParameters=GPIO_Speed,GPIO_Label
|
||||
PA2.GPIO_Label=LED_TIM2_CH3_PA2
|
||||
PA2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA2.Locked=true
|
||||
PA2.Signal=S_TIM2_CH3
|
||||
PA8.Locked=true
|
||||
PA8.Signal=GPIO_Input
|
||||
PA9.GPIOParameters=GPIO_Label
|
||||
PA9.GPIO_Label=GPS_UART1_RX
|
||||
PA9.Mode=Asynchronous
|
||||
PA9.Signal=USART1_TX
|
||||
PB1.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
|
||||
PB1.GPIO_Label=LCD_R6_PB1
|
||||
PB1.GPIO_Mode=GPIO_MODE_AF_PP
|
||||
|
@ -321,28 +317,21 @@ PB1.Signal=LTDC_R6
|
|||
PB10.GPIOParameters=GPIO_Label
|
||||
PB10.GPIO_Label=ESP_TX
|
||||
PB10.Locked=true
|
||||
PB10.Mode=Asynchronous
|
||||
PB10.Signal=USART3_TX
|
||||
PB11.GPIOParameters=GPIO_Label
|
||||
PB11.GPIO_Label=ESP_RX
|
||||
PB11.Locked=true
|
||||
PB11.Mode=Asynchronous
|
||||
PB11.Signal=USART3_RX
|
||||
PB12.Locked=true
|
||||
PB12.Mode=CAN_Activate
|
||||
PB12.Signal=CAN2_RX
|
||||
PB13.Locked=true
|
||||
PB13.Mode=CAN_Activate
|
||||
PB13.Signal=CAN2_TX
|
||||
PB2/BOOT1.Locked=true
|
||||
PB3.Locked=true
|
||||
PB3.Mode=Full_Duplex_Master
|
||||
PB3.Signal=SPI1_SCK
|
||||
PB4.Locked=true
|
||||
PB4.Mode=Full_Duplex_Master
|
||||
PB4.Signal=SPI1_MISO
|
||||
PB5.Locked=true
|
||||
PB5.Mode=Full_Duplex_Master
|
||||
PB5.Signal=SPI1_MOSI
|
||||
PB7.GPIOParameters=GPIO_Label
|
||||
PB7.GPIO_Label=SPI1_FLASH
|
||||
|
@ -363,13 +352,10 @@ PC1.GPIO_Label=ADC_OUT_1
|
|||
PC1.Locked=true
|
||||
PC1.Signal=ADCx_IN11
|
||||
PC10.Locked=true
|
||||
PC10.Mode=Full_Duplex_Master
|
||||
PC10.Signal=SPI3_SCK
|
||||
PC11.Locked=true
|
||||
PC11.Mode=Full_Duplex_Master
|
||||
PC11.Signal=SPI3_MISO
|
||||
PC12.Locked=true
|
||||
PC12.Mode=Full_Duplex_Master
|
||||
PC12.Signal=SPI3_MOSI
|
||||
PC13.GPIOParameters=GPIO_Label
|
||||
PC13.GPIO_Label=TOUCH_RST_PC13
|
||||
|
@ -555,13 +541,19 @@ PF5.GPIOParameters=GPIO_Label
|
|||
PF5.GPIO_Label=SDRAM_A5_PF5
|
||||
PF5.Locked=true
|
||||
PF5.Signal=FMC_A5
|
||||
PF6.GPIOParameters=GPIO_Label
|
||||
PF6.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||
PF6.GPIO_Label=CAN1_S0
|
||||
PF6.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
|
||||
PF6.GPIO_PuPd=GPIO_PULLUP
|
||||
PF6.Locked=true
|
||||
PF6.PinState=GPIO_PIN_RESET
|
||||
PF6.Signal=GPIO_Output
|
||||
PF7.GPIOParameters=GPIO_Label
|
||||
PF7.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||
PF7.GPIO_Label=CAN2_S0
|
||||
PF7.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
|
||||
PF7.GPIO_PuPd=GPIO_PULLUP
|
||||
PF7.Locked=true
|
||||
PF7.PinState=GPIO_PIN_RESET
|
||||
PF7.Signal=GPIO_Output
|
||||
PF8.GPIOParameters=GPIO_Label
|
||||
PF8.GPIO_Label=LCD_BL_PF8
|
||||
|
@ -690,12 +682,10 @@ PH15.Signal=LTDC_G4
|
|||
PH4.GPIOParameters=GPIO_Label
|
||||
PH4.GPIO_Label=I2C2_SCL_PH4
|
||||
PH4.Locked=true
|
||||
PH4.Mode=I2C
|
||||
PH4.Signal=I2C2_SCL
|
||||
PH5.GPIOParameters=GPIO_Label
|
||||
PH5.GPIO_Label=I2C2_SDA_PH5
|
||||
PH5.Locked=true
|
||||
PH5.Mode=I2C
|
||||
PH5.Signal=I2C2_SDA
|
||||
PH6.GPIOParameters=GPIO_Label
|
||||
PH6.GPIO_Label=SDRAM_CS_PH6
|
||||
|
@ -820,12 +810,13 @@ ProjectManager.PreviousToolchain=STM32CubeIDE
|
|||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=LCD_CAR_WIDE.ioc
|
||||
ProjectManager.ProjectName=LCD_CAR_WIDE
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x800
|
||||
ProjectManager.TargetToolchain=STM32CubeIDE
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LTDC_Init-LTDC-false-HAL-true,4-MX_DMA2D_Init-DMA2D-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_TIM13_Init-TIM13-false-HAL-true,8-MX_CAN1_Init-CAN1-false-HAL-true,9-MX_CAN2_Init-CAN2-false-HAL-true,10-MX_I2C2_Init-I2C2-false-HAL-true,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_TIM1_Init-TIM1-false-HAL-true,13-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,14-MX_SPI1_Init-SPI1-false-HAL-true,15-MX_USART1_UART_Init-USART1-false-HAL-true,16-MX_SPI3_Init-SPI3-false-HAL-true,17-MX_TIM2_Init-TIM2-false-HAL-true,18-MX_USART3_UART_Init-USART3-false-HAL-true,19-MX_TouchGFX_Init-STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1-false-HAL-false,20-MX_TouchGFX_Process-STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1-false-HAL-false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_LTDC_Init-LTDC-false-HAL-true,5-MX_DMA2D_Init-DMA2D-false-HAL-true,6-MX_FMC_Init-FMC-false-HAL-true,7-MX_CRC_Init-CRC-false-HAL-true,8-MX_TIM13_Init-TIM13-false-HAL-true,9-MX_CAN1_Init-CAN1-false-HAL-true,10-MX_ADC1_Init-ADC1-false-HAL-true,11-MX_TIM1_Init-TIM1-false-HAL-true,12-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,13-MX_TIM2_Init-TIM2-false-HAL-true,14-MX_TouchGFX_Init-STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1-false-HAL-false,15-MX_TouchGFX_Process-STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1-false-HAL-false
|
||||
RCC.48MHZClocksFreq_Value=48000000
|
||||
RCC.AHBFreq_Value=168000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||
|
@ -847,8 +838,8 @@ RCC.HSE_VALUE=12000000
|
|||
RCC.HSI_VALUE=16000000
|
||||
RCC.I2SClockSource=I2S_CLOCK_PLL
|
||||
RCC.I2SClocksFreq_Value=192000000
|
||||
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,EnbaleCSS,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency-AdvancedSettings,FamilyName,HCLKFreq_Value,HSEUsed,HSE_VALUE,HSI_VALUE,I2SClockSource,I2SClocksFreq_Value,LCDTFTFreq_Value,LSEUsed,LSE_VALUE,LSIUsed,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSAIDivR,PLLSAIN,PLLUsed,RTCFreq_Value,RTCHSEDivFreq_Value,SAIClockSource_BlockA,SAIClockSource_BlockB,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,VcooutputI2S,VcooutputI2SQ,WatchDogFreq_Value
|
||||
RCC.LCDTFTFreq_Value=15000000
|
||||
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,EnbaleCSS,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency-AdvancedSettings,FamilyName,HCLKFreq_Value,HSEUsed,HSE_VALUE,HSI_VALUE,I2SClockSource,I2SClocksFreq_Value,LCDTFTFreq_Value,LSEUsed,LSE_VALUE,LSIUsed,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSAIN,PLLUsed,RTCFreq_Value,RTCHSEDivFreq_Value,SAIClockSource_BlockA,SAIClockSource_BlockB,SAI_AClocksFreq_Value,SAI_BClocksFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VCOSAIOutputFreq_ValueQ,VCOSAIOutputFreq_ValueR,VcooutputI2S,VcooutputI2SQ,WatchDogFreq_Value
|
||||
RCC.LCDTFTFreq_Value=25000000
|
||||
RCC.LSEUsed=0
|
||||
RCC.LSE_VALUE=32768
|
||||
RCC.LSIUsed=0
|
||||
|
@ -860,23 +851,22 @@ RCC.PLLM=6
|
|||
RCC.PLLN=168
|
||||
RCC.PLLQ=7
|
||||
RCC.PLLQCLKFreq_Value=48000000
|
||||
RCC.PLLSAIDivR=RCC_PLLSAIDIVR_4
|
||||
RCC.PLLSAIN=60
|
||||
RCC.PLLSAIN=50
|
||||
RCC.PLLUsed=1
|
||||
RCC.RTCFreq_Value=32000
|
||||
RCC.RTCHSEDivFreq_Value=6000000
|
||||
RCC.SAIClockSource_BlockA=SAI_CLKSOURCE_PLLSAI
|
||||
RCC.SAIClockSource_BlockB=SAI_CLKSOURCE_PLLSAI
|
||||
RCC.SAI_AClocksFreq_Value=30000000
|
||||
RCC.SAI_BClocksFreq_Value=30000000
|
||||
RCC.SAI_AClocksFreq_Value=25000000
|
||||
RCC.SAI_BClocksFreq_Value=25000000
|
||||
RCC.SYSCLKFreq_VALUE=168000000
|
||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
RCC.VCOI2SOutputFreq_Value=384000000
|
||||
RCC.VCOInputFreq_Value=2000000
|
||||
RCC.VCOOutputFreq_Value=336000000
|
||||
RCC.VCOSAIOutputFreq_Value=120000000
|
||||
RCC.VCOSAIOutputFreq_ValueQ=30000000
|
||||
RCC.VCOSAIOutputFreq_ValueR=60000000
|
||||
RCC.VCOSAIOutputFreq_Value=100000000
|
||||
RCC.VCOSAIOutputFreq_ValueQ=25000000
|
||||
RCC.VCOSAIOutputFreq_ValueR=50000000
|
||||
RCC.VcooutputI2S=192000000
|
||||
RCC.VcooutputI2SQ=192000000
|
||||
RCC.WatchDogFreq_Value=32000
|
||||
|
@ -962,19 +952,8 @@ SH.S_TIM13_CH1.0=TIM13_CH1,PWM Generation1 CH1
|
|||
SH.S_TIM13_CH1.ConfNb=1
|
||||
SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2
|
||||
SH.S_TIM2_CH2.ConfNb=1
|
||||
SH.S_TIM2_CH3.0=TIM2_CH3,PWM Generation3 CH3
|
||||
SH.S_TIM2_CH3.0=TIM2_CH3
|
||||
SH.S_TIM2_CH3.ConfNb=1
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
|
||||
SPI1.CalculateBaudRate=10.5 MBits/s
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
|
||||
SPI1.Mode=SPI_MODE_MASTER
|
||||
SPI1.VirtualType=VM_MASTER
|
||||
SPI3.CalculateBaudRate=21.0 MBits/s
|
||||
SPI3.Direction=SPI_DIRECTION_2LINES
|
||||
SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||
SPI3.Mode=SPI_MODE_MASTER
|
||||
SPI3.VirtualType=VM_MASTER
|
||||
STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1.ApplicationCcGraphicsJjApplication=TouchGFXOoGenerator
|
||||
STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1.GraphicsJjApplication_Checked=true
|
||||
STMicroelectronics.X-CUBE-TOUCHGFX.4.21.1.IPParameters=tgfx_display_interface,tgfx_vsync,tgfx_hardware_accelerator,tgfx_buffering_strategy,tgfx_location,tgfx_address1,tgfx_address2,ApplicationCcGraphicsJjApplication
|
||||
|
@ -996,12 +975,9 @@ TIM13.IPParameters=Prescaler,Period,AutoReloadPreload,Channel
|
|||
TIM13.Period=1000-1
|
||||
TIM13.Prescaler=90-1
|
||||
TIM2.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
|
||||
TIM2.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
|
||||
TIM2.IPParameters=Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3
|
||||
USART1.IPParameters=VirtualMode
|
||||
USART1.VirtualMode=VM_ASYNC
|
||||
USART3.IPParameters=VirtualMode
|
||||
USART3.VirtualMode=VM_ASYNC
|
||||
TIM2.IPParameters=Channel-PWM Generation2 CH2,Period,OCFastMode_PWM-PWM Generation2 CH2
|
||||
TIM2.OCFastMode_PWM-PWM\ Generation2\ CH2=TIM_OCFAST_DISABLE
|
||||
TIM2.Period=210
|
||||
USB_DEVICE.CLASS_NAME_FS=CDC
|
||||
USB_DEVICE.IPParameters=VirtualModeFS,CLASS_NAME_FS,VirtualMode-CDC_FS,PID_CDC_FS,PRODUCT_STRING_CDC_FS
|
||||
USB_DEVICE.PID_CDC_FS=57701
|
||||
|
@ -1024,7 +1000,10 @@ VP_TIM13_VS_ClockSourceINT.Mode=Enable_Timer
|
|||
VP_TIM13_VS_ClockSourceINT.Signal=TIM13_VS_ClockSourceINT
|
||||
VP_TIM1_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
|
||||
VP_TIM2_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
|
||||
VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
|
||||
VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS
|
||||
board=custom
|
||||
rtos.0.ip=FREERTOS
|
||||
isbadioc=false
|
||||
|
|
|
@ -2,7 +2,9 @@
|
|||
******************************************************************************
|
||||
* File Name : app_touchgfx.c
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0.
|
||||
* This file was created by TouchGFX Generator 4.21.1. This file is only
|
||||
* generated once! Delete this file from your project and re-generate code
|
||||
* using STM32CubeMX or change this file manually to update it.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
@ -63,6 +65,7 @@ void MX_TouchGFX_PreOSInit(void)
|
|||
void MX_TouchGFX_Init(void)
|
||||
{
|
||||
// Calling forward to touchgfx_init in C++ domain
|
||||
touchgfx_components_init();
|
||||
touchgfx_init();
|
||||
}
|
||||
|
||||
|
|
|
@ -2,7 +2,9 @@
|
|||
******************************************************************************
|
||||
* File Name : app_touchgfx.h
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0.
|
||||
* This file was created by TouchGFX Generator 4.21.1. This file is only
|
||||
* generated once! Delete this file from your project and re-generate code
|
||||
* using STM32CubeMX or change this file manually to update it.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
|
|
@ -18,10 +18,13 @@
|
|||
"Family": "STM32F4",
|
||||
"SubFamily": "STM32F429/439",
|
||||
"Platform": "m4",
|
||||
"Toolchain": "STM32CubeIDE",
|
||||
"ProjectFile": "../LCD_CAR_WIDE.ioc",
|
||||
"OptionalComponentsRoot": "../Middlewares/ST/touchgfx_components",
|
||||
"OptionalComponents": [
|
||||
]
|
||||
],
|
||||
"AdditionalFeatures": [
|
||||
],
|
||||
},
|
||||
"Version": "4.20.0"
|
||||
"Version": "4.21.1"
|
||||
}
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
******************************************************************************
|
||||
* File Name : OSWrappers.cpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0. Please, do not edit!
|
||||
* This file is generated by TouchGFX Generator 4.21.1. Please, do not edit!
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
******************************************************************************
|
||||
* File Name : STM32DMA.cpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0. Please, do not edit!
|
||||
* This file is generated by TouchGFX Generator 4.21.1. Please, do not edit!
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
@ -393,156 +393,114 @@ namespace touchgfx
|
|||
{
|
||||
namespace paint
|
||||
{
|
||||
namespace
|
||||
{
|
||||
const clutData_t* L8CLUT = 0;
|
||||
uint32_t L8ClutLoaded = 0;
|
||||
} // namespace
|
||||
|
||||
void setL8Pallette(const uint8_t* const data)
|
||||
{
|
||||
L8CLUT = reinterpret_cast<const clutData_t*>(data - offsetof(clutData_t, data));
|
||||
L8ClutLoaded = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn void tearDown();
|
||||
*
|
||||
* @brief Waits until previous DMA drawing operation has finished
|
||||
*/
|
||||
void tearDown()
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
|
||||
}
|
||||
|
||||
namespace rgb565
|
||||
{
|
||||
namespace
|
||||
/**
|
||||
* @fn void lineFromColor();
|
||||
*
|
||||
* @brief Renders Canvas Widget chunks using DMA.
|
||||
* This functions will not generate an interrupt, and will not affect the DMA queue.
|
||||
*/
|
||||
void lineFromColor(uint16_t* const ptr, const unsigned count, const uint32_t color, const uint8_t alpha, const uint32_t color565)
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
if (alpha < 0xFF)
|
||||
{
|
||||
const clutData_t* L8CLUT = 0;
|
||||
uint32_t L8ClutLoaded = 0;
|
||||
}
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_OUTPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
void setL8Pallette(const uint8_t* const data)
|
||||
{
|
||||
L8CLUT = reinterpret_cast<const clutData_t*>(data - offsetof(clutData_t, data));
|
||||
L8ClutLoaded = 0;
|
||||
}
|
||||
/* Write DMA2D FGPFCCR register */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_A8 | (DMA2D_REPLACE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | ((alpha << 24) & DMA2D_FGPFCCR_ALPHA));
|
||||
|
||||
/**
|
||||
* @fn void tearDown();
|
||||
*
|
||||
* @brief Waits until previous DMA drawing operation has finished
|
||||
*/
|
||||
void tearDown()
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
/* DMA2D FGCOLR register configuration */
|
||||
WRITE_REG(DMA2D->FGCOLR, color);
|
||||
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC|DMA2D_FLAG_CE|DMA2D_FLAG_TE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn void lineFromColor();
|
||||
*
|
||||
* @brief Renders Canvas Widget chunks using DMA.
|
||||
* This functions will not generate an interrupt, and will not affect the DMA queue.
|
||||
*/
|
||||
void lineFromColor(uint16_t* const ptr, const unsigned count, const uint32_t color, const uint8_t alpha, const uint32_t color565)
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC|DMA2D_FLAG_CE|DMA2D_FLAG_TE);
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
if (alpha < 0xFF)
|
||||
{
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_OUTPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
/* Write DMA2D FGPFCCR register */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_A8 | (DMA2D_REPLACE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | ((alpha << 24) & DMA2D_FGPFCCR_ALPHA));
|
||||
|
||||
/* DMA2D FGCOLR register configuration */
|
||||
WRITE_REG(DMA2D->FGCOLR, color);
|
||||
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, (uint32_t)ptr);
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, (uint32_t)ptr);
|
||||
|
||||
/* Enable the Peripheral and Enable the transfer complete interrupt */
|
||||
WRITE_REG(DMA2D->CR, (DMA2D_CR_START | DMA2D_M2M_BLEND));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Write DMA2D FGPFCCR register */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_OUTPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_FGPFCCR_AM_Pos));
|
||||
|
||||
/* Set color */
|
||||
WRITE_REG(DMA2D->OCOLR, color565);
|
||||
|
||||
/* Enable the Peripheral and Enable the transfer complete interrupt */
|
||||
WRITE_REG(DMA2D->CR, (DMA2D_CR_START | DMA2D_R2M));
|
||||
}
|
||||
}
|
||||
|
||||
void lineFromRGB565(uint16_t* const ptr, const uint16_t* const data, const unsigned count, const uint8_t alpha)
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC|DMA2D_FLAG_CE|DMA2D_FLAG_TE);
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, (uint32_t)ptr);
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
WRITE_REG(DMA2D->FGMAR, (uint32_t)ptr);
|
||||
|
||||
if (alpha < 0xFF)
|
||||
{
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
/* Start DMA2D : M2M Mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M | DMA2D_CR_START);
|
||||
}
|
||||
/* Enable the Peripheral and Enable the transfer complete interrupt */
|
||||
WRITE_REG(DMA2D->CR, (DMA2D_CR_START | DMA2D_M2M_BLEND));
|
||||
}
|
||||
|
||||
void lineFromARGB8888(uint16_t* const ptr, const uint32_t* const data, const unsigned count, const uint8_t alpha)
|
||||
else
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
/* Write DMA2D FGPFCCR register */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_OUTPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_FGPFCCR_AM_Pos));
|
||||
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC|DMA2D_FLAG_CE|DMA2D_FLAG_TE);
|
||||
/* Set color */
|
||||
WRITE_REG(DMA2D->OCOLR, color565);
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
/* Enable the Peripheral and Enable the transfer complete interrupt */
|
||||
WRITE_REG(DMA2D->CR, (DMA2D_CR_START | DMA2D_R2M));
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
void lineFromRGB565(uint16_t* const ptr, const uint16_t* const data, const unsigned count, const uint8_t alpha)
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
|
||||
if (alpha < 0xFF)
|
||||
{
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_ARGB8888 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << 24));
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
@ -553,127 +511,170 @@ namespace rgb565
|
|||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
|
||||
}
|
||||
|
||||
void lineFromL8RGB888(uint16_t* const ptr, const uint8_t* const data, const unsigned count, const uint8_t alpha)
|
||||
else
|
||||
{
|
||||
/* wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_COMBINE_ALPHA << DMA2D_FGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
/* Start DMA2D : M2M Mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M | DMA2D_CR_START);
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
void lineFromARGB8888(uint16_t* const ptr, const uint32_t* const data, const unsigned count, const uint8_t alpha)
|
||||
{
|
||||
/* Wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
/* Clear transfer flags */
|
||||
WRITE_REG(DMA2D->IFCR, DMA2D_FLAG_TC | DMA2D_FLAG_CE | DMA2D_FLAG_TE);
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Load CLUT if not already loaded */
|
||||
if (L8ClutLoaded == 0)
|
||||
{
|
||||
/* Write foreground CLUT memory address */
|
||||
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&L8CLUT->data));
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_L8 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << 24));
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
|
||||
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((L8CLUT->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_RGB888 << DMA2D_FGPFCCR_CCM_Pos)));
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_ARGB8888 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
/* Enable the CLUT loading for the foreground */
|
||||
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Mark CLUT loaded */
|
||||
L8ClutLoaded = 1;
|
||||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
|
||||
}
|
||||
|
||||
/* Wait for load to finish */
|
||||
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U);
|
||||
void lineFromL8RGB888(uint16_t* const ptr, const uint8_t* const data, const unsigned count, const uint8_t alpha)
|
||||
{
|
||||
/* wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* Clear CLUT Transfer Complete flag */
|
||||
DMA2D->IFCR = (DMA2D_FLAG_CTC);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set correct alpha for these pixels */
|
||||
MODIFY_REG(DMA2D->FGPFCCR, DMA2D_BGPFCCR_ALPHA_Msk, alpha << 24);
|
||||
}
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Start pixel transfer in correct mode */
|
||||
if (alpha < 0xFF)
|
||||
{
|
||||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_PFC | DMA2D_CR_START);
|
||||
}
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Load CLUT if not already loaded */
|
||||
if (L8ClutLoaded == 0)
|
||||
{
|
||||
/* Write foreground CLUT memory address */
|
||||
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&L8CLUT->data));
|
||||
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_L8 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((L8CLUT->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_RGB888 << DMA2D_FGPFCCR_CCM_Pos)));
|
||||
|
||||
/* Enable the CLUT loading for the foreground */
|
||||
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
|
||||
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
/* Mark CLUT loaded */
|
||||
L8ClutLoaded = 1;
|
||||
|
||||
/* Wait for load to finish */
|
||||
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U);
|
||||
|
||||
/* Clear CLUT Transfer Complete flag */
|
||||
DMA2D->IFCR = (DMA2D_FLAG_CTC);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set correct alpha for these pixels */
|
||||
MODIFY_REG(DMA2D->FGPFCCR, DMA2D_BGPFCCR_ALPHA_Msk, alpha << 24);
|
||||
}
|
||||
|
||||
void lineFromL8ARGB8888(uint16_t* const ptr, const uint8_t* const data, const unsigned count, const uint8_t alpha)
|
||||
/* Start pixel transfer in correct mode */
|
||||
if (alpha < 0xFF)
|
||||
{
|
||||
/* wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Load CLUT if not already loaded */
|
||||
if (L8ClutLoaded == 0)
|
||||
{
|
||||
/* Write foreground CLUT memory address */
|
||||
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&L8CLUT->data));
|
||||
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_L8 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((L8CLUT->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_ARGB8888 << DMA2D_FGPFCCR_CCM_Pos)));
|
||||
|
||||
/* Enable the CLUT loading for the foreground */
|
||||
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
|
||||
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
/* Mark CLUT loaded */
|
||||
L8ClutLoaded = 1;
|
||||
|
||||
/* Wait for load to finish */
|
||||
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U);
|
||||
|
||||
/* Clear CLUT Transfer Complete flag */
|
||||
DMA2D->IFCR = (DMA2D_FLAG_CTC);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set correct alpha for these pixels */
|
||||
MODIFY_REG(DMA2D->FGPFCCR, DMA2D_BGPFCCR_ALPHA_Msk, alpha << 24);
|
||||
}
|
||||
|
||||
/* Start pixel transfer in blending mode */
|
||||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set DMA2D mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_PFC | DMA2D_CR_START);
|
||||
}
|
||||
}
|
||||
|
||||
void lineFromL8ARGB8888(uint16_t* const ptr, const uint8_t* const data, const unsigned count, const uint8_t alpha)
|
||||
{
|
||||
/* wait for DMA2D to finish last run */
|
||||
while ((READ_REG(DMA2D->CR) & DMA2D_CR_START) != 0U);
|
||||
|
||||
/* DMA2D OPFCCR register configuration */
|
||||
WRITE_REG(DMA2D->OPFCCR, DMA2D_OUTPUT_RGB565);
|
||||
|
||||
/* Configure DMA2D data size */
|
||||
WRITE_REG(DMA2D->NLR, (1 | (count << DMA2D_NLR_PL_Pos)));
|
||||
|
||||
/* Configure DMA2D destination address */
|
||||
WRITE_REG(DMA2D->OMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Configure DMA2D source address */
|
||||
WRITE_REG(DMA2D->FGMAR, reinterpret_cast<uint32_t>(data));
|
||||
|
||||
/* Configure DMA2D Stream source2 address */
|
||||
WRITE_REG(DMA2D->BGMAR, reinterpret_cast<uint32_t>(ptr));
|
||||
|
||||
/* Load CLUT if not already loaded */
|
||||
if (L8ClutLoaded == 0)
|
||||
{
|
||||
/* Write foreground CLUT memory address */
|
||||
WRITE_REG(DMA2D->FGCMAR, reinterpret_cast<uint32_t>(&L8CLUT->data));
|
||||
|
||||
/* Set DMA2D color mode and alpha mode */
|
||||
WRITE_REG(DMA2D->FGPFCCR, DMA2D_INPUT_L8 | (DMA2D_COMBINE_ALPHA << DMA2D_BGPFCCR_AM_Pos) | (alpha << 24));
|
||||
|
||||
MODIFY_REG(DMA2D->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), (((L8CLUT->size - 1) << DMA2D_FGPFCCR_CS_Pos) | (DMA2D_CCM_ARGB8888 << DMA2D_FGPFCCR_CCM_Pos)));
|
||||
|
||||
/* Enable the CLUT loading for the foreground */
|
||||
SET_BIT(DMA2D->FGPFCCR, DMA2D_FGPFCCR_START);
|
||||
|
||||
/* Write DMA2D BGPFCCR register */
|
||||
WRITE_REG(DMA2D->BGPFCCR, DMA2D_INPUT_RGB565 | (DMA2D_NO_MODIF_ALPHA << DMA2D_BGPFCCR_AM_Pos));
|
||||
|
||||
/* Mark CLUT loaded */
|
||||
L8ClutLoaded = 1;
|
||||
|
||||
/* Wait for load to finish */
|
||||
while ((READ_REG(DMA2D->FGPFCCR) & DMA2D_FGPFCCR_START) != 0U);
|
||||
|
||||
/* Clear CLUT Transfer Complete flag */
|
||||
DMA2D->IFCR = (DMA2D_FLAG_CTC);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set correct alpha for these pixels */
|
||||
MODIFY_REG(DMA2D->FGPFCCR, DMA2D_BGPFCCR_ALPHA_Msk, alpha << 24);
|
||||
}
|
||||
|
||||
/* Start pixel transfer in blending mode */
|
||||
WRITE_REG(DMA2D->CR, DMA2D_M2M_BLEND | DMA2D_CR_START);
|
||||
}
|
||||
|
||||
} // namespace rgb565
|
||||
} // namespace paint
|
||||
} // namespace touchgfx
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
******************************************************************************
|
||||
* File Name : STM32DMA.hpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0. Please, do not edit!
|
||||
* This file is generated by TouchGFX Generator 4.21.1. Please, do not edit!
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
|
|
@ -1,22 +1,21 @@
|
|||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* File Name : TouchGFXConfiguration.cpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.19.1.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
******************************************************************************
|
||||
* File Name : TouchGFXConfiguration.cpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.21.1. Please, do not edit!
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include <texts/TypedTextDatabase.hpp>
|
||||
#include <fonts/ApplicationFontProvider.hpp>
|
||||
#include <gui/common/FrontendHeap.hpp>
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
******************************************************************************
|
||||
* File Name : TouchGFXGeneratedHAL.cpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0. Please, do not edit!
|
||||
* This file is generated by TouchGFX Generator 4.21.1. Please, do not edit!
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
******************************************************************************
|
||||
* File Name : TouchGFXGeneratedHAL.hpp
|
||||
******************************************************************************
|
||||
* This file is generated by TouchGFX Generator 4.20.0. Please, do not edit!
|
||||
* This file is generated by TouchGFX Generator 4.21.1. Please, do not edit!
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
|
|
|
@ -44,7 +44,7 @@ pins:
|
|||
type: 5v
|
||||
|
||||
- pin: 12
|
||||
function: Power supply from bintery.
|
||||
function: Power supply from battery.
|
||||
type: 12v
|
||||
|
||||
- pin: 13
|
||||
|
|
Loading…
Reference in New Issue