rusefi/firmware/global.h

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/*
* @file global.h
*
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* Global utility header file for firmware
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*
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* Simulator and unit tests have their own version of this header
*
* While this header contains 'EXTERN_ENGINE' and 'DECLARE_ENGINE_PARAMETER_SIGNATURE' magic,
* this header is not allowed to actually include higher-level engine related headers
*
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* @date May 27, 2013
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#pragma once
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// todo: remove this from here and rely on os_access.h. unfortunately hal.h includes ch.h :(
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#include <hal.h>
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// *** IMPORTANT *** from painful experience we know that common_headers.h has to be included AFTER hal.h
// *** https://github.com/rusefi/rusefi/issues/1007 ***
#include "common_headers.h"
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// for US_TO_NT_MULTIPLIER
#include "mpu_util.h"
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// this is about MISRA not liking 'time.h'. todo: figure out something
#if defined __GNUC__
// GCC
#include <sys/types.h>
#else
// IAR
typedef unsigned int time_t;
#endif
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#ifdef __cplusplus
#include "eficonsole.h"
#include <ch.hpp>
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#endif /* __cplusplus */
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/* definition to expand macro then apply to pragma message */
#define VALUE_TO_STRING(x) #x
#define VALUE(x) VALUE_TO_STRING(x)
#define VAR_NAME_VALUE(var) #var "=" VALUE(var)
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#define CORE_CLOCK STM32_SYSCLK
//#pragma message(VAR_NAME_VALUE(CORE_CLOCK))
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/**
* project-wide default thread stack size
* See also PORT_INT_REQUIRED_STACK
* See getRemainingStack()
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* See CountFreeStackSpace()
* See "threadsinfo" command cmd_threads
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*/
#ifndef UTILITY_THREAD_STACK_SIZE
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#define UTILITY_THREAD_STACK_SIZE 400
#endif /* UTILITY_THREAD_STACK_SIZE */
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#define getCurrentRemainingStack() getRemainingStack(chThdGetSelfX())
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#define EFI_ERROR_CODE 0xffffffff
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/**
* rusEfi is placing some of data structures into CCM memory simply
* in order to use that memory - no magic about which RAM is faster etc.
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* That said, CCM/TCM could be faster as there will be less bus contention
* with DMA.
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*
* Please note that DMA does not work with CCM memory
*/
#if defined(STM32F4XX)
// CCM memory is 64k
#define CCM_OPTIONAL __attribute__((section(".ram4")))
#define NO_CACHE // F4 has no cache, do nothing
#elif defined(STM32F7XX)
// DTCM memory is 128k
#define CCM_OPTIONAL __attribute__((section(".ram3")))
// SRAM2 is 16k and set to disable dcache
#define NO_CACHE __attribute__((section(".ram2")))
#elif defined(STM32H7XX)
// DTCM memory is 128k
#define CCM_OPTIONAL __attribute__((section(".ram5")))
// SRAM3 is 32k and set to disable dcache
#define NO_CACHE __attribute__((section(".ram3")))
#else /* this MCU doesn't need these */
#define CCM_OPTIONAL
#define NO_CACHE
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#endif
#define UNIT_TEST_BUSY_WAIT_CALLBACK() {}