mirror of https://github.com/rusefi/rusefi.git
56 lines
1.1 KiB
Prolog
56 lines
1.1 KiB
Prolog
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update=1/20/2017 5:28:03 PM
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version=1
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last_client=kicad
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[general]
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version=1
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[eeschema]
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version=1
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LibDir=../rusefi_lib
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[eeschema/libraries]
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LibName1=KICAD_Older_Version
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LibName2=power
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LibName3=device
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LibName4=conn
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LibName5=linear
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LibName6=analog_switches
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LibName7=stm32
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LibName8=../rusefi_misc/lib/art-electro-conn
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LibName9=../rusefi_misc/lib/art-electro-ic
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LibName10=../rusefi_misc/lib/art-electro-conn_2
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LibName11=../rusefi_misc/lib/logo_flipped
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LibName12=crystal(mc306)
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[pcbnew]
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version=1
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PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
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LastNetListRead=stm32f407_board.net
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PadDrill=0
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PadDrillOvalY=0
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PadSizeH=1.3
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PadSizeV=1.9
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PcbTextSizeV=1
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PcbTextSizeH=1
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PcbTextThickness=0.3
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ModuleTextSizeV=1
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ModuleTextSizeH=1
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ModuleTextSizeThickness=0.15
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SolderMaskClearance=0
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SolderMaskMinWidth=0
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DrawSegmentWidth=0.2
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BoardOutlineThickness=0.15
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ModuleOutlineThickness=0.15
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[schematic_editor]
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version=1
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PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
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PlotDirectoryName=
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SubpartIdSeparator=0
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SubpartFirstId=65
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NetFmtName=Pcbnew
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SpiceForceRefPrefix=0
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SpiceUseNetNumbers=0
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LabSize=60
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