mirror of https://github.com/rusefi/rusefi.git
Enable CAN for OpenBLT https://github.com/rusefi/rusefi/issues/6043
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@ -15,8 +15,26 @@ extern "C" {
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// CAN1_RX: { PI9, PA11, PH14, PD0, PB8 }, CAN1_TX: { PA12, PH13, PD1, PB9 }
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// CAN2_RX: { PB5, PB12 }, CAN2_TX: { PB6, PB13 }
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#if !defined(OPENBLT_CAND) || !defined(OPENBLT_CAN_RX_PIN) || !defined(OPENBLT_CAN_RX_PORT) || !defined(OPENBLT_CAN_TX_PIN) || !defined(OPENBLT_CAN_TX_PORT)
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#ifndef BOOT_COM_CAN_CHANNEL_INDEX
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#error BOOT_COM_CAN_CHANNEL_INDEX is not defined.
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#elif (BOOT_COM_CAN_CHANNEL_INDEX == 0)
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#ifndef STM32_CAN_USE_CAN1
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#error STM32_CAN_USE_CAN1 is not enabled for CAN index 0
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#endif
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#undef OPENBLT_CAND
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#define OPENBLT_CAND CAND1
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#elif (BOOT_COM_CAN_CHANNEL_INDEX == 1)
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#ifndef STM32_CAN_USE_CAN2
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#error STM32_CAN_USE_CAN2 is not enabled for CAN index 1
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#endif
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#undef OPENBLT_CAND
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#define OPENBLT_CAND CAND2
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#else
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#error Unknown BOOT_COM_CAN_CHANNEL_INDEX.
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#endif
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#if !defined(OPENBLT_CAND) || !defined(OPENBLT_CAN_RX_PIN) || !defined(OPENBLT_CAN_RX_PORT) || !defined(OPENBLT_CAN_TX_PIN) || !defined(OPENBLT_CAN_TX_PORT)
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#ifdef STM32_CAN_USE_CAN2
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#define OPENBLT_CAND CAND2
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#define OPENBLT_CAN_RX_PORT GPIOB
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#define OPENBLT_CAN_RX_PIN 5
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@ -84,7 +84,7 @@
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*
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*/
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/** \brief Enable/disable CAN transport layer. */
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#define BOOT_COM_CAN_ENABLE (0)
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#define BOOT_COM_CAN_ENABLE (1)
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/** \brief Configure the desired CAN baudrate. */
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#define BOOT_COM_CAN_BAUDRATE (500000)
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/** \brief Configure CAN message ID target->host. */
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@ -95,6 +95,10 @@
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#define BOOT_COM_CAN_RX_MSG_ID (0x667 /*| 0x80000000*/)
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/** \brief Configure number of bytes in the host->target CAN message. */
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#define BOOT_COM_CAN_RX_MAX_DATA (8)
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/** \brief Select the desired CAN peripheral as a zero based index. */
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#ifndef BOOT_COM_CAN_CHANNEL_INDEX
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#define BOOT_COM_CAN_CHANNEL_INDEX (0)
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#endif /* BOOT_COM_CAN_CHANNEL_INDEX */
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/* The RS232 communication interface is selected by setting the BOOT_COM_RS232_ENABLE
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* configurable to 1. Configurable BOOT_COM_RS232_BAUDRATE selects the communication speed
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