mirror of https://github.com/rusefi/rusefi.git
bootloader
This commit is contained in:
rusefillc
rusefillc
parent
1bafb6f1e8
commit
18f4f96c93
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@ -3,8 +3,6 @@
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# see setup_linux_environment.sh but Windows is also totally fine
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#
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.PHONY: openblt
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CHIBIOS = ChibiOS
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RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
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RULESFILE = $(RULESPATH)/rules.mk
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@ -114,10 +112,6 @@ ifeq ($(USE_SMART_BUILD),)
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USE_SMART_BUILD = no
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endif
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ifeq ($(USE_BOOTLOADER),)
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USE_BOOTLOADER = no
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endif
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ifeq ($(USE_OPENBLT),)
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USE_OPENBLT = no
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endif
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@ -216,18 +210,9 @@ endif
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include $(PROJECT_DIR)/hw_layer/mass_storage/mass_storage.mk
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include $(PROJECT_DIR)/common.mk
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ifeq ($(BOOTLOADERINC),)
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# include default bootloader code
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BOOTLOADERINC= $(PROJECT_DIR)/bootloader/
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endif
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ifeq ($(USE_BOOTLOADER),yes)
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include $(PROJECT_DIR)/bootloader/bootloader.mk
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endif
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ifeq ($(USE_OPENBLT),yes)
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# Reserve start of flash for OpenBLT
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USE_OPT += -Wl,--defsym=BOOTLOADER=1
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USE_OPT += -Wl,--defsym=HAS_BOOTLOADER=1
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DDEFS += -DEFI_USE_OPENBLT=TRUE
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endif
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@ -255,7 +240,7 @@ CSRC = gcc_version_check.c \
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$(HW_LAYER_DRIVERS_CORE) \
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$(HW_LAYER_DRIVERS) \
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$(RUSEFI_LIB_C) \
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main_hardfault.c
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$(PROJECT_DIR)/hw_layer/main_hardfault.c
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
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# setting.
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@ -293,7 +278,7 @@ TCPPSRC =
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# List ASM source files here
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ASMXSRC = $(ALLXASMSRC) \
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$(RUSEFIASM) \
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main_hardfault_asm.S
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$(PROJECT_DIR)/hw_layer/main_hardfault_asm.S
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#
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# WARNING! order of variables is important here - for instance cypress own folders should go before default folders
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@ -303,7 +288,6 @@ INCDIR = \
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$(BOARDINC) \
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$(ALLINC) \
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$(TESTINC) \
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$(BOOTLOADERINC) \
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$(CHIBIOS)/os/various \
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$(RUSEFI_LIB_INC) \
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$(CONFDIR) \
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@ -386,12 +370,6 @@ ULIBS = -lm --specs=nano.specs -Wl,--sort-section=alignment
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include $(RULESFILE)
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openblt:
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make -f $(PROJECT_DIR)/hw_layer/openblt/openblt.mk BOARD_DIR=$(BOARD_DIR) PROJECT_BOARD=$(PROJECT_BOARD) PROJECT_CPU=$(PROJECT_CPU)
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openblt_clean:
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make -f $(PROJECT_DIR)/hw_layer/openblt/openblt.mk clean BOARD_DIR=$(BOARD_DIR) PROJECT_BOARD=$(PROJECT_BOARD) PROJECT_CPU=$(PROJECT_CPU)
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# Enable precompiled header
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include rusefi_pch.mk
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@ -1,40 +0,0 @@
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#|--------------------------------------------------------------------------------------|
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#| Collect project files |
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#|--------------------------------------------------------------------------------------|
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# Collect all application files in the current directory and its subdirectories, but
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# exclude flash-layout.c as this one is directly included in a source file, when used.
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PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
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#|--------------------------------------------------------------------------------------|
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#| Options for toolchain binaries |
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#|--------------------------------------------------------------------------------------|
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ifeq ($(PROJECT_CPU),ARCH_STM32F4)
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BRDFLAGS = -DSTM32F429xx
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else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
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#TODO: check what CPU is on proteus f7
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BRDFLAGS = -DSTM32F767xx
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else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
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#TODO: check what CPU is on proteus h7
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BRDFLAGS = -DSTM32H743xx
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endif
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#|--------------------------------------------------------------------------------------|
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#| Specify library files |
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#|--------------------------------------------------------------------------------------|
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LIBS =
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# We use HSI (internal) on proteus. We define HSE (external) only to have compiler happy.
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BRDFLAGS += -DHSE_VALUE=8000000
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# hellen144
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BRDFLAGS += -DSTATUS_LED_PORT=GPIOG -DSTATUS_LED_PIN=GPIO_PIN_0
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# Frequency of the external crystal oscillator
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BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=8000
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BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000
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# Select the desired UART peripheral as a zero based index.
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BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2
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# \brief Select the desired CAN peripheral as a zero based index.
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BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/main_internal_osc.c
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@ -1,297 +0,0 @@
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/************************************************************************************//**
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* \brief Bootloader application source file.
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */
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#ifdef STM32F429xx
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#include "stm32f4xx.h" /* STM32 CPU and HAL header */
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#endif
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#ifdef STM32F767xx
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#include "stm32f7xx.h" /* STM32 CPU and HAL header */
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#endif
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#ifdef STM32H743xx
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#include "stm32h7xx.h" /* STM32 CPU and HAL header */
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#endif
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/****************************************************************************************
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* Function prototypes
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****************************************************************************************/
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static void Init(void);
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static void SystemClock_Config(void);
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/************************************************************************************//**
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** \brief This is the entry point for the bootloader application and is called
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** by the reset interrupt vector after the C-startup routines executed.
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** \return Program return code.
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**
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****************************************************************************************/
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int main(void)
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{
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/* initialize the microcontroller */
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Init();
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/* initialize the bootloader */
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BootInit();
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/* start the infinite program loop */
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while (1)
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{
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/* run the bootloader task */
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BootTask();
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}
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/* program should never get here */
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return 0;
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} /*** end of main ***/
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/************************************************************************************//**
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** \brief Interrupt service routine of the timer.
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** \return none.
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**
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****************************************************************************************/
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void SysTick_Handler(void)
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{
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/* Increment the tick counter. */
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HAL_IncTick();
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/* Invoke the system tick handler. */
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HAL_SYSTICK_IRQHandler();
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} /*** end of TimerISRHandler ***/
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/************************************************************************************//**
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** \brief Initializes the microcontroller.
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** \return none.
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**
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****************************************************************************************/
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static void Init(void)
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{
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/* HAL library initialization */
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HAL_Init();
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/* configure system clock */
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SystemClock_Config();
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} /*** end of Init ***/
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/************************************************************************************//**
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** \brief System Clock Configuration. This code was created by CubeMX and configures
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** the system clock to match the configuration in the bootloader's
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** configuration (blt_conf.h), specifically the macros:
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** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
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** Note that the Lower Layer drivers were selected in CubeMX for the RCC
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** subsystem.
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** \return none.
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**
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****************************************************************************************/
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static void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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/* Configure the main internal regulator output voltage. */
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/* Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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// todo: see comment in main_internal_osc.c
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 8;
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RCC_OscInitStruct.PLL.PLLN = 336;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 7;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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/* Clock configuration incorrect or hardware failure. Hang the system to prevent
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* damage.
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*/
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ASSERT_RT(BLT_FALSE);
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}
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/* Initializes the CPU, AHB and APB buses clocks. */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
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{
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/* Clock configuration incorrect or hardware failure. Hang the system to prevent
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* damage.
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*/
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ASSERT_RT(BLT_FALSE);
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}
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} /*** end of SystemClock_Config ***/
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/************************************************************************************//**
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** \brief Initializes the Global MSP. This function is called from HAL_Init()
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** function to perform system level initialization (GPIOs, clock, DMA,
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** interrupt).
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** \return none.
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**
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****************************************************************************************/
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void HAL_MspInit(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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/* Power and SYSCFG clock enable. */
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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/* GPIO ports clock enable. */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOE_CLK_ENABLE();
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__HAL_RCC_GPIOH_CLK_ENABLE();
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/* Configure PE3 pin for the LED. */
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GPIO_InitStruct.Pin = STATUS_LED_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(STATUS_LED_PORT, &GPIO_InitStruct);
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HAL_GPIO_WritePin(STATUS_LED_PORT, STATUS_LED_PIN, GPIO_PIN_SET);
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#if 0
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/* Configure GPIO pin for (optional) backdoor entry input. */
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GPIO_InitStruct.Pin = GPIO_PIN_13;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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#endif
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#if (BOOT_COM_RS232_ENABLE > 0)
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/* UART TX and RX GPIO pin configuration. */
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GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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/* UART clock enable. */
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__HAL_RCC_USART3_CLK_ENABLE();
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#endif
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* CAN TX and RX GPIO pin configuration. */
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GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF9_CAN2;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* CAN clock enable. */
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/* CAN1 clock needs to be enabled for CAN2 operation */
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__HAL_RCC_CAN1_CLK_ENABLE();
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__HAL_RCC_CAN2_CLK_ENABLE();
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#endif
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#if (BOOT_COM_USB_ENABLE > 0)
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/* USB pin configuration. */
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GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* USB clock enable. */
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__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
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#endif
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} /*** end of HAL_MspInit ***/
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/************************************************************************************//**
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** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
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** function to perform system level de-initialization (GPIOs, clock, DMA,
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** interrupt).
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** \return none.
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**
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****************************************************************************************/
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void HAL_MspDeInit(void)
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{
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/* Reset the RCC clock configuration to the default reset state. */
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HAL_RCC_DeInit();
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/* Reset GPIO pin for the LED to turn it off. */
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HAL_GPIO_WritePin(STATUS_LED_PORT, STATUS_LED_PIN, GPIO_PIN_RESET);
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/* Deinit used GPIOs. */
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HAL_GPIO_DeInit(STATUS_LED_PORT, STATUS_LED_PIN);
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#if 0
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
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#endif
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#if (BOOT_COM_USB_ENABLE > 0)
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/* Deinit used GPIOs. */
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12);
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/* USB clock disable. */
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__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
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#endif
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* Deinit used GPIOs. */
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12);
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/* CAN clock disable. */
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__HAL_RCC_CAN2_CLK_DISABLE();
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#endif
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#if (BOOT_COM_RS232_ENABLE > 0)
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/* Deinit used GPIOs. */
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10);
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11);
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/* UART clock disable. */
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__HAL_RCC_USART3_CLK_DISABLE();
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#endif
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/* GPIO ports clock disable. */
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__HAL_RCC_GPIOH_CLK_DISABLE();
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__HAL_RCC_GPIOE_CLK_DISABLE();
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__HAL_RCC_GPIOD_CLK_DISABLE();
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__HAL_RCC_GPIOC_CLK_DISABLE();
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__HAL_RCC_GPIOB_CLK_DISABLE();
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__HAL_RCC_GPIOA_CLK_DISABLE();
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/* SYSCFG and PWR clock disable. */
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__HAL_RCC_PWR_CLK_DISABLE();
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__HAL_RCC_SYSCFG_CLK_DISABLE();
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} /*** end of HAL_MspDeInit ***/
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/*********************************** end of main.c *************************************/
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|
|
@ -1,31 +0,0 @@
|
|||
#|--------------------------------------------------------------------------------------|
|
||||
#| Collect project files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
# Collect all application files in the current directory and its subdirectories, but
|
||||
# exclude flash-layout.c as this one is directly included in a source file, when used.
|
||||
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Options for toolchain binaries |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
BRDFLAGS = -DSTM32F429xx
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Specify library files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
LIBS =
|
||||
|
||||
BRDFLAGS += -DHSE_VALUE=8000000
|
||||
|
||||
BRDFLAGS += -DSTATUS_LED_PORT=GPIOE -DSTATUS_LED_PIN=GPIO_PIN_3
|
||||
|
||||
# Frequency of the external crystal oscillator
|
||||
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=8000
|
||||
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000
|
||||
# Select the desired UART peripheral as a zero based index.
|
||||
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2
|
||||
# \brief Select the desired CAN peripheral as a zero based index.
|
||||
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=1
|
||||
|
||||
# see also BOOT_COM_USB_BACKDOOR_EXTENSION_MS
|
||||
BRDFLAGS += -DBOOT_COM_USB_ENABLE=1
|
||||
|
|
@ -1,39 +0,0 @@
|
|||
#|--------------------------------------------------------------------------------------|
|
||||
#| Collect project files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
# Collect all application files in the current directory and its subdirectories, but
|
||||
# exclude flash-layout.c as this one is directly included in a source file, when used.
|
||||
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Options for toolchain binaries |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
|
||||
BRDFLAGS = -DSTM32F429xx
|
||||
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
|
||||
BRDFLAGS = -DSTM32F767xx
|
||||
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
|
||||
BRDFLAGS = -DSTM32H743xx
|
||||
endif
|
||||
|
||||
# We use HSI (internal) on proteus. We define HSE (external) only to have compiler happy.
|
||||
BRDFLAGS += -DHSE_VALUE=8000000
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Specify library files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
LIBS =
|
||||
|
||||
BRDFLAGS += -DSTATUS_LED_PORT=GPIOE -DSTATUS_LED_PIN=GPIO_PIN_3
|
||||
|
||||
# Frequency of the external crystal oscillator
|
||||
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=8000
|
||||
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000
|
||||
# Select the desired UART peripheral as a zero based index.
|
||||
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2
|
||||
# \brief Select the desired CAN peripheral as a zero based index.
|
||||
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
|
||||
# USB support
|
||||
BRDFLAGS += -DBBOOT_COM_USB_ENABLE=1
|
||||
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/main_internal_osc.c
|
||||
|
|
@ -7,12 +7,6 @@ BOARD_C = $(BOARD_DIR)/board.c
|
|||
# Required include directories
|
||||
BOARDINC += $(BOARD_DIR)/config/controllers/algo
|
||||
|
||||
# Override LD script
|
||||
ifeq ($(USE_BOOTLOADER),yes)
|
||||
# include Prometheus bootloader code
|
||||
BOOTLOADERINC = $(PROJECT_DIR)/bootloader/subaru_eg33
|
||||
endif
|
||||
|
||||
#LED
|
||||
DDEFS += -DLED_CRITICAL_ERROR_BRAIN_PIN=Gpio::G7
|
||||
DDEFS += -DLED_PIN_MODE=OM_INVERTED
|
||||
|
|
@ -35,9 +29,6 @@ DDEFS += -DUART_USE_WAIT=FALSE
|
|||
#Mass Storage
|
||||
DDEFS += -DEFI_EMBED_INI_MSD=TRUE
|
||||
|
||||
#Linker options, flash size
|
||||
USE_OPT += -Wl,--defsym=FLASH_SIZE=1m
|
||||
|
||||
# Shared variables
|
||||
ALLINC += $(BOARDINC)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,302 +0,0 @@
|
|||
/************************************************************************************//**
|
||||
* \brief Bootloader application source file.
|
||||
* \internal
|
||||
*----------------------------------------------------------------------------------------
|
||||
* C O P Y R I G H T
|
||||
*----------------------------------------------------------------------------------------
|
||||
* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
|
||||
*
|
||||
*----------------------------------------------------------------------------------------
|
||||
* L I C E N S E
|
||||
*----------------------------------------------------------------------------------------
|
||||
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation, either version 3 of the License, or (at your option) any later
|
||||
* version.
|
||||
*
|
||||
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||
* PURPOSE. See the GNU General Public License for more details.
|
||||
*
|
||||
* You have received a copy of the GNU General Public License along with OpenBLT. It
|
||||
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
|
||||
*
|
||||
* \endinternal
|
||||
****************************************************************************************/
|
||||
|
||||
/****************************************************************************************
|
||||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "shared_params.h" /* Shared parameters header */
|
||||
#ifdef STM32F429xx
|
||||
#include "stm32f4xx.h" /* STM32 CPU and HAL header */
|
||||
#endif
|
||||
#ifdef STM32F767xx
|
||||
#include "stm32f7xx.h" /* STM32 CPU and HAL header */
|
||||
#endif
|
||||
#ifdef STM32H743xx
|
||||
#include "stm32h7xx.h" /* STM32 CPU and HAL header */
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Function prototypes
|
||||
****************************************************************************************/
|
||||
static void Init(void);
|
||||
static void SystemClock_Config(void);
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief This is the entry point for the bootloader application and is called
|
||||
** by the reset interrupt vector after the C-startup routines executed.
|
||||
** \return Program return code.
|
||||
**
|
||||
****************************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* initialize the microcontroller */
|
||||
Init();
|
||||
/* initialize the shared parameters module */
|
||||
SharedParamsInit();
|
||||
/* initialize the bootloader */
|
||||
BootInit();
|
||||
|
||||
/* start the infinite program loop */
|
||||
while (1)
|
||||
{
|
||||
/* run the bootloader task */
|
||||
BootTask();
|
||||
}
|
||||
|
||||
/* program should never get here */
|
||||
return 0;
|
||||
} /*** end of main ***/
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Interrupt service routine of the timer.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* Increment the tick counter. */
|
||||
HAL_IncTick();
|
||||
/* Invoke the system tick handler. */
|
||||
HAL_SYSTICK_IRQHandler();
|
||||
} /*** end of TimerISRHandler ***/
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the microcontroller.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void Init(void)
|
||||
{
|
||||
/* HAL library initialization */
|
||||
HAL_Init();
|
||||
/* configure system clock */
|
||||
SystemClock_Config();
|
||||
} /*** end of Init ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief System Clock Configuration. This code was created by CubeMX and configures
|
||||
** the system clock to match the configuration in the bootloader's
|
||||
** configuration (blt_conf.h), specifically the macros:
|
||||
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
|
||||
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
|
||||
** subsystem.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/* Configure the main internal regulator output voltage. */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/* Initializes the CPU, AHB and APB busses clocks. */
|
||||
// todo: see comment in main_internal_osc.c
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9; //48 MHz for USB
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
|
||||
* damage.
|
||||
*/
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
|
||||
/* Activate the Over-Drive mode. */
|
||||
if (HAL_PWREx_EnableOverDrive() != HAL_OK)
|
||||
{
|
||||
/* Clock overdrive hardware failure. Hang the system to prevent damage.
|
||||
*/
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
|
||||
/* Initializes the CPU, AHB and APB busses clocks. */
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
|
||||
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
|
||||
{
|
||||
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
|
||||
* damage.
|
||||
*/
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
} /*** end of SystemClock_Config ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the Global MSP. This function is called from HAL_Init()
|
||||
** function to perform system level initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
/* Power and SYSCFG clock enable. */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
/* GPIO ports clock enable. */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
|
||||
/* Configure GPIO pin for the Red LED. */
|
||||
GPIO_InitStruct.Pin = STATUS_LED_PIN;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(STATUS_LED_PORT, &GPIO_InitStruct);
|
||||
HAL_GPIO_WritePin(STATUS_LED_PORT, STATUS_LED_PIN, GPIO_PIN_RESET);
|
||||
|
||||
#if 0
|
||||
/* Configure GPIO pin for (optional) backdoor entry input. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
#endif
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* UART clock enable. */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
#endif
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* CAN enable pin */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0, GPIO_PIN_SET);
|
||||
/* CAN TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* CAN clock enable. */
|
||||
__HAL_RCC_CAN1_CLK_ENABLE();
|
||||
#endif
|
||||
#if (BOOT_COM_USB_ENABLE > 0)
|
||||
/* USB pin configuration. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USB clock enable. */
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
#endif
|
||||
} /*** end of HAL_MspInit ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
|
||||
** function to perform system level de-initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspDeInit(void)
|
||||
{
|
||||
/* Reset the RCC clock configuration to the default reset state. */
|
||||
HAL_RCC_DeInit();
|
||||
|
||||
/* Reset GPIO pin for the LED to turn it off. */
|
||||
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_8, GPIO_PIN_SET);
|
||||
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
|
||||
|
||||
#if (BOOT_COM_USB_ENABLE > 0)
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12);
|
||||
/* USB clock disable. */
|
||||
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0);
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_1);
|
||||
/* CAN clock disable. */
|
||||
__HAL_RCC_CAN1_CLK_DISABLE();
|
||||
#endif
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
|
||||
/* UART clock disable. */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
#endif
|
||||
|
||||
/* GPIO ports clock disable. */
|
||||
__HAL_RCC_GPIOG_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOD_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOC_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOB_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOA_CLK_DISABLE();
|
||||
|
||||
/* SYSCFG and PWR clock disable. */
|
||||
__HAL_RCC_PWR_CLK_DISABLE();
|
||||
__HAL_RCC_SYSCFG_CLK_DISABLE();
|
||||
} /*** end of HAL_MspDeInit ***/
|
||||
|
||||
|
||||
/*********************************** end of main.c *************************************/
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
#|--------------------------------------------------------------------------------------|
|
||||
#| Collect project files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
# Collect all application files in the current directory and its subdirectories, but
|
||||
# exclude flash-layout.c as this one is directly included in a source file, when used.
|
||||
PROJ_FILES += $(filter-out $(OPENBLT_BOARD_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_BOARD_DIR), *.c *.h *.s))
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Specific options for toolchain binaries |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
BRDFLAGS = -DSTM32F767xx -DHSE_VALUE=25000000
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Specify library files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
LIBS =
|
||||
|
||||
BRDFLAGS += -DSTATUS_LED_PORT=GPIOG -DSTATUS_LED_PIN=GPIO_PIN_8
|
||||
|
||||
# Frequency of the external crystal oscillator
|
||||
BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=25000
|
||||
BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=216000
|
||||
BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=0
|
||||
# \brief Select the desired CAN peripheral as a zero based index.
|
||||
BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
|
||||
# USB support
|
||||
BRDFLAGS += -DBBOOT_COM_USB_ENABLE=1
|
||||
|
|
@ -44,6 +44,10 @@
|
|||
* de-initialize application specific parts, for example to stop blinking an LED, etc.
|
||||
*/
|
||||
|
||||
/** \brief Frequency of the external crystal oscillator. */
|
||||
#define BOOT_CPU_XTAL_SPEED_KHZ (1000)
|
||||
/** \brief Desired system speed. */
|
||||
#define BOOT_CPU_SYSTEM_SPEED_KHZ (1000)
|
||||
/** \brief Motorola or Intel style byte ordering. */
|
||||
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
|
||||
/** \brief Enable/disable hook function call right before user program start. */
|
||||
|
|
@ -80,7 +84,7 @@
|
|||
*
|
||||
*/
|
||||
/** \brief Enable/disable CAN transport layer. */
|
||||
#define BOOT_COM_CAN_ENABLE (1)
|
||||
#define BOOT_COM_CAN_ENABLE (0)
|
||||
/** \brief Configure the desired CAN baudrate. */
|
||||
#define BOOT_COM_CAN_BAUDRATE (500000)
|
||||
/** \brief Configure CAN message ID target->host. */
|
||||
|
|
@ -105,9 +109,12 @@
|
|||
/** \brief Configure the desired communication speed. */
|
||||
#define BOOT_COM_RS232_BAUDRATE (115200)
|
||||
/** \brief Configure number of bytes in the target->host data packet. */
|
||||
#define BOOT_COM_RS232_TX_MAX_DATA (64)
|
||||
#define BOOT_COM_RS232_TX_MAX_DATA (200)
|
||||
/** \brief Configure number of bytes in the host->target data packet. */
|
||||
#define BOOT_COM_RS232_RX_MAX_DATA (64)
|
||||
#define BOOT_COM_RS232_RX_MAX_DATA (200)
|
||||
|
||||
/** only USB supported, this is ignored but required */
|
||||
#define BOOT_COM_RS232_CHANNEL_INDEX 0
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
|
|
@ -143,26 +150,6 @@
|
|||
/** \brief Enable/disable hooks functions to override the user program checksum handling. */
|
||||
#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0)
|
||||
|
||||
#define BOOT_COM_USB_TX_MAX_DATA (63)
|
||||
#define BOOT_COM_USB_RX_MAX_DATA (63)
|
||||
|
||||
/****************************************************************************************
|
||||
* F L A S H M E M O R Y D R I V E R C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/** \brief Enable support for a custom flash layout table. It is located in
|
||||
* flash_layout.c. This was done because the default flashLayout[] table
|
||||
* in the bootloader's core defines flash map for single bank mode.
|
||||
* RusEFI uses dual bank mode.
|
||||
*/
|
||||
#define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (1)
|
||||
|
||||
#define BOOT_FLASH_CUSTOM_INIT_ENABLE (1)
|
||||
|
||||
/** \brief Use one of 'reserved' IRQ vectors at the beginig on vector table.
|
||||
*/
|
||||
#define BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x1C)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* W A T C H D O G D R I V E R C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
|
|
|
|||
|
|
@ -1,29 +0,0 @@
|
|||
|
||||
/* Define STM32F4, STM32F7 or STM32F765 flash layout in dual bank mode. Only first bank is defined */
|
||||
|
||||
/* This file is included in another .c file. So it is ok to have static and no users here */
|
||||
static const tFlashSector flashLayout[] =
|
||||
{
|
||||
/* space is reserved for a bootloader configuration with all supported communication
|
||||
* interfaces enabled. when for example only UART is needed, then the space required
|
||||
* for the bootloader can be made a lot smaller here.
|
||||
*/
|
||||
/*{ 0x08000000, 16 * 1024, 0 }, flash sector 0 - 16kb - reserved for OpenBLT */
|
||||
/*{ 0x08004000, 16 * 1024, 1 }, flash sector 1 - 16kb - reserved for OpenBLT */
|
||||
{ 0x08008000, 16 * 1024, 2 }, /* flash sector 2 - 16kb */
|
||||
{ 0x0800c000, 16 * 1024, 3 }, /* flash sector 3 - 16kb */
|
||||
{ 0x08010000, 64 * 1024, 4 }, /* flash sector 4 - 64kb */
|
||||
{ 0x08020000, 128 * 1024, 5 }, /* flash sector 5 - 128kb */
|
||||
{ 0x08040000, 128 * 1024, 6 }, /* flash sector 6 - 128kb */
|
||||
{ 0x08060000, 128 * 1024, 7 }, /* flash sector 7 - 128kb */
|
||||
#if (BOOT_NVM_SIZE_KB > 512)
|
||||
{ 0x08080000, 128 * 1024, 8 }, /* flash sector 8 - 128kb */
|
||||
{ 0x080a0000, 128 * 1024, 9 }, /* flash sector 9 - 128kb */
|
||||
{ 0x080c0000, 128 * 1024, 10}, /* flash sector 10 - 128kb */
|
||||
{ 0x080e0000, 128 * 1024, 11}, /* flash sector 11 - 128kb */
|
||||
#endif
|
||||
/* Bank #2 is not defined */
|
||||
#if (BOOT_NVM_SIZE_KB > 2048)
|
||||
#error "BOOT_NVM_SIZE_KB > 2048 is currently not supported."
|
||||
#endif
|
||||
};
|
||||
|
|
@ -1,310 +0,0 @@
|
|||
/************************************************************************************//**
|
||||
* \file Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/main.c
|
||||
* \brief Bootloader application source file.
|
||||
* \ingroup Boot_ARMCM4_STM32F4_Nucleo_F429ZI_GCC
|
||||
* \internal
|
||||
*----------------------------------------------------------------------------------------
|
||||
* C O P Y R I G H T
|
||||
*----------------------------------------------------------------------------------------
|
||||
* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
|
||||
*
|
||||
*----------------------------------------------------------------------------------------
|
||||
* L I C E N S E
|
||||
*----------------------------------------------------------------------------------------
|
||||
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as published by the Free
|
||||
* Software Foundation, either version 3 of the License, or (at your option) any later
|
||||
* version.
|
||||
*
|
||||
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||
* PURPOSE. See the GNU General Public License for more details.
|
||||
*
|
||||
* You have received a copy of the GNU General Public License along with OpenBLT. It
|
||||
* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
|
||||
*
|
||||
* \endinternal
|
||||
****************************************************************************************/
|
||||
|
||||
/****************************************************************************************
|
||||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "shared_params.h" /* Shared parameters header */
|
||||
#ifdef STM32F429xx
|
||||
#include "stm32f4xx.h" /* STM32 CPU and HAL header */
|
||||
#endif
|
||||
#ifdef STM32F767xx
|
||||
#include "stm32f7xx.h" /* STM32 CPU and HAL header */
|
||||
#endif
|
||||
#ifdef STM32H743xx
|
||||
#include "stm32h7xx.h" /* STM32 CPU and HAL header */
|
||||
#endif
|
||||
|
||||
/* Clocked from APB1 */
|
||||
#define STM32_TIMCLK2 (168000000 / 4)
|
||||
#define ENABLE_AUTO_DETECT_HSE 1
|
||||
#include "../ports/stm32/osc_detector.cpp"
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Function prototypes
|
||||
****************************************************************************************/
|
||||
static void Init(void);
|
||||
static void SystemClock_Config(void);
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief This is the entry point for the bootloader application and is called
|
||||
** by the reset interrupt vector after the C-startup routines executed.
|
||||
** \return Program return code.
|
||||
**
|
||||
****************************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* initialize the microcontroller */
|
||||
Init();
|
||||
/* initialize the shared parameters module */
|
||||
SharedParamsInit();
|
||||
/* initialize the bootloader */
|
||||
BootInit();
|
||||
|
||||
/* start the infinite program loop */
|
||||
while (1)
|
||||
{
|
||||
/* run the bootloader task */
|
||||
BootTask();
|
||||
}
|
||||
|
||||
/* program should never get here */
|
||||
return 0;
|
||||
} /*** end of main ***/
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Interrupt service routine of the timer.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* Increment the tick counter. */
|
||||
HAL_IncTick();
|
||||
/* Invoke the system tick handler. */
|
||||
HAL_SYSTICK_IRQHandler();
|
||||
} /*** end of TimerISRHandler ***/
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the microcontroller.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void Init(void)
|
||||
{
|
||||
/* HAL library initialization */
|
||||
HAL_Init();
|
||||
/* configure system clock */
|
||||
SystemClock_Config();
|
||||
} /*** end of Init ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief System Clock Configuration. This code was created by CubeMX and configures
|
||||
** the system clock to match the configuration in the bootloader's
|
||||
** configuration (blt_conf.h), specifically the macros:
|
||||
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
|
||||
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
|
||||
** subsystem.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/* Configure the main internal regulator output voltage. */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/* Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
* rusEFI main firmware can depend external oscillator frequency and we actually fabricate some boards
|
||||
* with different oscillators over the time. Until we add similar code into OpenBLT we go with internal oscillator for such
|
||||
* boards
|
||||
* TODO: actually why not go with internal for _all_ boards? Maybe remove all main_external_osc.c files?
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 25; /* in case of maximum possible 25MHz external osc */
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
|
||||
* damage.
|
||||
*/
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
|
||||
/* Initializes the CPU, AHB and APB buses clocks. */
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
|
||||
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
||||
{
|
||||
/* Clock configuration incorrect or hardware failure. Hang the system to prevent
|
||||
* damage.
|
||||
*/
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
|
||||
OscDetector();
|
||||
} /*** end of SystemClock_Config ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the Global MSP. This function is called from HAL_Init()
|
||||
** function to perform system level initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
/* Power and SYSCFG clock enable. */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
/* GPIO ports clock enable. */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
|
||||
/* Configure PE3 pin for the LED. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_SET);
|
||||
|
||||
#if 0
|
||||
/* Configure GPIO pin for (optional) backdoor entry input. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_5 | GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* UART clock enable. */
|
||||
__HAL_RCC_USART2_CLK_ENABLE();
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* CAN TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* CAN clock enable. */
|
||||
__HAL_RCC_CAN1_CLK_ENABLE();
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_USB_ENABLE > 0)
|
||||
/* USB pin configuration. */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USB clock enable. */
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
#endif
|
||||
} /*** end of HAL_MspInit ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
|
||||
** function to perform system level de-initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspDeInit(void)
|
||||
{
|
||||
/* Reset the RCC clock configuration to the default reset state. */
|
||||
HAL_RCC_DeInit();
|
||||
|
||||
/* Reset GPIO pin for the LED to turn it off. */
|
||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
|
||||
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_3);
|
||||
|
||||
#if 0
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_USB_ENABLE > 0)
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12);
|
||||
/* USB clock disable. */
|
||||
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0);
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_1);
|
||||
/* CAN clock disable. */
|
||||
__HAL_RCC_CAN1_CLK_DISABLE();
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* Deinit used GPIOs. */
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5);
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
|
||||
/* UART clock disable. */
|
||||
__HAL_RCC_USART2_CLK_DISABLE();
|
||||
#endif
|
||||
|
||||
/* GPIO ports clock disable. */
|
||||
__HAL_RCC_GPIOH_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOE_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOD_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOC_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOB_CLK_DISABLE();
|
||||
__HAL_RCC_GPIOA_CLK_DISABLE();
|
||||
|
||||
/* SYSCFG and PWR clock disable. */
|
||||
__HAL_RCC_PWR_CLK_DISABLE();
|
||||
__HAL_RCC_SYSCFG_CLK_DISABLE();
|
||||
} /*** end of HAL_MspDeInit ***/
|
||||
|
||||
|
||||
/*********************************** end of main.c *************************************/
|
||||
|
|
@ -1,246 +0,0 @@
|
|||
#****************************************************************************************
|
||||
#| Description: Makefile for GNU ARM Embedded toolchain.
|
||||
#| File Name: makefile
|
||||
#|
|
||||
#|---------------------------------------------------------------------------------------
|
||||
#| C O P Y R I G H T
|
||||
#|---------------------------------------------------------------------------------------
|
||||
#| Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
|
||||
#|
|
||||
#|---------------------------------------------------------------------------------------
|
||||
#| L I C E N S E
|
||||
#|---------------------------------------------------------------------------------------
|
||||
#| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||
#| modify it under the terms of the GNU General Public License as published by the Free
|
||||
#| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||
#| version.
|
||||
#|
|
||||
#| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||
#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||
#| PURPOSE. See the GNU General Public License for more details.
|
||||
#|
|
||||
#| You have received a copy of the GNU General Public License along with OpenBLT. It
|
||||
#| should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
|
||||
#|
|
||||
#****************************************************************************************
|
||||
SHELL = sh
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Configure project name |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
PROJ_NAME=openblt_$(PROJECT_BOARD)
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Configure tool path |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
# Configure the path to where the arm-none-eabi-gcc program is located. If the program
|
||||
# is available on the path, then the TOOL_PATH variable can be left empty.
|
||||
# Make sure to add a fordward slash at the end. Note that on Windows it should be in the
|
||||
# 8.3 short pathname format with forward slashes. To obtain the pathname in the 8.3
|
||||
# format, open the directory in the Windows command prompt and run the following command:
|
||||
# cmd /c for %A in ("%cd%") do @echo %~sA
|
||||
TOOL_PATH=$(TRGT)
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Configure sources paths |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
PROJECT_DIR=.
|
||||
OPENBLT_TRGT_DIR=$(PROJECT_DIR)/ext/openblt/Target
|
||||
OPENBLT_BOARD_DIR=$(BOARD_DIR)/openblt
|
||||
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
|
||||
OPENBLT_PORT_DIR=$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/openblt
|
||||
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
|
||||
OPENBLT_PORT_DIR=$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/openblt
|
||||
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
|
||||
OPENBLT_PORT_DIR=$(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/openblt
|
||||
endif
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Collect helpers |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
# Recursive wildcard function implementation. Example usages:
|
||||
# $(call rwildcard, , *.c *.h)
|
||||
# --> Returns all *.c and *.h files in the current directory and below
|
||||
# $(call rwildcard, /lib/, *.c)
|
||||
# --> Returns all *.c files in the /lib directory and below
|
||||
rwildcard = $(strip $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)))
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Include port and board files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
PROJ_FILES=
|
||||
include $(OPENBLT_PORT_DIR)/port.mk
|
||||
include $(OPENBLT_BOARD_DIR)/oblt_board.mk
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Collect bootloader core files |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/*.h)
|
||||
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/blt_conf.h
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/hooks.c
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/led.c
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/led.h
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/shared_params.c
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/shared_params.h
|
||||
|
||||
# USB support
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_desc.c
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_desc.h
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_conf.c
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_conf.h
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_bulk.c
|
||||
PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_bulk.h
|
||||
# Common USB lib
|
||||
PROJ_FILES += $(wildcard $(PROJECT_DIR)/ext/openblt/Target/Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/lib/STM32_USB_Device_Library/Core/Src/*.c)
|
||||
PROJ_FILES += $(wildcard $(PROJECT_DIR)/ext/openblt/Target/Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/lib/STM32_USB_Device_Library/Core/Inc/*.h)
|
||||
|
||||
# CPU-dependent sources
|
||||
ifeq ($(PROJECT_CPU),ARCH_STM32F4)
|
||||
# Collect bootloader port files
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/*.h)
|
||||
# Collect bootloader port compiler specific files
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/GCC/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM4_STM32F4/GCC/*.h)
|
||||
# LD file
|
||||
LFLAGS = -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/openblt/STM32F4xx.ld"
|
||||
# Port specific options
|
||||
PORTFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16
|
||||
PORTFLAGS += -DSTM32F4XX
|
||||
else ifeq ($(PROJECT_CPU),ARCH_STM32F7)
|
||||
# Collect bootloader port files
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/*.h)
|
||||
# Collect bootloader port compiler specific files
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/GCC/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/GCC/*.h)
|
||||
# LD file
|
||||
LFLAGS += -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/openblt/STM32F7xx.ld"
|
||||
# Port specific options
|
||||
PORTFLAGS = -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16
|
||||
PORTFLAGS += -DSTM32F7XX
|
||||
else ifeq ($(PROJECT_CPU),ARCH_STM32H7)
|
||||
# Collect bootloader port files
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/*.h)
|
||||
# Collect bootloader port compiler specific files
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/GCC/*.c)
|
||||
PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/GCC/*.h)
|
||||
# LD file
|
||||
LFLAGS = -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/openblt/STM32H7xx.ld"
|
||||
# Port specific options
|
||||
PORTFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16
|
||||
PORTFLAGS += -DSTM32H7XX
|
||||
endif
|
||||
|
||||
OPTFLAGS = -Os
|
||||
STDFLAGS = -fno-strict-aliasing
|
||||
STDFLAGS += -fdata-sections -ffunction-sections -Wall -g3
|
||||
CFLAGS = $(PORTFLAGS) $(BRDFLAGS) $(STDFLAGS) $(OPTFLAGS)
|
||||
CFLAGS += -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER
|
||||
CFLAGS += $(INC_PATH)
|
||||
AFLAGS = $(CFLAGS)
|
||||
LFLAGS += $(PORTFLAGS) $(BRDFLAGS) $(STDFLAGS) $(OPTFLAGS)
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Common options for toolchain binaries |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
LFLAGS += -Wl,-Map=$(BIN_PATH)/$(PROJ_NAME).map
|
||||
LFLAGS += -specs=nano.specs -Wl,--gc-sections $(LIB_PATH)
|
||||
OFLAGS = -O srec
|
||||
ODFLAGS = -x
|
||||
SZFLAGS = -B -d
|
||||
RMFLAGS = -f
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Toolchain binaries |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
RM = rm
|
||||
CC = $(TOOL_PATH)arm-none-eabi-gcc
|
||||
LN = $(TOOL_PATH)arm-none-eabi-gcc
|
||||
OC = $(TOOL_PATH)arm-none-eabi-objcopy
|
||||
OD = $(TOOL_PATH)arm-none-eabi-objdump
|
||||
AS = $(TOOL_PATH)arm-none-eabi-gcc
|
||||
SZ = $(TOOL_PATH)arm-none-eabi-size
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Filter project files
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
PROJ_ASRCS = $(filter %.s,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||
PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||
PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Set important path variables |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :)
|
||||
OBJ_PATH = $(PROJECT_DIR)/build-openblt/obj-$(PROJECT_BOARD)/
|
||||
BIN_PATH = $(PROJECT_DIR)/build-openblt
|
||||
INC_PATH = $(patsubst %/,%,$(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file))))))
|
||||
LIB_PATH =
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Define targets |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
AOBJS := $(patsubst %.s,%.o,$(PROJ_ASRCS))
|
||||
AOBJS := $(addprefix $(OBJ_PATH),$(AOBJS))
|
||||
COBJS := $(patsubst %.c,%.o,$(PROJ_CSRCS))
|
||||
COBJS := $(addprefix $(OBJ_PATH),$(COBJS))
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Make ALL |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
.PHONY: all
|
||||
all: $(BIN_PATH)/$(PROJ_NAME).srec $(BIN_PATH)/$(PROJ_NAME).hex $(BIN_PATH)/$(PROJ_NAME).bin
|
||||
|
||||
$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf
|
||||
@mkdir -p $(@D)
|
||||
@$(OC) $< $(OFLAGS) $@
|
||||
@$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map
|
||||
@echo +++ Summary of memory consumption:
|
||||
@$(SZ) $(SZFLAGS) $<
|
||||
@echo +++ Build complete [$(notdir $@)]
|
||||
|
||||
$(BIN_PATH)/$(PROJ_NAME).hex : $(BIN_PATH)/$(PROJ_NAME).elf
|
||||
@mkdir -p $(@D)
|
||||
@$(OC) -O ihex $< $@
|
||||
|
||||
$(BIN_PATH)/$(PROJ_NAME).bin : $(BIN_PATH)/$(PROJ_NAME).elf
|
||||
@mkdir -p $(@D)
|
||||
@$(OC) -O binary $< $@
|
||||
|
||||
$(BIN_PATH)/$(PROJ_NAME).elf : $(OBJ_PATH) $(AOBJS) $(COBJS)
|
||||
@mkdir -p $(@D)
|
||||
@echo +++ Linking [$(notdir $@)]
|
||||
@echo $(patsubst %.o,$(OBJ_PATH)%.o,$(^F))
|
||||
@$(LN) $(LFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)%.o,$(^F)) $(LIBS)
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Compile and assemble |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
$(OBJ_PATH)%.o: %.s
|
||||
@echo +++ Assembling [$<] to [$@]
|
||||
@$(AS) $(AFLAGS) -c $< -o $@
|
||||
|
||||
$(OBJ_PATH)%.o: %.c
|
||||
@echo +++ Compiling [$<] to [$@]
|
||||
@$(CC) $(CFLAGS) -c $< -o $@
|
||||
|
||||
$(OBJ_PATH):
|
||||
@echo AOBJS = $(AOBJS)
|
||||
@echo COBJS = $(COBJS)
|
||||
@echo PROJ_CHDRS = $(PROJ_CHDRS)
|
||||
@echo INC_PATH = $(INC_PATH)
|
||||
@mkdir -p $(OBJ_PATH)
|
||||
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
#| Make CLEAN |
|
||||
#|--------------------------------------------------------------------------------------|
|
||||
.PHONY: clean
|
||||
clean:
|
||||
@echo +++ Cleaning build environment
|
||||
@$(RM) $(RMFLAGS) -r $(OBJ_PATH)
|
||||
@$(RM) $(RMFLAGS) -r $(BIN_PATH)
|
||||
@echo +++ Clean complete
|
||||
|
|
@ -29,13 +29,19 @@ RAM3_SIZE = DEFINED(STM32F4_HAS_SRAM3) ? 64k : 0;
|
|||
/* Only STM32F429I-Discovery has external SDRAM */
|
||||
SDRAM_SIZE = DEFINED(STM32_HAS_SDRAM) ? 8M : 0;
|
||||
|
||||
/* change address & length if bootloader */
|
||||
bootloader_size = 32k;
|
||||
flash_start = 0x08000000 + (DEFINED(HAS_BOOTLOADER) ? bootloader_size : 0);
|
||||
flash_size = DEFINED(IS_BOOTLOADER) ? bootloader_size : 768k;
|
||||
image_size = DEFINED(HAS_BOOTLOADER) ? (flash_size - bootloader_size) : flash_size;
|
||||
|
||||
/* OpenBLT <-> main FW shared area */
|
||||
_OpenBLT_Shared_Params_Size = DEFINED(BOOTLOADER) ? 16 : 0;
|
||||
_OpenBLT_Shared_Params_Size = DEFINED(HAS_BOOTLOADER) || DEFINED(IS_BOOTLOADER) ? 16 : 0;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
bl : org = 0x08000000, len = 16k /* bootloader section */
|
||||
flash0 : org = DEFINED(BOOTLOADER) ? 0x08008000 : 0x08000000, len = DEFINED(BOOTLOADER) ? 736k : 768k /* change address & length if bootloader */
|
||||
bl : org = 0x08000000, len = bootloader_size /* bootloader section */
|
||||
flash0 : org = flash_start, len = image_size
|
||||
flash1 : org = 0x00000000, len = 0
|
||||
flash2 : org = 0x00000000, len = 0
|
||||
flash3 : org = 0x00000000, len = 0
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
/*
|
||||
* STM32F7 memory setup.
|
||||
*
|
||||
*
|
||||
* RAM0 - Data, Heap.
|
||||
* RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH.
|
||||
*
|
||||
|
|
@ -25,19 +25,20 @@
|
|||
* 'bl' is related to rusefi bootloader
|
||||
*/
|
||||
|
||||
/* TODO: 512k flash limit is a mitigation for https://github.com/rusefi/rusefi/issues/3566 and https://github.com/rusefi/rusefi/issues/3775 */
|
||||
flash_size = DEFINED(FLASH_SIZE) ? FLASH_SIZE : 512k;
|
||||
/* change address & length if bootloader */
|
||||
bootloader_size = 32k;
|
||||
flash_start = 0x08000000 + (DEFINED(HAS_BOOTLOADER) ? bootloader_size : 0);
|
||||
flash_size = DEFINED(IS_BOOTLOADER) ? bootloader_size : 768k;
|
||||
image_size = DEFINED(HAS_BOOTLOADER) ? (flash_size - bootloader_size) : flash_size;
|
||||
|
||||
/* OpenBLT <-> main FW shared area */
|
||||
_OpenBLT_Shared_Params_Size = DEFINED(BOOTLOADER) ? 16 : 0;
|
||||
_OpenBLT_Shared_Params_Size = DEFINED(HAS_BOOTLOADER) || DEFINED(IS_BOOTLOADER) ? 16 : 0;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
bl : org = 0x08000000, len = 16k /* bootloader section */
|
||||
/* change address & length if bootloader */
|
||||
flash0 (rx) : org = DEFINED(BOOTLOADER) ? 0x08008000 : 0x08000000, len = DEFINED(BOOTLOADER) ? (flash_size - 32k) : flash_size
|
||||
/* TODO: should we use same flash_size for flash@ITCM? */
|
||||
flash1 (rx) : org = DEFINED(BOOTLOADER) ? 0x00208000 : 0x00200000, len = DEFINED(BOOTLOADER) ? (2m - 32k) : 2m /* Flash as ITCM */
|
||||
bl : org = 0x08000000, len = bootloader_size /* bootloader section */
|
||||
flash0 (rx) : org = flash_start, len = image_size
|
||||
flash1 (rx) : org = flash_start - 0x07e00000, len = image_size /* Flash as ITCM */
|
||||
flash2 (rx) : org = 0x00000000, len = 0
|
||||
flash3 (rx) : org = 0x00000000, len = 0
|
||||
flash4 (rx) : org = 0x00000000, len = 0
|
||||
|
|
|
|||
|
|
@ -14,9 +14,18 @@
|
|||
limitations under the License.
|
||||
*/
|
||||
|
||||
/* change address & length if bootloader */
|
||||
bootloader_size = 32k;
|
||||
flash_start = 0x08000000 + (DEFINED(HAS_BOOTLOADER) ? bootloader_size : 0);
|
||||
flash_size = DEFINED(IS_BOOTLOADER) ? bootloader_size : 1M;
|
||||
image_size = DEFINED(HAS_BOOTLOADER) ? (flash_size - bootloader_size) : flash_size;
|
||||
|
||||
/* OpenBLT <-> main FW shared area */
|
||||
_OpenBLT_Shared_Params_Size = DEFINED(HAS_BOOTLOADER) || DEFINED(IS_BOOTLOADER) ? 16 : 0;
|
||||
|
||||
/*
|
||||
* STM32H743xI generic setup.
|
||||
*
|
||||
*
|
||||
* AXI SRAM - BSS, Data, Heap.
|
||||
* SRAM1+SRAM2 - None.
|
||||
* SRAM3 - NOCACHE, ETH.
|
||||
|
|
@ -27,15 +36,17 @@
|
|||
*/
|
||||
MEMORY
|
||||
{
|
||||
flash0 (rx) : org = 0x08000000, len = 2M /* Flash bank1+bank2 */
|
||||
flash1 (rx) : org = 0x08000000, len = 1M /* Flash bank 1 */
|
||||
flash2 (rx) : org = 0x08100000, len = 1M /* Flash bank 2 */
|
||||
bl : org = 0x08000000, len = bootloader_size
|
||||
flash0 (rx) : org = flash_start, len = flash_size /* Flash bank1+bank2 */
|
||||
flash1 (rx) : org = flash_start, len = flash_size /* Flash bank 1 (code) */
|
||||
flash2 (rx) : org = 0x08100000, len = 1M /* Flash bank 2 (engine config) */
|
||||
flash3 (rx) : org = 0x00000000, len = 0
|
||||
flash4 (rx) : org = 0x00000000, len = 0
|
||||
flash5 (rx) : org = 0x00000000, len = 0
|
||||
flash6 (rx) : org = 0x00000000, len = 0
|
||||
flash7 (rx) : org = 0x00000000, len = 0
|
||||
ram0 (wx) : org = 0x24000000, len = 512k /* AXI SRAM */
|
||||
shared : org = 0x24000000, len = _OpenBLT_Shared_Params_Size
|
||||
ram0 (wx) : org = 0x24000000 + _OpenBLT_Shared_Params_Size, len = 512k - _OpenBLT_Shared_Params_Size /* AXI SRAM */
|
||||
ram1 (wx) : org = 0x30000000, len = 256k /* AHB SRAM1+SRAM2 */
|
||||
ram2 (wx) : org = 0x30000000, len = 288k /* AHB SRAM1+SRAM2+SRAM3 */
|
||||
ram3 (wx) : org = 0x30040000, len = 32k /* AHB SRAM3 */
|
||||
|
|
|
|||
Loading…
Reference in New Issue