mirror of https://github.com/rusefi/rusefi.git
update to fresh openocd 0.10.0
This commit is contained in:
rusefi
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@ -1,16 +1,2 @@
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#
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# STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer
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#
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interface hla
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hla_layout stlink
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hla_device_desc "ST-LINK/V2-1"
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hla_vid_pid 0x0483 0x374b
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# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
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# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
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# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
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# number reset issues.
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# eg.
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#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
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echo "WARNING: interface/stlink-v2-1.cfg is deprecated, please switch to interface/stlink.cfg"
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source [find openocd/stlink.cfg]
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@ -1,16 +1,2 @@
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#
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# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
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#
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interface hla
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hla_layout stlink
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hla_device_desc "ST-LINK/V2"
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hla_vid_pid 0x0483 0x3748
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# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
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# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
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# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
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# number reset issues.
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# eg.
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#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
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echo "WARNING: interface/stlink-v2.cfg is deprecated, please switch to interface/stlink.cfg"
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source [find openocd/stlink.cfg]
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@ -0,0 +1,17 @@
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#
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# STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1 in-circuit
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# debugger/programmer
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#
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interface hla
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hla_layout stlink
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hla_device_desc "ST-LINK"
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hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b
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# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
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# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
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# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
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# number reset issues.
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# eg.
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#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
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@ -3,7 +3,7 @@
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# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
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#
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source [find openocd/stlink-v2-1.cfg]
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source [find openocd/stlink.cfg]
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transport select hla_swd
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@ -1,10 +1,13 @@
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# This is an STM32F4 discovery board with a single STM32F407VGT6 chip.
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# http://www.st.com/internet/evalboard/product/252419.jsp
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source [find openocd/stlink-v2.cfg]
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source [find openocd/stlink.cfg]
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transport select hla_swd
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# increase working area to 64KB
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set WORKAREASIZE 0x10000
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source [find openocd/stm32f4x.cfg]
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reset_config srst_only
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@ -36,44 +36,14 @@ if { [info exists CPUTAPID] } {
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID] } {
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set _BSTAPID $BSTAPID
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} else {
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# See STM Document RM0090
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# Section 38.6.2
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# STM32F405xx/07xx and STM32F415xx/17xx
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set _BSTAPID1 0x06413041
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# STM32F42xxx and STM32F43xxx
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set _BSTAPID2 0x06419041
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# See STM Document RM0368 (Rev. 3)
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# STM32F401B/C
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set _BSTAPID3 0x06423041
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# STM32F401D/E
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set _BSTAPID4 0x06433041
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# See STM Document RM0383 (Rev 2)
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# STM32F411
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set _BSTAPID5 0x06431041
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# See STM Document RM0386
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# STM32F469
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set _BSTAPID6 0x06434041
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# See STM Document RM0401
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# STM32F410
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set _BSTAPID7 0x06458041
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# STM32F412
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set _BSTAPID8 0x06441041
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}
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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if {[using_jtag]} {
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swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
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-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
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-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
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-expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
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-expected-id $_BSTAPID8
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jtag newtap $_CHIPNAME bs -irlen 5
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# Helper for common memory read/modify/write procedures
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# mrw: "memory read word", returns value of $reg
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proc mrw {reg} {
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set value ""
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mem2array value 32 $reg 1
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return $value(0)
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}
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add_usage_text mrw "address"
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add_help_text mrw "Returns value of word in memory."
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proc mrb {reg} {
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set value ""
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mem2array value 8 $reg 1
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return $value(0)
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}
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add_usage_text mrb "address"
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add_help_text mrb "Returns value of byte in memory."
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# mmw: "memory modify word", updates value of $reg
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# $reg <== ((value & ~$clearbits) | $setbits)
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proc mmw {reg setbits clearbits} {
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set old [mrw $reg]
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set new [expr ($old & ~$clearbits) | $setbits]
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mww $reg $new
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}
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add_usage_text mmw "address setbits clearbits"
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add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;"
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#
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# STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer
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#
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interface hla
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hla_layout stlink
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hla_device_desc "ST-LINK/V2-1"
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hla_vid_pid 0x0483 0x374b
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# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
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# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
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# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
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# number reset issues.
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# eg.
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#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
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#
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# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
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#
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interface hla
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hla_layout stlink
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hla_device_desc "ST-LINK/V2"
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hla_vid_pid 0x0483 0x3748
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# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
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# devices seem to have serial numbers with unreadable characters. ST-LINK/V2
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# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
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# number reset issues.
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# eg.
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#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
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#
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# This is an STM32F429 discovery board with a single STM32F429ZI chip.
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# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
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#
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source [find openocd/stlink-v2-1.cfg]
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transport select hla_swd
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source [find openocd/stm32f4x.cfg]
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reset_config srst_only
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@ -0,0 +1,10 @@
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# This is an STM32F4 discovery board with a single STM32F407VGT6 chip.
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# http://www.st.com/internet/evalboard/product/252419.jsp
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source [find openocd/stlink-v2.cfg]
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transport select hla_swd
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source [find openocd/stm32f4x.cfg]
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reset_config srst_only
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# script for stm32f4x family
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#
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# stm32 devices support both JTAG and SWD transports.
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#
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source [find openocd/swj-dp.tcl]
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source [find openocd/mem_helper.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32f4x
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}
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set _ENDIAN little
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# Work-area is a space in RAM used for flash programming
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# By default use 32kB (Available RAM in smallest device STM32F410)
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x8000
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}
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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if { [using_jtag] } {
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# See STM Document RM0090
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# Section 38.6.3 - corresponds to Cortex-M4 r0p1
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set _CPUTAPID 0x4ba00477
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} {
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set _CPUTAPID 0x2ba01477
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}
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID] } {
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set _BSTAPID $BSTAPID
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} else {
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# See STM Document RM0090
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# Section 38.6.2
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# STM32F405xx/07xx and STM32F415xx/17xx
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set _BSTAPID1 0x06413041
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# STM32F42xxx and STM32F43xxx
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set _BSTAPID2 0x06419041
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# See STM Document RM0368 (Rev. 3)
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# STM32F401B/C
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set _BSTAPID3 0x06423041
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# STM32F401D/E
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set _BSTAPID4 0x06433041
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# See STM Document RM0383 (Rev 2)
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# STM32F411
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set _BSTAPID5 0x06431041
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# See STM Document RM0386
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# STM32F469
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set _BSTAPID6 0x06434041
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# See STM Document RM0401
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# STM32F410
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set _BSTAPID7 0x06458041
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# STM32F412
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set _BSTAPID8 0x06441041
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}
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if {[using_jtag]} {
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swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
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-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
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-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
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-expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
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-expected-id $_BSTAPID8
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
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#
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# Since we may be running of an RC oscilator, we crank down the speed a
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# bit more to be on the safe side. Perhaps superstition, but if are
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# running off a crystal, we can run closer to the limit. Note
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# that there can be a pretty wide band where things are more or less stable.
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adapter_khz 2000
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adapter_nsrst_delay 100
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if {[using_jtag]} {
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jtag_ntrst_delay 100
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}
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reset_config srst_nogate
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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$_TARGETNAME configure -event examine-end {
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# Enable debug during low power modes (uses more power)
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# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
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mmw 0xE0042004 0x00000007 0
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# Stop watchdog counters during halt
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# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
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mmw 0xE0042008 0x00001800 0
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}
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$_TARGETNAME configure -event trace-config {
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# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
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# change this value accordingly to configure trace pins
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# assignment
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mmw 0xE0042004 0x00000020 0
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}
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$_TARGETNAME configure -event reset-init {
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# Configure PLL to boost clock to HSI x 4 (64 MHz)
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mww 0x40023804 0x08012008 ;# RCC_PLLCFGR 16 Mhz /8 (M) * 128 (N) /4(P)
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mww 0x40023C00 0x00000102 ;# FLASH_ACR = PRFTBE | 2(Latency)
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mmw 0x40023800 0x01000000 0 ;# RCC_CR |= PLLON
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sleep 10 ;# Wait for PLL to lock
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mmw 0x40023808 0x00001000 0 ;# RCC_CFGR |= RCC_CFGR_PPRE1_DIV2
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mmw 0x40023808 0x00000002 0 ;# RCC_CFGR |= RCC_CFGR_SW_PLL
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# Boost JTAG frequency
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adapter_khz 8000
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}
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$_TARGETNAME configure -event reset-start {
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# Reduce speed since CPU speed will slow down to 16MHz with the reset
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adapter_khz 2000
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}
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@ -0,0 +1,34 @@
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# ARM Debug Interface V5 (ADI_V5) utility
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# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
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# SW-DP and JTAG-DP targets don't need to switch based
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# on which transport is active.
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#
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# declare a JTAG or SWD Debug Access Point (DAP)
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# based on the transport in use with this session.
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# You can't access JTAG ops when SWD is active, etc.
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# params are currently what "jtag newtap" uses
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# because OpenOCD internals are still strongly biased
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# to JTAG .... but for SWD, "irlen" etc are ignored,
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# and the internals work differently
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# for now, ignore non-JTAG and non-SWD transports
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# (e.g. initial flash programming via SPI or UART)
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# split out "chip" and "tag" so we can someday handle
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# them more uniformly irlen too...)
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if [catch {transport select}] {
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echo "Error: unable to select a session transport. Can't continue."
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shutdown
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}
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proc swj_newdap {chip tag args} {
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if [using_hla] {
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eval hla newtap $chip $tag $args
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} elseif [using_jtag] {
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eval jtag newtap $chip $tag $args
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} elseif [using_swd] {
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eval swd newdap $chip $tag $args
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}
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}
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