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HW_LAYER_EMS* renamed to HW_LAYER_PORT* (#5387) 

* HW_LAYER_EMS_CPP renamed to HW_LAYER_PORT_CPP

* HW_LAYER_EMS renamed to HW_LAYER_PORT

---------

Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
This commit is contained in:
rusefillc 2023-07-04 22:30:20 -04:00 committed by GitHub
parent b3df3b44f8
commit 9e838f1d12
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 16 additions and 16 deletions
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2
firmware/Makefile
View File

@ -238,7 +238,7 @@ CSRC = check.c \
$(DEV_SRC) \
$(BOOTLOADERSRC) \
${HW_MASS_STORAGE_SRC_C} \
$(HW_LAYER_EMS) \
$(HW_LAYER_PORT) \
$(HW_LAYER_DRIVERS_CORE) \
$(HW_LAYER_DRIVERS) \
$(RUSEFI_LIB_C) \

4
firmware/bootloader/src/Makefile
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@ -174,7 +174,7 @@ include $(PROJECT_DIR)/hw_layer/drivers/drivers.mk
CSRC = $(ALLCSRC) \
$(BOARDSRC) \
$(DEV_SRC) \
$(HW_LAYER_EMS) \
$(HW_LAYER_PORT) \
$(HW_LAYER_DRIVERS_CORE) \
$(FATFSSRC) \
@ -182,7 +182,7 @@ CSRC = $(ALLCSRC) \
# todo: reduce code duplication with primary Makefile!!!
# setting.
CPPSRC = $(ALLCPPSRC) \
$(HW_LAYER_EMS_CPP) \
$(HW_LAYER_PORT_CPP) \
$(BOARDCPPSRC) \
$(HW_SENSORS_SRC) \
$(TUNERSTUDIO_SRC_CPP) \

2
firmware/common.mk
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@ -19,7 +19,7 @@ ALLCPPSRC += \
$(CONTROLLERS_ALGO_SRC_CPP) \
$(CONTROLLERS_SENSORS_SRC_CPP) \
$(TUNERSTUDIO_SRC_CPP) \
$(HW_LAYER_EMS_CPP) \
$(HW_LAYER_PORT_CPP) \
$(HW_SENSORS_CPP) \
$(SYSTEMSRC_CPP) \
$(UTILSRC_CPP) \

4
firmware/hw_layer/hw_layer.mk
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@ -7,7 +7,7 @@ HW_LAYER_INC= $(PROJECT_DIR)/hw_layer $(PROJECT_DIR)/hw_layer/adc \
HW_INC = hw_layer/$(CPU_HWLAYER) \
$(PROJECT_DIR)/hw_layer/ports
HW_LAYER_EMS_CPP = \
HW_LAYER_PORT_CPP = \
$(PROJECT_DIR)/hw_layer/pin_repository.cpp \
$(PROJECT_DIR)/hw_layer/microsecond_timer/microsecond_timer.cpp \
$(PROJECT_DIR)/hw_layer/digital_input/digital_input_exti.cpp \
@ -32,7 +32,7 @@ HW_LAYER_EMS_CPP = \
$(PROJECT_DIR)/hw_layer/adc/mcp3208.cpp
ifeq ($(USE_OPENBLT),yes)
HW_LAYER_EMS += \
HW_LAYER_PORT += \
$(PROJECT_DIR)/hw_layer/openblt/shared_params.c
endif

2
firmware/hw_layer/ports/cypress/hw_ports.mk
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@ -2,7 +2,7 @@ ifeq ($(CYPRESS_CONTRIB),)
CYPRESS_CONTRIB = $(CHIBIOS_CONTRIB)
endif
HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/cypress/mpu_util.cpp \
HW_LAYER_PORT_CPP += $(PROJECT_DIR)/hw_layer/ports/cypress/mpu_util.cpp \
$(PROJECT_DIR)/hw_layer/ports/cypress/cypress_pins.cpp \
$(PROJECT_DIR)/hw_layer/ports/cypress/cypress_common.cpp \
$(PROJECT_DIR)/hw_layer/ports/cypress/backup_ram.cpp \

4
firmware/hw_layer/ports/kinetis/hw_ports.mk
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@ -2,10 +2,10 @@ ifeq ($(KINETIS_CONTRIB),)
KINETIS_CONTRIB = $(CHIBIOS_CONTRIB)
endif
HW_LAYER_EMS += $(KINETIS_CONTRIB)/os/hal/ports/KINETIS/KE1xF/fsl/fsl_ftfx_flexnvm.c \
HW_LAYER_PORT += $(KINETIS_CONTRIB)/os/hal/ports/KINETIS/KE1xF/fsl/fsl_ftfx_flexnvm.c \
$(KINETIS_CONTRIB)/os/hal/ports/KINETIS/KE1xF/fsl/fsl_ftfx_controller.c
HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/kinetis/mpu_util.cpp \
HW_LAYER_PORT_CPP += $(PROJECT_DIR)/hw_layer/ports/kinetis/mpu_util.cpp \
$(PROJECT_DIR)/hw_layer/ports/kinetis/kinetis_pins.cpp \
$(PROJECT_DIR)/hw_layer/ports/kinetis/backup_ram.cpp \
$(PROJECT_DIR)/hw_layer/ports/kinetis/kinetis_common.cpp \

2
firmware/hw_layer/ports/stm32/stm32_common.mk
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@ -1,6 +1,6 @@
HW_STM32_PORT_DIR = $(PROJECT_DIR)/hw_layer/ports/stm32
HW_LAYER_EMS_CPP += \
HW_LAYER_PORT_CPP += \
$(HW_STM32_PORT_DIR)/serial_over_usb/usbconsole.cpp \
$(HW_STM32_PORT_DIR)/stm32_pins.cpp \
$(HW_STM32_PORT_DIR)/stm32_common.cpp \

4
firmware/hw_layer/ports/stm32/stm32f4/hw_ports.mk
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@ -1,9 +1,9 @@
include $(PROJECT_DIR)/hw_layer/ports/stm32/stm32_common.mk
HW_LAYER_EMS += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/stm32f4xx_hal_flash.c \
HW_LAYER_PORT += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/stm32f4xx_hal_flash.c \
$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/stm32f4xx_hal_flash_ex.c
HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/mpu_util.cpp \
HW_LAYER_PORT_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/mpu_util.cpp \
$(PROJECT_DIR)/hw_layer/ports/stm32/stm32_adc_v2.cpp
MCU = cortex-m4

4
firmware/hw_layer/ports/stm32/stm32f7/hw_ports.mk
View File

@ -1,9 +1,9 @@
include $(PROJECT_DIR)/hw_layer/ports/stm32/stm32_common.mk
HW_LAYER_EMS += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/stm32f7xx_hal_flash.c \
HW_LAYER_PORT += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/stm32f7xx_hal_flash.c \
$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/stm32f7xx_hal_flash_ex.c
HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/mpu_util.cpp \
HW_LAYER_PORT_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/mpu_util.cpp \
$(PROJECT_DIR)/hw_layer/ports/stm32/stm32_adc_v2.cpp \
# This MCU has a cache, align functions to a cache line for maximum cache efficiency

4
firmware/hw_layer/ports/stm32/stm32h7/hw_ports.mk
View File

@ -1,9 +1,9 @@
include $(PROJECT_DIR)/hw_layer/ports/stm32/stm32_common.mk
HW_LAYER_EMS += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/stm32h7xx_hal_flash.c \
HW_LAYER_PORT += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/stm32h7xx_hal_flash.c \
$(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/stm32h7xx_hal_flash_ex.c
HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/mpu_util.cpp \
HW_LAYER_PORT_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/mpu_util.cpp \
$(PROJECT_DIR)/hw_layer/ports/stm32/stm32_adc_v4.cpp \
# This MCU has a cache, align functions to a cache line for maximum cache efficiency