auto-sync

This commit is contained in:
rusEfi 2016-12-27 10:03:05 -05:00
parent a8d8260260
commit dbda7ec7e9
14 changed files with 11923 additions and 0 deletions

View File

@ -0,0 +1,451 @@
(kicad_pcb (version 4) (host pcbnew 4.0.1-stable)
(general
(links 10)
(no_connects 10)
(area 131.178096 116.111799 185.559701 153.765001)
(thickness 1.6)
(drawings 25)
(tracks 0)
(zones 0)
(modules 4)
(nets 7)
)
(page A portrait)
(title_block
(date 2016-12-26)
(rev R0.2)
(company "rusEFI by Art_Electro")
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
)
(setup
(last_trace_width 0.254)
(trace_clearance 0.2032)
(zone_clearance 0.254)
(zone_45_only no)
(trace_min 0.254)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1 1)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.3 1.9)
(pad_drill 0)
(pad_to_mask_clearance 0.0762)
(aux_axis_origin 0 0)
(visible_elements 7FFFF77F)
(pcbplotparams
(layerselection 0x010f0_80000001)
(usegerberextensions true)
(excludeedgelayer true)
(linewidth 0.150000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory gerber/))
)
(net 0 "")
(net 1 GND)
(net 2 /SPI_MISO)
(net 3 /SPI_MOSI)
(net 4 /3.3V)
(net 5 /CS_SD_MODULE)
(net 6 /SPI_SCK)
(net_class Default "Это класс цепей по умолчанию."
(clearance 0.2032)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net /3.3V)
(add_net /CS_SD_MODULE)
(add_net /SPI_MISO)
(add_net /SPI_MOSI)
(add_net /SPI_SCK)
(add_net GND)
)
(module Pin_Headers:Pin_Header_Angled_1x03 (layer F.Cu) (tedit 58624C0D) (tstamp 586248A1)
(at 177.165 148.59 180)
(descr "Through hole pin header")
(tags "pin header")
(path /58619400)
(fp_text reference P6 (at 2.794 2.54 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_01X03 (at 0 -3.1 180) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.5 -1.75) (end -1.5 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.65 -1.75) (end 10.65 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 -1.75) (end 10.65 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 6.85) (end 10.65 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -1.55) (end -1.3 0) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.3 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 4.191 -0.127) (end 10.033 -0.127) (layer F.SilkS) (width 0.15))
(fp_line (start 10.033 -0.127) (end 10.033 0.127) (layer F.SilkS) (width 0.15))
(fp_line (start 10.033 0.127) (end 4.191 0.127) (layer F.SilkS) (width 0.15))
(fp_line (start 4.191 0.127) (end 4.191 0) (layer F.SilkS) (width 0.15))
(fp_line (start 4.191 0) (end 10.033 0) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 -0.254) (end 1.143 -0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 0.254) (end 1.143 0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 2.286) (end 1.143 2.286) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 2.794) (end 1.143 2.794) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 4.826) (end 1.143 4.826) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 5.334) (end 1.143 5.334) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 1.27) (end 4.064 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 0.254) (end 4.064 0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 -0.254) (end 10.16 0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 -0.254) (end 10.16 -0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 -1.27) (end 1.524 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 -1.27) (end 4.064 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 3.81) (end 4.064 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 3.81) (end 1.524 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 4.826) (end 10.16 4.826) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 4.826) (end 10.16 5.334) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 5.334) (end 4.064 5.334) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 6.35) (end 4.064 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 3.81) (end 4.064 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 2.794) (end 4.064 2.794) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 2.286) (end 10.16 2.794) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 2.286) (end 10.16 2.286) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 3.81) (end 4.064 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 1.27) (end 1.524 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 6.35) (end 4.064 6.35) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 2 thru_hole oval (at 0 2.54 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 5 /CS_SD_MODULE))
(pad 3 thru_hole oval (at 0 5.08 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 6 /SPI_SCK))
(model Pin_Headers.3dshapes/Pin_Header_Angled_1x03.wrl
(at (xyz 0 -0.1 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Angled_1x03 (layer F.Cu) (tedit 58624C07) (tstamp 58624874)
(at 177.165 123.19 180)
(descr "Through hole pin header")
(tags "pin header")
(path /58618F13)
(fp_text reference P5 (at 2.794 2.54 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_01X03 (at 0 -3.1 180) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.5 -1.75) (end -1.5 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.65 -1.75) (end 10.65 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 -1.75) (end 10.65 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 6.85) (end 10.65 6.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -1.55) (end -1.3 0) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.3 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 4.191 -0.127) (end 10.033 -0.127) (layer F.SilkS) (width 0.15))
(fp_line (start 10.033 -0.127) (end 10.033 0.127) (layer F.SilkS) (width 0.15))
(fp_line (start 10.033 0.127) (end 4.191 0.127) (layer F.SilkS) (width 0.15))
(fp_line (start 4.191 0.127) (end 4.191 0) (layer F.SilkS) (width 0.15))
(fp_line (start 4.191 0) (end 10.033 0) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 -0.254) (end 1.143 -0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 0.254) (end 1.143 0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 2.286) (end 1.143 2.286) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 2.794) (end 1.143 2.794) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 4.826) (end 1.143 4.826) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 5.334) (end 1.143 5.334) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 1.27) (end 4.064 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 0.254) (end 4.064 0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 -0.254) (end 10.16 0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 -0.254) (end 10.16 -0.254) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 -1.27) (end 1.524 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 -1.27) (end 4.064 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 3.81) (end 4.064 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 3.81) (end 1.524 6.35) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 4.826) (end 10.16 4.826) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 4.826) (end 10.16 5.334) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 5.334) (end 4.064 5.334) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 6.35) (end 4.064 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 3.81) (end 4.064 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 2.794) (end 4.064 2.794) (layer F.SilkS) (width 0.15))
(fp_line (start 10.16 2.286) (end 10.16 2.794) (layer F.SilkS) (width 0.15))
(fp_line (start 4.064 2.286) (end 10.16 2.286) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 3.81) (end 4.064 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 1.27) (end 1.524 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 1.27) (end 4.064 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.524 6.35) (end 4.064 6.35) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 /SPI_MISO))
(pad 2 thru_hole oval (at 0 2.54 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 3 /SPI_MOSI))
(pad 3 thru_hole oval (at 0 5.08 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 4 /3.3V))
(model Pin_Headers.3dshapes/Pin_Header_Angled_1x03.wrl
(at (xyz 0 -0.1 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module LOGO_F (layer F.Cu) (tedit 0) (tstamp 52FE3846)
(at 175.895 135.255 180)
(path /52FE356F)
(fp_text reference G1 (at 0 4.14782 180) (layer F.SilkS) hide
(effects (font (thickness 0.3048)))
)
(fp_text value LOGO (at 0 -4.14782 180) (layer F.SilkS) hide
(effects (font (thickness 0.3048)))
)
(fp_poly (pts (xy 3.34518 0.04318) (xy 3.3401 -0.381) (xy 3.32486 -0.68326) (xy 3.28676 -0.90932)
(xy 3.22326 -1.1049) (xy 3.12166 -1.3208) (xy 3.10896 -1.3462) (xy 2.921 -1.64084)
(xy 2.921 -1.18618) (xy 2.79654 -1.1049) (xy 2.75844 -1.09982) (xy 2.68732 -1.016)
(xy 2.60096 -0.76708) (xy 2.5019 -0.35052) (xy 2.46126 -0.14732) (xy 2.38252 0.24638)
(xy 2.31394 0.58928) (xy 2.2606 0.84074) (xy 2.23266 0.9525) (xy 2.2479 1.07696)
(xy 2.32156 1.09982) (xy 2.4384 1.16586) (xy 2.45618 1.22682) (xy 2.42824 1.28524)
(xy 2.33172 1.3208) (xy 2.13868 1.34366) (xy 1.82372 1.35382) (xy 1.49606 1.35382)
(xy 0.53594 1.35382) (xy 0.57404 1.09982) (xy 0.63246 0.92202) (xy 0.7239 0.84836)
(xy 0.72644 0.84582) (xy 0.80264 0.90678) (xy 0.79248 0.97536) (xy 0.79248 1.04648)
(xy 0.889 1.08458) (xy 1.10744 1.09982) (xy 1.24714 1.09982) (xy 1.75006 1.09982)
(xy 1.83388 0.635) (xy 1.9177 0.17018) (xy 1.59258 0.17018) (xy 1.38684 0.1905)
(xy 1.27508 0.23876) (xy 1.27 0.254) (xy 1.20142 0.3302) (xy 1.15316 0.33782)
(xy 1.0795 0.2921) (xy 1.08204 0.127) (xy 1.0922 0.07112) (xy 1.1557 -0.1016)
(xy 1.24206 -0.22352) (xy 1.3208 -0.25908) (xy 1.35382 -0.1778) (xy 1.35382 -0.17526)
(xy 1.43002 -0.11684) (xy 1.61544 -0.08636) (xy 1.68656 -0.08382) (xy 2.0193 -0.08382)
(xy 2.07772 -0.55372) (xy 2.10312 -0.81788) (xy 2.10312 -1.01092) (xy 2.09042 -1.06934)
(xy 1.9685 -1.09982) (xy 1.76022 -1.08458) (xy 1.52146 -1.03886) (xy 1.31318 -0.97536)
(xy 1.1938 -0.90424) (xy 1.18618 -0.88138) (xy 1.1176 -0.7747) (xy 1.05918 -0.762)
(xy 0.95758 -0.8382) (xy 0.93218 -1.016) (xy 0.93218 -1.27) (xy 1.95072 -1.27)
(xy 2.42062 -1.26238) (xy 2.74066 -1.2446) (xy 2.90322 -1.21158) (xy 2.921 -1.18618)
(xy 2.921 -1.64084) (xy 2.67716 -2.02692) (xy 2.15646 -2.5654) (xy 1.5494 -2.9591)
(xy 1.02108 -3.16484) (xy 0.59182 -3.24866) (xy 0.59182 -1.18618) (xy 0.52324 -1.10998)
(xy 0.46482 -1.09982) (xy 0.35306 -1.08458) (xy 0.33782 -1.06934) (xy 0.32258 -0.98044)
(xy 0.2794 -0.75692) (xy 0.21336 -0.4318) (xy 0.13462 -0.04064) (xy 0.127 0)
(xy 0.03556 0.44958) (xy -0.02794 0.75692) (xy -0.06096 0.94996) (xy -0.06858 1.0541)
(xy -0.05334 1.09728) (xy -0.01524 1.1049) (xy 0.04318 1.09982) (xy 0.15494 1.1684)
(xy 0.17018 1.22682) (xy 0.14224 1.28524) (xy 0.04572 1.3208) (xy -0.14732 1.34366)
(xy -0.46228 1.35382) (xy -0.78994 1.35382) (xy -1.75006 1.35382) (xy -1.71196 1.09982)
(xy -1.65354 0.92202) (xy -1.5621 0.84836) (xy -1.55956 0.84582) (xy -1.48336 0.90678)
(xy -1.49352 0.97282) (xy -1.49098 1.04902) (xy -1.39446 1.08712) (xy -1.1684 1.09982)
(xy -1.07188 1.09982) (xy -0.80772 1.08966) (xy -0.61976 1.05918) (xy -0.56134 1.03378)
(xy -0.52578 0.9144) (xy -0.48514 0.69088) (xy -0.45974 0.52578) (xy -0.40132 0.08382)
(xy -0.69342 0.08382) (xy -0.91948 0.11176) (xy -1.07696 0.18034) (xy -1.08204 0.18542)
(xy -1.1938 0.254) (xy -1.2319 0.17018) (xy -1.21158 -0.02032) (xy -1.143 -0.17018)
(xy -1.04394 -0.254) (xy -0.95758 -0.24892) (xy -0.93218 -0.17018) (xy -0.86106 -0.10668)
(xy -0.69596 -0.08382) (xy -0.50546 -0.1016) (xy -0.35306 -0.15494) (xy -0.31242 -0.20066)
(xy -0.27432 -0.35052) (xy -0.2286 -0.59436) (xy -0.20828 -0.70866) (xy -0.18288 -0.94996)
(xy -0.20066 -1.0668) (xy -0.27686 -1.09982) (xy -0.28702 -1.09982) (xy -0.4064 -1.143)
(xy -0.42418 -1.18618) (xy -0.34544 -1.22936) (xy -0.14478 -1.25984) (xy 0.08382 -1.27)
(xy 0.3556 -1.2573) (xy 0.53848 -1.22428) (xy 0.59182 -1.18618) (xy 0.59182 -3.24866)
(xy 0.5715 -3.25374) (xy 0.0508 -3.2893) (xy -0.4699 -3.27152) (xy -0.91694 -3.2004)
(xy -0.99314 -3.17754) (xy -1.59004 -2.91338) (xy -2.15392 -2.52222) (xy -2.63652 -2.03708)
(xy -2.99974 -1.49606) (xy -3.03022 -1.43256) (xy -3.22326 -0.90932) (xy -3.3401 -0.32258)
(xy -3.3655 0.2413) (xy -3.3528 0.39624) (xy -3.29946 0.7366) (xy -3.23088 1.01092)
(xy -3.15722 1.18872) (xy -3.0861 1.23698) (xy -3.06578 1.21666) (xy -2.93624 1.10998)
(xy -2.88544 1.08712) (xy -2.80924 0.98298) (xy -2.7178 0.71374) (xy -2.6162 0.2921)
(xy -2.57302 0.08128) (xy -2.48158 -0.38354) (xy -2.42316 -0.70612) (xy -2.39268 -0.9144)
(xy -2.39014 -1.03124) (xy -2.41554 -1.08458) (xy -2.4638 -1.09982) (xy -2.49682 -1.09982)
(xy -2.61112 -1.14554) (xy -2.62382 -1.18618) (xy -2.54762 -1.22936) (xy -2.34696 -1.25984)
(xy -2.11582 -1.27) (xy -1.8288 -1.25476) (xy -1.651 -1.21412) (xy -1.60274 -1.15824)
(xy -1.7018 -1.09728) (xy -1.76276 -1.0795) (xy -1.8415 -1.02362) (xy -1.91008 -0.88646)
(xy -1.97866 -0.63754) (xy -2.05486 -0.25146) (xy -2.06248 -0.2032) (xy -2.13106 0.18288)
(xy -2.19456 0.52578) (xy -2.24282 0.78232) (xy -2.25806 0.86868) (xy -2.27076 1.0414)
(xy -2.19202 1.09982) (xy -2.1717 1.10236) (xy -2.07772 1.15316) (xy -2.08534 1.22936)
(xy -2.1717 1.30556) (xy -2.36728 1.3462) (xy -2.6416 1.35636) (xy -3.14706 1.35382)
(xy -2.95656 1.67132) (xy -2.5781 2.18186) (xy -2.09296 2.64668) (xy -1.55702 3.01244)
(xy -1.44018 3.0734) (xy -1.18618 3.19532) (xy -0.97536 3.27152) (xy -0.75692 3.31724)
(xy -0.48514 3.33756) (xy -0.10668 3.34264) (xy 0.04064 3.34264) (xy 0.46482 3.33756)
(xy 0.76962 3.32232) (xy 1.00076 3.28422) (xy 1.2065 3.21564) (xy 1.43764 3.1115)
(xy 1.47574 3.09372) (xy 2.00914 2.7559) (xy 2.50444 2.30378) (xy 2.91592 1.78816)
(xy 3.10134 1.46812) (xy 3.21056 1.2319) (xy 3.28168 1.02616) (xy 3.31978 0.8001)
(xy 3.3401 0.50546) (xy 3.34264 0.09398) (xy 3.34518 0.04318) (xy 3.34518 0.04318)) (layer F.SilkS) (width 0.00254))
)
(module MICRO-SDCARD-CONNECTOR-3300060P1 (layer B.Cu) (tedit 58624CA5) (tstamp 586245D2)
(at 177.8 133.35)
(descr MICRO-SDCARD-CONNECTOR-3300060P1)
(tags "MICRO SD MEMORY CARD MMC")
(path /58624F8A)
(attr smd)
(fp_text reference P352 (at 1.27 -4.445 270) (layer B.SilkS)
(effects (font (size 0.635 0.635) (thickness 0.1016)) (justify mirror))
)
(fp_text value MICRO-SDCARD-CONNECTOR-3300060P1 (at 0 0 270) (layer B.SilkS) hide
(effects (font (size 0.50038 0.50038) (thickness 0.1016)) (justify mirror))
)
(fp_line (start 7.493 4.953) (end 6.477 0.508) (layer B.SilkS) (width 0.127))
(fp_line (start 6.477 -7.493) (end 6.477 0.5591) (layer B.SilkS) (width 0.127))
(fp_line (start -7.493 -7.493) (end 6.477 -7.493) (layer B.SilkS) (width 0.127))
(fp_line (start 7.493 7.493) (end 7.493 4.9619) (layer B.SilkS) (width 0.127))
(fp_line (start -7.493 6.096) (end -6.35 6.096) (layer B.SilkS) (width 0.127))
(fp_line (start -6.35 6.096) (end -6.35 7.493) (layer B.SilkS) (width 0.127))
(fp_line (start -7.493 -7.493) (end -7.493 6.096) (layer B.SilkS) (width 0.127))
(fp_line (start -6.35 7.493) (end 7.493 7.493) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -7.493 2.114) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask))
(pad 2 smd rect (at -7.493 1.014) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask)
(net 5 /CS_SD_MODULE))
(pad 3 smd rect (at -7.493 -0.086) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask)
(net 3 /SPI_MOSI))
(pad 4 smd rect (at -7.493 -1.186) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask)
(net 4 /3.3V))
(pad 5 smd rect (at -7.493 -2.286) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask)
(net 6 /SPI_SCK))
(pad 6 smd rect (at -7.493 -3.386) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 7 smd rect (at -7.493 -4.486) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask)
(net 2 /SPI_MISO))
(pad 8 smd rect (at -7.493 -5.586) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask))
(pad 9 smd rect (at -7.493 -6.686) (size 1.524 0.762) (layers B.Cu B.Paste B.Mask))
(pad G1 smd rect (at -6.893 -8.032) (size 1.524 1.016) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad G2 smd rect (at 2.88 -7.686) (size 2.032 1.524) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad G3 smd rect (at 2.88 7.714) (size 2.032 1.524) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad G4 smd rect (at -7.101 6.895) (size 1.524 1.524) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad "" thru_hole circle (at 3.407 -4.886) (size 0.889 0.889) (drill 0.762) (layers *.Cu *.Mask B.SilkS))
(pad "" thru_hole circle (at 3.407 3.114) (size 0.889 0.889) (drill 0.762) (layers *.Cu *.Mask B.SilkS))
(model ../rusefi_lib/3d/9P-SMD-W-RING.wrl
(at (xyz -0.323 -0.33 -0.025))
(scale (xyz 10 10 10))
(rotate (xyz 0 0 0))
)
)
(dimension 2.413 (width 0.25) (layer Cmts.User)
(gr_text "0.0950 in" (at 189.992 130.556) (layer Cmts.User)
(effects (font (size 1 1) (thickness 0.25)))
)
(feature1 (pts (xy 182.88 133.858) (xy 182.88 128.556001)))
(feature2 (pts (xy 185.293 133.858) (xy 185.293 128.556001)))
(crossbar (pts (xy 185.293 130.556001) (xy 182.88 130.556001)))
(arrow1a (pts (xy 182.88 130.556001) (xy 184.006504 129.96958)))
(arrow1b (pts (xy 182.88 130.556001) (xy 184.006504 131.142422)))
(arrow2a (pts (xy 185.293 130.556001) (xy 184.166496 129.96958)))
(arrow2b (pts (xy 185.293 130.556001) (xy 184.166496 131.142422)))
)
(dimension 33.02 (width 0.25) (layer Cmts.User)
(gr_text "1.3000 in" (at 159.02 133.35 90) (layer Cmts.User)
(effects (font (size 1 1) (thickness 0.25)))
)
(feature1 (pts (xy 163.83 116.84) (xy 158.02 116.84)))
(feature2 (pts (xy 163.83 149.86) (xy 158.02 149.86)))
(crossbar (pts (xy 160.02 149.86) (xy 160.02 116.84)))
(arrow1a (pts (xy 160.02 116.84) (xy 160.606421 117.966504)))
(arrow1b (pts (xy 160.02 116.84) (xy 159.433579 117.966504)))
(arrow2a (pts (xy 160.02 149.86) (xy 160.606421 148.733496)))
(arrow2b (pts (xy 160.02 149.86) (xy 159.433579 148.733496)))
)
(gr_line (start 168.91 116.84) (end 169.545 116.84) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 168.91 149.86) (end 168.91 116.84) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 182.88 149.86) (end 168.91 149.86) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 182.88 116.84) (end 182.88 149.86) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 168.91 116.84) (end 182.88 116.84) (angle 90) (layer Eco2.User) (width 0.2))
(dimension 12.192 (width 0.25) (layer Cmts.User)
(gr_text "0.4800 in" (at 179.197 152.765) (layer Cmts.User)
(effects (font (size 1 1) (thickness 0.25)))
)
(feature1 (pts (xy 185.293 140.843) (xy 185.293 153.765)))
(feature2 (pts (xy 173.101 140.843) (xy 173.101 153.765)))
(crossbar (pts (xy 173.101 151.765) (xy 185.293 151.765)))
(arrow1a (pts (xy 185.293 151.765) (xy 184.166496 152.351421)))
(arrow1b (pts (xy 185.293 151.765) (xy 184.166496 151.178579)))
(arrow2a (pts (xy 173.101 151.765) (xy 174.227504 152.351421)))
(arrow2b (pts (xy 173.101 151.765) (xy 174.227504 151.178579)))
)
(gr_text "5.83 - 4.63 = 1.20\n5.85 - 4.65 = 1.20" (at 139.065 130.175) (layer Eco1.User)
(effects (font (size 1 1) (thickness 0.25)))
)
(gr_line (start 144.78 121.285) (end 147.066 122.682) (angle 90) (layer Eco1.User) (width 0.2))
(gr_line (start 147.066 120.142) (end 144.78 121.285) (angle 90) (layer Eco1.User) (width 0.2))
(gr_line (start 144.78 118.745) (end 147.066 120.142) (angle 90) (layer Eco1.User) (width 0.2))
(gr_line (start 147.066 117.602) (end 144.78 118.745) (angle 90) (layer Eco1.User) (width 0.2))
(gr_text VDD (at 179.705 118.11) (layer B.SilkS) (tstamp 52FE40E0)
(effects (font (size 0.762 0.762) (thickness 0.1524)) (justify mirror))
)
(gr_text SI (at 179.705 120.65) (layer B.SilkS) (tstamp 52FE40DF)
(effects (font (size 0.762 0.762) (thickness 0.1524)) (justify mirror))
)
(gr_text SO (at 179.705 123.19) (layer B.SilkS) (tstamp 52FE40DE)
(effects (font (size 0.762 0.762) (thickness 0.1524)) (justify mirror))
)
(gr_text CLK (at 179.705 143.51) (layer B.SilkS) (tstamp 52FE40D7)
(effects (font (size 0.762 0.762) (thickness 0.1524)) (justify mirror))
)
(gr_text CS (at 179.705 146.05) (layer B.SilkS) (tstamp 52FE40D6)
(effects (font (size 0.762 0.762) (thickness 0.1524)) (justify mirror))
)
(gr_text GND (at 179.705 148.59) (layer B.SilkS) (tstamp 52FE40D5)
(effects (font (size 0.762 0.762) (thickness 0.1524)) (justify mirror))
)
(gr_text GND (at 179.705 148.59) (layer F.SilkS)
(effects (font (size 0.762 0.762) (thickness 0.1524)))
)
(gr_text CS (at 179.705 146.05) (layer F.SilkS)
(effects (font (size 0.762 0.762) (thickness 0.1524)))
)
(gr_text CLK (at 179.705 143.51) (layer F.SilkS)
(effects (font (size 0.762 0.762) (thickness 0.1524)))
)
(gr_text SO (at 179.705 123.19) (layer F.SilkS)
(effects (font (size 0.762 0.762) (thickness 0.1524)))
)
(gr_text SI (at 179.705 120.65) (layer F.SilkS)
(effects (font (size 0.762 0.762) (thickness 0.1524)))
)
(gr_text VDD (at 179.705 118.11) (layer F.SilkS)
(effects (font (size 0.762 0.762) (thickness 0.1524)))
)
)

View File

@ -0,0 +1,116 @@
(export (version D)
(design
(source C:/Users/Vista_64_D630/Desktop/Jared/code/Hardware/trunk/rusefi.com/brain_board_SD_Card_1/brain_board_SD_Card_1.sch)
(date "12/27/2016 5:40:59 AM")
(tool "Eeschema 4.0.1-stable")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title Frankenso)
(company rusEFI.com)
(rev .05)
(date "3 dec 2015")
(source brain_board_SD_Card_1.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref G1)
(value LOGO)
(footprint LOGO_F)
(libsource (lib KICAD_Older_Version) (part LOGO))
(sheetpath (names /) (tstamps /))
(tstamp 52FE356F))
(comp (ref P5)
(value CONN_01X03)
(footprint Pin_Headers:Pin_Header_Angled_1x03)
(libsource (lib conn) (part CONN_01X03))
(sheetpath (names /) (tstamps /))
(tstamp 58618F13))
(comp (ref P6)
(value CONN_01X03)
(footprint Pin_Headers:Pin_Header_Angled_1x03)
(libsource (lib conn) (part CONN_01X03))
(sheetpath (names /) (tstamps /))
(tstamp 58619400))
(comp (ref P352)
(value MICRO-SDCARD-CONNECTOR-3300060P1)
(footprint MICRO-SDCARD-CONNECTOR-3300060P1)
(fields
(field (name VEND2,VEND2#) seeed,3300060P1))
(libsource (lib KICAD_Older_Version) (part MICRO-SDCARD-CONNECTOR-3300060P1))
(sheetpath (names /) (tstamps /))
(tstamp 58624F8A)))
(libparts
(libpart (lib conn) (part CONN_01X03)
(description "Connector 01x03")
(footprints
(fp Pin_Header_Straight_1X03)
(fp Pin_Header_Angled_1X03)
(fp Socket_Strip_Straight_1X03)
(fp Socket_Strip_Angled_1X03))
(fields
(field (name Reference) P)
(field (name Value) CONN_01X03))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))))
(libpart (lib KICAD_Older_Version) (part LOGO)
(fields
(field (name Reference) "#G")
(field (name Value) LOGO)))
(libpart (lib KICAD_Older_Version) (part MICRO-SDCARD-CONNECTOR-3300060P1)
(footprints
(fp MICRO-SDCARD-CONNECTOR-3300060P1))
(fields
(field (name Reference) P)
(field (name Value) MICRO-SDCARD-CONNECTOR-3300060P1))
(pins
(pin (num 1) (name DATA2) (type input))
(pin (num 2) (name CS) (type input))
(pin (num 3) (name DI) (type passive))
(pin (num 4) (name Vdd) (type power_in))
(pin (num 5) (name SCLK) (type input))
(pin (num 6) (name Vss/GND) (type power_in))
(pin (num 7) (name DO) (type 3state))
(pin (num 8) (name DATA1) (type 3state))
(pin (num 9) (name CDN) (type 3state))
(pin (num G1) (name -) (type passive))
(pin (num G2) (name -) (type passive))
(pin (num G3) (name -) (type passive))
(pin (num G4) (name -) (type passive)))))
(libraries
(library (logical KICAD_Older_Version)
(uri C:\Users\Vista_64_D630\Desktop\Jared\code\Hardware\trunk\rusefi.com\rusefi_lib\KICAD_Older_Version.lib))
(library (logical conn)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib")))
(nets
(net (code 1) (name "Net-(P352-Pad8)")
(node (ref P352) (pin 8)))
(net (code 2) (name "Net-(P352-Pad9)")
(node (ref P352) (pin 9)))
(net (code 3) (name /SPI_SCK)
(node (ref P6) (pin 3))
(node (ref P352) (pin 5)))
(net (code 4) (name /SPI_MISO)
(node (ref P352) (pin 7))
(node (ref P5) (pin 1)))
(net (code 5) (name /3.3V)
(node (ref P352) (pin 4))
(node (ref P5) (pin 3)))
(net (code 6) (name /SPI_MOSI)
(node (ref P352) (pin 3))
(node (ref P5) (pin 2)))
(net (code 7) (name /CS_SD_MODULE)
(node (ref P352) (pin 2))
(node (ref P6) (pin 2)))
(net (code 8) (name "Net-(P352-Pad1)")
(node (ref P352) (pin 1)))
(net (code 9) (name GND)
(node (ref P352) (pin G1))
(node (ref P352) (pin 6))
(node (ref P352) (pin G2))
(node (ref P352) (pin G3))
(node (ref P352) (pin G4))
(node (ref P6) (pin 1)))))

View File

@ -0,0 +1,55 @@
update=12/26/2016 2:28:50 PM
version=1
last_client=kicad
[general]
version=1
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=../rusefi_lib
[eeschema/libraries]
LibName1=KICAD_Older_Version
LibName2=power
LibName3=device
LibName4=conn
LibName5=linear
LibName6=analog_switches
LibName7=stm32
LibName8=../rusefi_misc/lib/art-electro-conn
LibName9=../rusefi_misc/lib/art-electro-ic
LibName10=../rusefi_misc/lib/art-electro-conn_2
LibName11=../rusefi_misc/lib/logo_flipped
LibName12=crystal(mc306)
[pcbnew]
version=1
PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
LastNetListRead=stm32f407_board.net
PadDrill=0
PadDrillOvalY=0
PadSizeH=1.3
PadSizeV=1.9
PcbTextSizeV=1
PcbTextSizeH=1
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
SolderMaskMinWidth=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[schematic_editor]
version=1
PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60

View File

@ -0,0 +1,164 @@
EESchema Schematic File Version 2
LIBS:KICAD_Older_Version
LIBS:power
LIBS:device
LIBS:conn
LIBS:linear
LIBS:analog_switches
LIBS:stm32
LIBS:art-electro-conn
LIBS:art-electro-ic
LIBS:art-electro-conn_2
LIBS:logo_flipped
LIBS:crystal(mc306)
LIBS:brain_board_SD_Card_1-cache
EELAYER 25 0
EELAYER END
$Descr A 11000 8500
encoding utf-8
Sheet 1 1
Title "Frankenso"
Date "3 dec 2015"
Rev ".05"
Comp "rusEFI.com"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Connection ~ -4675 3450
$Comp
L LOGO G1
U 1 1 52FE356F
P 6000 7775
F 0 "G1" H 6000 7672 60 0001 C CNN
F 1 "LOGO" H 6000 7878 60 0001 C CNN
F 2 "LOGO_F" H 6000 7775 60 0001 C CNN
F 3 "" H 6000 7775 60 0000 C CNN
1 6000 7775
1 0 0 -1
$EndComp
Text Label 8425 5500 2 60 ~ 0
PB5
Text Label 8425 6025 2 60 ~ 0
PB3
Text Label 8425 5925 2 60 ~ 0
PD4
Text Label 8425 5600 2 60 ~ 0
VDD
Text Label 8425 5400 2 60 ~ 0
PB4
$Comp
L GND #PWR01
U 1 1 5861744D
P 8425 5825
F 0 "#PWR01" H 8425 5825 30 0001 C CNN
F 1 "GND" H 8425 5755 30 0001 C CNN
F 2 "" H 8425 5825 60 0000 C CNN
F 3 "" H 8425 5825 60 0000 C CNN
1 8425 5825
0 1 1 0
$EndComp
Text Notes 8775 5725 0 60 ~ 0
SD Card
$Comp
L CONN_01X03 P5
U 1 1 58618F13
P 8625 5500
F 0 "P5" H 8625 5700 50 0000 C CNN
F 1 "CONN_01X03" V 8725 5500 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Angled_1x03" H 8625 5500 50 0001 C CNN
F 3 "" H 8625 5500 50 0000 C CNN
1 8625 5500
1 0 0 -1
$EndComp
$Comp
L CONN_01X03 P6
U 1 1 58619400
P 8625 5925
F 0 "P6" H 8625 6125 50 0000 C CNN
F 1 "CONN_01X03" V 8725 5925 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Angled_1x03" H 8625 5925 50 0001 C CNN
F 3 "" H 8625 5925 50 0000 C CNN
1 8625 5925
1 0 0 -1
$EndComp
$Comp
L MICRO-SDCARD-CONNECTOR-3300060P1 P352
U 1 1 58624F8A
P 6575 5700
F 0 "P352" H 6425 6200 60 0000 C CNN
F 1 "MICRO-SDCARD-CONNECTOR-3300060P1" H 6575 5200 60 0001 C CNN
F 2 "MICRO-SDCARD-CONNECTOR-3300060P1" H 6575 5700 60 0001 C CNN
F 3 "" H 6575 5700 60 0000 C CNN
F 4 "seeed,3300060P1" H 6575 5700 60 0001 C CNN "VEND2,VEND2#"
1 6575 5700
-1 0 0 -1
$EndComp
NoConn ~ 6975 5300
NoConn ~ 6975 6000
NoConn ~ 6975 6100
$Comp
L GND #PWR02
U 1 1 58624F8B
P 6975 5800
F 0 "#PWR02" H 6975 5800 30 0001 C CNN
F 1 "GND" H 6975 5730 30 0001 C CNN
F 2 "" H 6975 5800 60 0001 C CNN
F 3 "" H 6975 5800 60 0001 C CNN
1 6975 5800
1 0 0 -1
$EndComp
Wire Wire Line
7150 5700 6975 5700
Wire Wire Line
6975 5900 7150 5900
Wire Wire Line
7150 5600 6975 5600
Wire Wire Line
7150 5500 6975 5500
Wire Wire Line
7150 5400 6975 5400
$Comp
L GND #PWR03
U 1 1 58624F8C
P 5975 5900
F 0 "#PWR03" H 5975 5900 30 0001 C CNN
F 1 "GND" H 5975 5830 30 0001 C CNN
F 2 "" H 5975 5900 60 0001 C CNN
F 3 "" H 5975 5900 60 0001 C CNN
1 5975 5900
1 0 0 -1
$EndComp
Wire Wire Line
5975 5550 5975 5900
Connection ~ 5975 5650
Connection ~ 5975 5750
Connection ~ 5975 5850
Text Notes 5475 6950 0 160 ~ 0
SD card slot\nUSB TTL module
Text HLabel 7175 5800 2 60 Input ~ 0
GND
Text HLabel 7150 5400 2 60 Input ~ 0
CS_SD_MODULE
Text HLabel 7150 5500 2 60 Input ~ 0
SPI_MOSI
Text HLabel 7150 5600 2 60 Input ~ 0
3.3V
Text HLabel 7150 5700 2 60 Input ~ 0
SPI_SCK
Text HLabel 7150 5900 2 60 Input ~ 0
SPI_MISO
Wire Wire Line
6975 5800 7175 5800
Text Label 6975 5400 0 60 ~ 0
PD4
Text Label 6975 5700 0 60 ~ 0
PB3
Text Label 6975 5900 0 60 ~ 0
PB4
Text Label 6975 5500 0 60 ~ 0
PB5
Text Label 6975 5600 0 60 ~ 0
VDD
$EndSCHEMATC

View File

@ -0,0 +1,3 @@
1) RESOLVED IN R0.? TBD

View File

@ -0,0 +1,31 @@
BATTERY_CR2032,1,"BT1",
18pF,4,"C2 C3 C21 C22",
0.01uF,2,"C5 C8",
20nF,1,"C1",
0.1uF,8,"C9 C10 C11 C12 C13 C14 C18 C20",
1uF,3,"C6 C7 C16",
2u2F,3,"C4 C15 C17",
4.7uF,1,"C19",
BLUE_LED_0805,7,"D1 D2 D3 D4 D7 D8 D11",
PMEG2010EA,4,"D5 D6 D9 D10",
FILTER,1,"FB1",
LOGO,1,"G1",
MINI-USB-5P-3400020P1,1,"J1",
JUMPER,4,"JP1 JP2 JP3 JP4",
JUMPER3,1,"JP5",
CONN_25X2,2,"P1 P2",
CONN_2,1,"P3",
CONN_6,1,"P4",
47R,1,"R10",
100R,1,"R2",
330R,1,"R5",
680R,4,"R6 R7 R8 R9",
1k,3,"R11 R12 R13",
10k,3,"R1 R3 R4",
100k,1,"R14",
SW_PUSH,2,"SW1 SW2",
NUF2101MT1G,1,"U2",
LM2937,1,"U3",
STM32F407VG,1,"U1",TQFP100
CRYSTAL,1,"X1",
CRYSTAL(MC306),1,"X2",
1 BATTERY_CR2032 1 BT1
2 18pF 4 C2 C3 C21 C22
3 0.01uF 2 C5 C8
4 20nF 1 C1
5 0.1uF 8 C9 C10 C11 C12 C13 C14 C18 C20
6 1uF 3 C6 C7 C16
7 2u2F 3 C4 C15 C17
8 4.7uF 1 C19
9 BLUE_LED_0805 7 D1 D2 D3 D4 D7 D8 D11
10 PMEG2010EA 4 D5 D6 D9 D10
11 FILTER 1 FB1
12 LOGO 1 G1
13 MINI-USB-5P-3400020P1 1 J1
14 JUMPER 4 JP1 JP2 JP3 JP4
15 JUMPER3 1 JP5
16 CONN_25X2 2 P1 P2
17 CONN_2 1 P3
18 CONN_6 1 P4
19 47R 1 R10
20 100R 1 R2
21 330R 1 R5
22 680R 4 R6 R7 R8 R9
23 1k 3 R11 R12 R13
24 10k 3 R1 R3 R4
25 100k 1 R14
26 SW_PUSH 2 SW1 SW2
27 NUF2101MT1G 1 U2
28 LM2937 1 U3
29 STM32F407VG 1 U1 TQFP100
30 CRYSTAL 1 X1
31 CRYSTAL(MC306) 1 X2

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,55 @@
update=12/26/2016 2:28:50 PM
version=1
last_client=kicad
[general]
version=1
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=../rusefi_lib
[eeschema/libraries]
LibName1=KICAD_Older_Version
LibName2=power
LibName3=device
LibName4=conn
LibName5=linear
LibName6=analog_switches
LibName7=stm32
LibName8=../rusefi_misc/lib/art-electro-conn
LibName9=../rusefi_misc/lib/art-electro-ic
LibName10=../rusefi_misc/lib/art-electro-conn_2
LibName11=../rusefi_misc/lib/logo_flipped
LibName12=crystal(mc306)
[pcbnew]
version=1
PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
LastNetListRead=stm32f407_board.net
PadDrill=0
PadDrillOvalY=0
PadSizeH=1.3
PadSizeV=1.9
PcbTextSizeV=1
PcbTextSizeH=1
PcbTextThickness=0.3
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.15
SolderMaskClearance=0
SolderMaskMinWidth=0
DrawSegmentWidth=0.2
BoardOutlineThickness=0.15
ModuleOutlineThickness=0.15
[schematic_editor]
version=1
PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,9 @@
1) RESOLVED IN R0.2 PA9 <> USB VBUS trace is needed to get USB functional
2) RESOLVED IN R0.2 add vertical USB connector option (same as on Frankenso)
3) RESOLVED IN R0.2 use stlink 5x2 header
4) RESOLVED IN R0.2 renamed sm32f407_Board to STM32F407_Brain_Board
5) change LED to use SM0806_Jumpers
6) RESOLVED IN R0.2 Change Fuse to match frankenso
7) RESOLVED IN R0.2 set solder mask to 0.003 inches, per OSHPark suggestion.