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Enable ethernet on one or both nucleo boards #4665

This commit is contained in:
rusefillc 2022-10-16 01:17:34 -04:00
parent 3757d17330
commit edd08db491
1 changed files with 10 additions and 10 deletions
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20
firmware/console/ethernet_console.cpp
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@ -83,19 +83,19 @@ static EthernetThread ethernetConsole;
void startEthernetConsole() {
#ifndef STM32H7
// TODO: why does this break H7? I thought the pins were the same?
efiSetPadMode("ethernet", Gpio::A1, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::A2, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::A7, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_REF_CLK", Gpio::A1, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_MDIO", Gpio::A2, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_CRS_DV", Gpio::A7, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::C1, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::C4, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::C5, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_MDC", Gpio::C1, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_RXD0", Gpio::C4, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_RXD1", Gpio::C5, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::D5, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_RXD1", Gpio::D5, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::G11, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::G13, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ethernet", Gpio::G14, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_TX_EN", Gpio::G11, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_TXD0", Gpio::G13, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("ETH_RMII_TXD1", Gpio::G14, PAL_MODE_ALTERNATE(0xb));
#endif // STM32H7
ethernetConsole.start();