mirror of https://github.com/rusefi/rusefi.git
668 lines
39 KiB
Plaintext
668 lines
39 KiB
Plaintext
(kicad_pcb (version 3) (host pcbnew "(2013-07-07 BZR 4022)-stable")
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(general
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(links 11)
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(no_connects 0)
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(area 200.225429 155.709477 231.089201 180.234166)
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(thickness 1.6)
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(drawings 13)
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(tracks 188)
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(zones 0)
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(modules 6)
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(nets 5)
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)
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(page A)
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(title_block
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(title "DDPAK breakout")
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(rev R0.1)
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(company rusEFI)
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)
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(layers
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(15 F.Cu signal)
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(0 B.Cu signal)
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(16 B.Adhes user)
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(17 F.Adhes user)
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(18 B.Paste user)
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(19 F.Paste user)
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(20 B.SilkS user)
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(21 F.SilkS user)
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(22 B.Mask user)
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(23 F.Mask user)
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(24 Dwgs.User user)
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(25 Cmts.User user)
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(26 Eco1.User user)
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(27 Eco2.User user)
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(28 Edge.Cuts user)
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)
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(setup
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(last_trace_width 0.3048)
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(trace_clearance 0.3048)
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(zone_clearance 0.254)
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(zone_45_only no)
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(trace_min 0.254)
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(segment_width 0.2)
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(edge_width 0.1)
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(via_size 0.889)
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(via_drill 0.635)
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(via_min_size 0.889)
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(via_min_drill 0.508)
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(uvia_size 0.508)
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(uvia_drill 0.127)
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(uvias_allowed no)
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(uvia_min_size 0.508)
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(uvia_min_drill 0.127)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.5 1.5)
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(pad_drill 0.6)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 0 0)
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(visible_elements 7FFFFF3F)
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(pcbplotparams
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(layerselection 3178497)
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(usegerberextensions true)
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(excludeedgelayer true)
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(linewidth 0.150000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(hpglpenoverlay 2)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotothertext true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 /GND)
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(net 2 /HV)
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(net 3 /SIG)
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(net 4 /SIG2)
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(net_class Default "This is the default net class."
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(clearance 0.3048)
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(trace_width 0.3048)
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(via_dia 0.889)
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(via_drill 0.635)
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(uvia_dia 0.508)
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(uvia_drill 0.127)
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(add_net "")
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(add_net /GND)
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(add_net /HV)
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(add_net /SIG)
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(add_net /SIG2)
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)
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(net_class FAT ""
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(clearance 1.7526)
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(trace_width 2.54)
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(via_dia 0.889)
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(via_drill 0.635)
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(uvia_dia 0.508)
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(uvia_drill 0.127)
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)
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(net_class MIN ""
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(clearance 2.54)
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(trace_width 0.3048)
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(via_dia 0.889)
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(via_drill 0.635)
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(uvia_dia 0.508)
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(uvia_drill 0.127)
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)
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(module SM0805_jumper (layer F.Cu) (tedit 53B680BA) (tstamp 544A797B)
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(at 221.742 176.784 180)
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(path /54499D02)
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(attr smd)
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(fp_text reference R1 (at 0.0635 0 270) (layer F.SilkS)
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(effects (font (size 0.762 0.762) (thickness 0.127)))
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)
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(fp_text value 1K (at 0 1.27 180) (layer F.SilkS) hide
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(effects (font (size 0.50038 0.50038) (thickness 0.10922)))
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)
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(fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906))
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(fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
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(fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
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(fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
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(fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
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(fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
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(fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
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(pad 2 smd rect (at 1.27 0 180) (size 1.524 0.2032)
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(layers F.Cu F.Paste F.Mask)
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(net 4 /SIG2)
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)
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(pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397)
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(layers F.Cu F.Paste F.Mask)
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(net 3 /SIG)
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)
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(pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397)
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(layers F.Cu F.Paste F.Mask)
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(net 4 /SIG2)
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)
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(pad 2 thru_hole circle (at 1.905 0 180) (size 1.524 1.524) (drill 0.8128)
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(layers *.Cu *.Mask F.SilkS)
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(net 4 /SIG2)
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)
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(pad 1 thru_hole circle (at -1.905 0 180) (size 1.524 1.524) (drill 0.8128)
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(layers *.Cu *.Mask F.SilkS)
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(net 3 /SIG)
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)
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(pad 1 smd rect (at -1.27 0 180) (size 1.524 0.2032)
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(layers F.Cu F.Paste F.Mask)
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(net 3 /SIG)
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)
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(model smd/chip_cms.wrl
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(at (xyz 0 0 0))
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(scale (xyz 0.1 0.1 0.1))
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(rotate (xyz 0 0 0))
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)
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)
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(module DPAK2 (layer F.Cu) (tedit 5449A3A9) (tstamp 5449C06D)
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(at 212.09 168.91)
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(descr "MOS boitier DPACK G-D-S")
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(tags "CMD DPACK")
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(path /5498B4BA)
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(attr smd)
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(fp_text reference Q1 (at 0 0.635) (layer F.SilkS)
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(effects (font (size 1.27 1.016) (thickness 0.2032)))
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)
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(fp_text value IRGS14C40L (at 0 -2.413) (layer F.SilkS) hide
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(effects (font (size 1.016 1.016) (thickness 0.2032)))
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)
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(fp_line (start 1.397 -1.524) (end 1.397 1.651) (layer F.SilkS) (width 0.127))
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(fp_line (start 1.397 1.651) (end 3.175 1.651) (layer F.SilkS) (width 0.127))
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(fp_line (start 3.175 1.651) (end 3.175 -1.524) (layer F.SilkS) (width 0.127))
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(fp_line (start -3.175 -1.524) (end -3.175 1.651) (layer F.SilkS) (width 0.127))
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(fp_line (start -3.175 1.651) (end -1.397 1.651) (layer F.SilkS) (width 0.127))
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(fp_line (start -1.397 1.651) (end -1.397 -1.524) (layer F.SilkS) (width 0.127))
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(fp_line (start 3.429 -7.62) (end 3.429 -1.524) (layer F.SilkS) (width 0.127))
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(fp_line (start 3.429 -1.524) (end -3.429 -1.524) (layer F.SilkS) (width 0.127))
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(fp_line (start -3.429 -1.524) (end -3.429 -9.398) (layer F.SilkS) (width 0.127))
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(fp_line (start -3.429 -9.525) (end 3.429 -9.525) (layer F.SilkS) (width 0.127))
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(fp_line (start 3.429 -9.398) (end 3.429 -7.62) (layer F.SilkS) (width 0.127))
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(pad 1 smd rect (at -2.286 0) (size 1.651 3.048)
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(layers F.Cu F.Paste F.Mask)
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(net 4 /SIG2)
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)
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(pad 2 smd rect (at 0 -6.35) (size 6.096 6.096)
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(layers F.Cu F.Paste F.Mask)
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(net 2 /HV)
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)
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(pad 3 smd rect (at 2.286 0) (size 1.651 3.048)
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(layers F.Cu F.Paste F.Mask)
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(net 1 /GND)
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)
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(model smd/dpack_2.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module AK300-2 (layer F.Cu) (tedit 544A157D) (tstamp 544A2601)
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(at 222.25 166.878 270)
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(descr CONNECTOR)
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(tags CONNECTOR)
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(path /5449A1BA)
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(attr virtual)
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(fp_text reference P2 (at 2.54 5.08 270) (layer F.SilkS)
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(effects (font (size 1.27 1.27) (thickness 0.127)))
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)
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(fp_text value CONN_2 (at 0.254 7.747 270) (layer F.SilkS) hide
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(effects (font (size 1.778 1.778) (thickness 0.0889)))
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)
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(fp_line (start -3.7846 2.54) (end -1.2446 2.54) (layer F.SilkS) (width 0.06604))
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(fp_line (start -1.2446 2.54) (end -1.2446 -0.254) (layer F.SilkS) (width 0.06604))
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(fp_line (start -3.7846 -0.254) (end -1.2446 -0.254) (layer F.SilkS) (width 0.06604))
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(at 212.09 172.212)
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(tags "CMS SM")
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(path /54499C42)
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(module SIL-1 (layer F.Cu) (tedit 544A1D71) (tstamp 544A798F)
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(at 216.916 172.72)
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(descr "Connecteurs 1 pin")
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(layers *.Cu *.Mask F.SilkS)
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(module SIL-1 (layer F.Cu) (tedit 544A1F68) (tstamp 544A7985)
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(at 223.266 173.736 180)
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(descr "Connecteurs 1 pin")
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(tags "CONN DEV")
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(path /544A1CBF)
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