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rusefi/misc/install/STM32_Programmer_CLI/Data_Base/STM32_Prog_DB_0x413.xml

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<?xml version="1.0" encoding="UTF-8"?>
<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
<Device>
<DeviceID>0x413</DeviceID>
<Vendor>STMicroelectronics</Vendor>
<Type>MCU</Type>
<CPU>Cortex-M4</CPU>
<Name>STM32F405xx/F407xx/F415xx/F417xx</Name>
<Series>STM32F4</Series>
<Description>ARM 32-bit Cortex-M4 based device</Description>
<Configurations>
<!-- JTAG_SWD Interface -->
<Interface name="JTAG_SWD">
<!-- 1MB -->
<Configuration number="0x0">
<DBANK reference="0x0"> <ReadRegister address="0x1FFF7A22" mask="0x000FFF" value="0x400"/> </DBANK>
</Configuration>
<!-- 512kB -->
<Configuration number="0x1">
<DBANK reference="0x0"> <ReadRegister address="0x1FFF7A22" mask="0x000FFF" value="0x200"/> </DBANK>
</Configuration>
</Interface>
<!-- Bootloader Interface -->
<Interface name="Bootloader"/>
</Configurations>
<!-- Peripherals -->
<Peripherals>
<!-- Embedded SRAM -->
<Peripheral>
<Name>Embedded SRAM</Name>
<Type>Storage</Type>
<Description/>
<ErasedValue>0x00</ErasedValue>
<Access>RWE</Access>
<!-- 112 KB 0x1c000-->
<Configuration>
<Parameters address="0x20000000" name="SRAM" size="0x20000"/>
<Description/>
<Organization>Single</Organization>
<Bank name="Bank 1">
<Field>
<Parameters address="0x20000000" name="SRAM" occurrence="0x1" size="0x20000"/>
</Field>
</Bank>
</Configuration>
</Peripheral>
<!-- Embedded Flash -->
<Peripheral>
<Name>Embedded Flash</Name>
<Type>Storage</Type>
<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
<ErasedValue>0xFF</ErasedValue>
<Access>RWE</Access>
<FlashSize address="0x1FFF7A22" default="0x100000"/>
<BootloaderVersion address="0x1FFF77DE"/>
<!-- 1024KB Single Bank -->
<Configuration config="0">
<Parameters address="0x08000000" name=" 1024 Kbytes Embedded Flash" size="0x100000"/>
<Description/>
<Organization>Single</Organization>
<Alignment>0x4</Alignment>
<Bank name="Bank 1">
<Field>
<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
</Field>
<Field>
<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
</Field>
<Field>
<Parameters address="0x08020000" name="sector5" occurrence="0x7" size="0x20000"/>
</Field>
</Bank>
</Configuration>
<Configuration config="1">
<Parameters address="0x08000000" name=" 512 Kbytes Embedded Flash" size="0x80000"/>
<Description/>
<Organization>Single</Organization>
<Alignment>0x4</Alignment>
<Bank name="Bank 1">
<Field>
<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
</Field>
<Field>
<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
</Field>
<Field>
<Parameters address="0x08020000" name="sector5" occurrence="0x3" size="0x20000"/>
</Field>
</Bank>
</Configuration>
<Configuration>
<Parameters address="0x08000000" name=" 1024 Kbytes Embedded Flash" size="0x100000"/>
<Description/>
<Organization>Single</Organization>
<Alignment>0x4</Alignment>
<Bank name="Bank 1">
<Field>
<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
</Field>
<Field>
<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
</Field>
<Field>
<Parameters address="0x08020000" name="sector5" occurrence="0x7" size="0x20000"/>
</Field>
</Bank>
</Configuration>
</Peripheral>
<!-- OTP -->
<Peripheral>
<Name>OTP</Name>
<Type>Storage</Type>
<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
<ErasedValue>0xFF</ErasedValue>
<Access>RW</Access>
<!-- 512 Bytes single bank -->
<Configuration>
<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
<Description/>
<Organization>Single</Organization>
<Alignment>0x4</Alignment>
<Bank name="OTP">
<Field>
<Parameters address="0x1FFF7800" name="OTP" occurrence="0x1" size="0x210"/>
</Field>
</Bank>
</Configuration>
</Peripheral>
<!-- Mirror Option Bytes -->
<Peripheral>
<Name>MirrorOptionBytes</Name>
<Type>Storage</Type>
<Description>Mirror Option Bytes contains the extra area.</Description>
<ErasedValue>0xFF</ErasedValue>
<Access>RW</Access>
<!-- 8 Bytes single bank -->
<Configuration>
<Parameters address="0x1FFFC000" name=" 8 Bytes Data MirrorOptionBytes" size="0x8"/>
<Description/>
<Organization>Single</Organization>
<Alignment>0x4</Alignment>
<Bank name="MirrorOptionBytes">
<Field>
<Parameters address="0x1FFFC000" name="MirrorOptionBytes" occurrence="0x1" size="0x8"/>
</Field>
</Bank>
</Configuration>
</Peripheral>
<!-- Option Bytes -->
<Peripheral>
<Name>Option Bytes</Name>
<Type>Configuration</Type>
<Description/>
<Access>RW</Access>
<Bank interface="JTAG_SWD">
<Parameters address="0x40023c14" name="Bank 1" size="0x4"/>
<Category>
<Name>Read Out Protection</Name>
<Field>
<Parameters address="0x40023c14" name="RDP" size="0x4"/>
<AssignedBits>
<Bit>
<Name>RDP</Name>
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
<BitOffset>0x8</BitOffset>
<BitWidth>0x8</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0xAA">Level 0, no protection</Val>
<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
<Val value="0xCC">Level 2, chip protection</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
<Category>
<Name>BOR Level</Name>
<Field>
<Parameters address="0x40023c14" name="USER" size="0x4"/>
<AssignedBits>
<Bit>
<Name>BOR_LEV</Name>
<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
<BitOffset>0x2</BitOffset>
<BitWidth>0x2</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">BOR Level 3 reset threshold level from 2.70 to 3.60 V</Val>
<Val value="0x1">BOR Level 2 reset threshold level from 2.40 to 2.70 V</Val>
<Val value="0x2">BOR Level 1 reset threshold level from 2.10 to 2.40 V</Val>
<Val value="0x3">BOR OFF reset threshold level from 1.80 to 2.10 V</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
<Category>
<Name>User Configuration</Name>
<Field>
<Parameters address="0x40023c14" name="USER" size="0x4"/>
<AssignedBits>
<Bit>
<Name>WDG_SW</Name>
<Description/>
<BitOffset>0x5</BitOffset>
<BitWidth>0x1</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">Hardware watchdog</Val>
<Val value="0x1">Software watchdog</Val>
</Values>
</Bit>
<Bit>
<Name>nRST_STOP</Name>
<Description/>
<BitOffset>0x6</BitOffset>
<BitWidth>0x1</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">Reset generated when entering Stop mode</Val>
<Val value="0x1">No reset generated</Val>
</Values>
</Bit>
<Bit>
<Name>nRST_STDBY</Name>
<Description/>
<BitOffset>0x7</BitOffset>
<BitWidth>0x1</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">Reset generated when entering Standby mode</Val>
<Val value="0x1">No reset generated</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
<Category>
<Name>Write Protection</Name>
<Field>
<Parameters address="0x40023c14" name="WRP1" size="0x4"/>
<AssignedBits>
<Bit>
<Name>WRP0</Name>
<Description/>
<BitOffset>0x10</BitOffset>
<BitWidth>0xC</BitWidth>
<Access>RW</Access>
<Values ByBit="true">
<Val value="0x0">Write protection active</Val>
<Val value="0x1">Write protection not active</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
</Bank>
<Bank interface="Bootloader">
<Parameters address="0x1FFFC000" name="Bank 1" size="0x10"/>
<Category>
<Name>Read Out Protection</Name>
<Field>
<Parameters address="0x1FFFC000" name="RDP" size="0x4"/>
<AssignedBits>
<Bit>
<Name>RDP</Name>
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
<BitOffset>0x8</BitOffset>
<BitWidth>0x8</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0xAA">Level 0, no protection</Val>
<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
<Val value="0xCC">Level 2, chip protection</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
<Category>
<Name>BOR Level</Name>
<Field>
<Parameters address="0x1FFFC000" name="USER" size="0x4"/>
<AssignedBits>
<Bit>
<Name>BOR_LEV</Name>
<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
<BitOffset>0x2</BitOffset>
<BitWidth>0x2</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">BOR Level 3 reset threshold level from 2.70 to 3.60 V</Val>
<Val value="0x1">BOR Level 2 reset threshold level from 2.40 to 2.70 V</Val>
<Val value="0x2">BOR Level 1 reset threshold level from 2.10 to 2.40 V</Val>
<Val value="0x3">BOR OFF reset threshold level from 1.80 to 2.10 V</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
<Category>
<Name>User Configuration</Name>
<Field>
<Parameters address="0x1FFFC000" name="USER" size="0x4"/>
<AssignedBits>
<Bit>
<Name>WDG_SW</Name>
<Description/>
<BitOffset>0x5</BitOffset>
<BitWidth>0x1</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">Hardware watchdog</Val>
<Val value="0x1">Software watchdog</Val>
</Values>
</Bit>
<Bit>
<Name>nRST_STOP</Name>
<Description/>
<BitOffset>0x6</BitOffset>
<BitWidth>0x1</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">Reset generated when entering Stop mode</Val>
<Val value="0x1">No reset generated</Val>
</Values>
</Bit>
<Bit>
<Name>nRST_STDBY</Name>
<Description/>
<BitOffset>0x7</BitOffset>
<BitWidth>0x1</BitWidth>
<Access>RW</Access>
<Values>
<Val value="0x0">Reset generated when entering Standby mode</Val>
<Val value="0x1">No reset generated</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
<Category>
<Name>Write Protection</Name>
<Field>
<Parameters address="0x1FFFC008" name="WRP1" size="0x4"/>
<AssignedBits>
<Bit>
<Name>WRP0</Name>
<Description/>
<BitOffset>0x0</BitOffset>
<BitWidth>0xC</BitWidth>
<Access>RW</Access>
<Values ByBit="true">
<Val value="0x0">Write protection active</Val>
<Val value="0x1">Write protection not active</Val>
</Values>
</Bit>
</AssignedBits>
</Field>
</Category>
</Bank>
</Peripheral>
</Peripherals>
</Device>
</Root>
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