mirror of https://github.com/rusefi/rusefi.git
600 lines
22 KiB
XML
600 lines
22 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
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<Device>
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<DeviceID>0x434</DeviceID>
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<Vendor>STMicroelectronics</Vendor>
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<Type>MCU</Type>
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<CPU>Cortex-M4</CPU>
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<Name>STM32F469xx/F467xx</Name>
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<Series>STM32F4</Series>
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<Description>ARM 32-bit Cortex-M4 based device</Description>
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<Configurations>
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<!-- JTAG_SWD Interface -->
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<Interface name="JTAG_SWD">
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<Configuration number="0x0">
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<SPRMode reference="0x0"> <ReadRegister address="0x40023C14" mask="0x80000000" value="0x0"/> </SPRMode>
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<flashSize> <!-- 2M --><ReadRegister address="0x1FFF7A22" mask="0xFFFF" value="0x800"/> </flashSize>
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</Configuration>
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<Configuration number="0x1">
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<SPRMode reference="0x1"> <ReadRegister address="0x40023C14" mask="0x80000000" value="0x0"/> </SPRMode>
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<flashSize> <!-- 2M --><ReadRegister address="0x1FFF7A22" mask="0xFFFF" value="0x800"/> </flashSize>
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</Configuration>
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<Configuration number="0x2">
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<SPRMode reference="0x0"> <ReadRegister address="0x40023C14" mask="0x80000000" value="0x0"/> </SPRMode>
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<flashSize> <!-- 1M --><ReadRegister address="0x1FFF7A22" mask="0xFFFF" value="0x400"/> </flashSize>
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<DB1M reference="0x0"> <ReadRegister address="0x40023C14" mask="0x40000000" value="0x0"/> </DB1M>
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</Configuration>
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<Configuration number="0x3">
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<SPRMode reference="0x1"> <ReadRegister address="0x40023C14" mask="0x80000000" value="0x0"/> </SPRMode>
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<flashSize> <!-- 1M --><ReadRegister address="0x1FFF7A22" mask="0xFFFF" value="0x400"/> </flashSize>
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<DB1M reference="0x0"> <ReadRegister address="0x40023C14" mask="0x40000000" value="0x0"/> </DB1M>
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</Configuration>
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<Configuration number="0x4">
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<SPRMode reference="0x0"> <ReadRegister address="0x40023C14" mask="0x80000000" value="0x0"/> </SPRMode>
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<flashSize> <!-- 1M --><ReadRegister address="0x1FFF7A22" mask="0xFFFF" value="0x400"/> </flashSize>
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<DB1M reference="0x1"> <ReadRegister address="0x40023C14" mask="0x40000000" value="0x40000000"/> </DB1M>
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</Configuration>
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<Configuration number="0x5">
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<SPRMode reference="0x1"> <ReadRegister address="0x40023C14" mask="0x80000000" value="0x0"/> </SPRMode>
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<flashSize> <!-- 1M --><ReadRegister address="0x1FFF7A22" mask="0xFFFF" value="0x400"/> </flashSize>
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<DB1M reference="0x1"> <ReadRegister address="0x40023C14" mask="0x40000000" value="0x40000000"/> </DB1M>
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</Configuration>
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<Configuration number="0x6">
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<dummy> <ReadRegister address="0x20000000" mask="0" value="0"/> </dummy>
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</Configuration>
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</Interface>
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<!-- Bootloader Interface -->
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<Interface name="Bootloader">
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<Configuration number="0x0">
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<SPRMode reference="0x0"> <ReadRegister address="0x1FFFC008" mask="0x8000" value="0x0"/> </SPRMode>
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</Configuration>
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<Configuration number="0x1">
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<SPRMode reference="0x1"> <ReadRegister address="0x1FFFC008" mask="0x8000" value="0x8000"/> </SPRMode>
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</Configuration>
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<Configuration number="0x2">
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<SPRMode reference="0x0"> <ReadRegister address="0x1FFFC008" mask="0x8000" value="0x0"/> </SPRMode>
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<DB1M reference="0x0"> <ReadRegister address="0x1FFFC008" mask="0x4000" value="0x0"/> </DB1M>
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</Configuration>
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<Configuration number="0x3">
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<SPRMode reference="0x1"> <ReadRegister address="0x1FFFC008" mask="0x8000" value="0x8000"/> </SPRMode>
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<DB1M reference="0x0"> <ReadRegister address="0x1FFFC008" mask="0x4000" value="0x0"/> </DB1M>
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</Configuration>
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<Configuration number="0x4">
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<SPRMode reference="0x0"> <ReadRegister address="0x1FFFC008" mask="0x8000" value="0x0"/> </SPRMode>
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<DB1M reference="0x1"> <ReadRegister address="0x1FFFC008" mask="0x4000" value="0x4000"/> </DB1M>
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</Configuration>
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<Configuration number="0x5">
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<SPRMode reference="0x1"> <ReadRegister address="0x1FFFC008" mask="0x8000" value="0x8000"/> </SPRMode>
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<DB1M reference="0x1"> <ReadRegister address="0x1FFFC008" mask="0x4000" value="0x4000"/> </DB1M>
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</Configuration>
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<Configuration number="0x6">
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<dummy> <ReadRegister address="0x20000000" mask="0" value="0"/> </dummy>
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</Configuration>
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</Interface>
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</Configurations>
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<!-- Peripherals -->
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<Peripherals>
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<!-- Embedded SRAM -->
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<Peripheral>
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<Name>Embedded SRAM</Name>
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<Type>Storage</Type>
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<Description/>
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<ErasedValue>0x00</ErasedValue>
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<Access>RWE</Access>
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<!-- 320 KB 0x50000-->
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<Configuration>
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<Parameters address="0x20000000" name="SRAM" size="0x50000"/>
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<Description/>
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<Organization>Single</Organization>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x20000000" name="SRAM" occurrence="0x1" size="0x50000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Embedded Flash -->
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<Peripheral>
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<Name>Embedded Flash</Name>
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<Type>Storage</Type>
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<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<FlashSize address="0x1FFF7A22" default="0x200000"/>
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<BootloaderVersion address="0x1FFF76DE"/>
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<!-- 1024KB Single Bank -->
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<Configuration config="0,1,6">
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<Parameters address="0x08000000" name=" 2048 Kbytes Embedded Flash" size="0x200000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector5" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x08100000" name="sector12" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08110000" name="sector16" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08120000" name="sector17" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="4,5">
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<Parameters address="0x08000000" name=" 1024 Kbytes Embedded Flash" size="0x100000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector5" occurrence="0x3" size="0x20000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x08080000" name="sector8" occurrence="0x4" size="0x20000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="2,3">
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<Parameters address="0x08000000" name=" 1024 Kbytes Embedded Flash" size="0x100000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector5" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- OTP -->
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<Peripheral>
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<Name>OTP</Name>
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<Type>Storage</Type>
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<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RW</Access>
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<!-- 512 Bytes single bank -->
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<Configuration>
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<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="OTP">
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<Field>
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<Parameters address="0x1FFF7800" name="OTP" occurrence="0x1" size="0x210"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Mirror Option Bytes -->
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<Peripheral>
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<Name>MirrorOptionBytes</Name>
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<Type>Storage</Type>
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<Description>Mirror Option Bytes contains the extra area.</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RW</Access>
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<!-- 20 Bytes Dual bank -->
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<Configuration>
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<Parameters address="0x1FFEC008" name=" 20 Bytes Data MirrorOptionBytes" size="0x14"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x1FFEC008" name="Bank1" occurrence="0x1" size="0x4"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x1FFFC000" name="Bank2" occurrence="0x1" size="0x10"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Option Bytes -->
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<Peripheral>
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<Name>Option Bytes</Name>
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<Type>Configuration</Type>
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<Description/>
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<Access>RW</Access>
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<Bank interface="JTAG_SWD">
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<Parameters address="0x40023C14" name="Bank 1" size="0x8"/>
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<Category>
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<Name>Read Out Protection</Name>
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<Field>
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<Parameters address="0x40023C14" name="RDP" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>RDP</Name>
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<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
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<BitOffset>0x8</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0xAA">Level 0, no protection</Val>
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<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
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<Val value="0xCC">Level 2, chip protection</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>PCROP Protection</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit reference="SPRMode">
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<Name>SPRMOD</Name>
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<Description>Selection of protection mode for nWPRi bits.</Description>
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<BitOffset>0x1F</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">PCROP disabled. nWPRi bits used for Write protection on sector i</Val>
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<Val value="0x1">PCROP enabled. nWPRi bits used for PCROP protection on sector i</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>BOR Level</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>BOR_LEV</Name>
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<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
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<BitOffset>0x2</BitOffset>
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<BitWidth>0x2</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">BOR Level 3 reset threshold level from 2.70 to 3.60 V</Val>
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<Val value="0x1">BOR Level 2 reset threshold level from 2.40 to 2.70 V</Val>
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<Val value="0x2">BOR Level 1 reset threshold level from 2.10 to 2.40 V</Val>
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<Val value="0x3">BOR OFF reset threshold level from 1.80 to 2.10 V</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>User Configuration</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>BFB2</Name>
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<Description/>
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<BitOffset>0x4</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Dual-bank boot disabled. Boot can be performed either from Flash memory bank 1 or from system memory depending on boot pin state (default)</Val>
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<Val value="0x1">Dual-bank boot enabled. Boot is always performed from system memory.</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>WDG_SW</Name>
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<Description/>
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<BitOffset>0x5</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Hardware watchdog</Val>
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<Val value="0x1">Software watchdog</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STOP</Name>
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<Description/>
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<BitOffset>0x6</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Stop mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STDBY</Name>
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<Description/>
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<BitOffset>0x7</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Standby mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
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<Bit config="2,3,4,5">
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<Name>DB1M</Name>
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<Description>Dual-bank on 1 Mbyte Flash memory devices</Description>
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<BitOffset>0x1E</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">1 Mbyte single bank Flash memory (contiguous addresses in bank1)</Val>
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<Val value="0x1">1 Mbyte dual bank Flash memory. The Flash memory is organized as two banks of 512 Kbytes each</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>Write Protection</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit config="0,2,4">
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<Name>nWRP0</Name>
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<Description/>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0xC</BitWidth>
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<Access>RW</Access>
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<Values ByBit="true">
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<Val value="0x0">Write protection active</Val>
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<Val value="0x1">Write protection not active</Val>
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</Values>
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</Bit>
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<Bit config="1,3,5,6">
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<Name>nWRP0</Name>
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<Description/>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0xC</BitWidth>
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<Access>RW</Access>
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<Values ByBit="true">
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<Val value="0x0">PCROP protection not active on sector i</Val>
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<Val value="0x1">PCROP protection active on sector i</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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<Field>
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<Parameters address="0x40023C18" name="FLASH_OPTCR1" size="0x4"/>
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<AssignedBits>
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<Bit config="0,2,4">
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<Name>nWRP12</Name>
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<Description/>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0xC</BitWidth>
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<Access>RW</Access>
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<Values ByBit="true">
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<Val value="0x0">Write protection active</Val>
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<Val value="0x1">Write protection not active</Val>
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</Values>
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</Bit>
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<Bit config="1,3,5,6">
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<Name>nWRP12</Name>
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<Description/>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0xC</BitWidth>
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<Access>RW</Access>
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<Values ByBit="true">
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<Val value="0x0">PCROP protection not active on sector i</Val>
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<Val value="0x1">PCROP protection active on sector i</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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</Bank>
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<Bank interface="Bootloader">
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<Parameters address="0x1FFFC000" name="Bank 1" size="0x10"/>
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<Category>
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<Name>Read Out Protection</Name>
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<Field>
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<Parameters address="0x1FFFC000" name="RDP" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>RDP</Name>
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<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
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<BitOffset>0x8</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0xAA">Level 0, no protection</Val>
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<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
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<Val value="0xCC">Level 2, chip protection</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>PCROP Protection</Name>
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<Field>
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<Parameters address="0x1FFFC008" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit reference="SPRMode">
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<Name>SPRMOD</Name>
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<Description>Selection of protection mode for nWPRi bits.</Description>
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<BitOffset>0xF</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">PCROP disabled. nWPRi bits used for Write protection on sector i</Val>
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<Val value="0x1">PCROP enabled. nWPRi bits used for PCROP protection on sector i</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>BOR Level</Name>
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<Field>
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<Parameters address="0x1FFFC000" name="USER" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>BOR_LEV</Name>
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<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
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<BitOffset>0x2</BitOffset>
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<BitWidth>0x2</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">BOR Level 3 reset threshold level from 2.70 to 3.60 V</Val>
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<Val value="0x1">BOR Level 2 reset threshold level from 2.40 to 2.70 V</Val>
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<Val value="0x2">BOR Level 1 reset threshold level from 2.10 to 2.40 V</Val>
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<Val value="0x3">BOR OFF reset threshold level from 1.80 to 2.10 V</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>User Configuration</Name>
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<Field>
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<Parameters address="0x1FFFC000" name="USER" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>BFB2</Name>
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<Description/>
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<BitOffset>0x4</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Dual-bank boot disabled. Boot can be performed either from Flash memory bank 1 or from system memory depending on boot pin state (default)</Val>
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<Val value="0x1">Dual-bank boot enabled. Boot is always performed from system memory.</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>WDG_SW</Name>
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<Description/>
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<BitOffset>0x5</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Hardware watchdog</Val>
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<Val value="0x1">Software watchdog</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STOP</Name>
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<Description/>
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<BitOffset>0x6</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Stop mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STDBY</Name>
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<Description/>
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<BitOffset>0x7</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Standby mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
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<Bit config="2,3,4,5">
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<Name>DB1M</Name>
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<Description>Dual-bank on 1 Mbyte Flash memory devices</Description>
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<BitOffset>0x1E</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">1 Mbyte single bank Flash memory (contiguous addresses in bank1)</Val>
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|
<Val value="0x1">1 Mbyte dual bank Flash memory. The Flash memory is organized as two banks of 512 Kbytes each</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
|
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</Category>
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<Category>
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<Name>Write Protection</Name>
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<Field>
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<Parameters address="0x1FFFC008" name="WRP0" size="0x4"/>
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<AssignedBits>
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<Bit config="0,2,4">
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<Name>nWRP0</Name>
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<Description/>
|
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<BitOffset>0x0</BitOffset>
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<BitWidth>0xC</BitWidth>
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|
<Access>RW</Access>
|
|
<Values ByBit="true">
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<Val value="0x0">Write protection active</Val>
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<Val value="0x1">Write protection not active</Val>
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</Values>
|
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</Bit>
|
|
<Bit config="1,3,5,6">
|
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<Name>nWRP0</Name>
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<Description/>
|
|
<BitOffset>0x0</BitOffset>
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<BitWidth>0xC</BitWidth>
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|
<Access>RW</Access>
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|
<Values ByBit="true">
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|
<Val value="0x0">PCROP protection not active on sector i</Val>
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|
<Val value="0x1">PCROP protection active on sector i</Val>
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|
</Values>
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</Bit>
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</AssignedBits>
|
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</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="Bootloader">
|
|
<Parameters address="0x1FFEC008" name="Bank 2" size="0x4"/>
|
|
<Category>
|
|
<Name>Write Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x1FFEC008" name="WRP1" size="0x4"/>
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|
<AssignedBits>
|
|
<Bit config="0,2,4">
|
|
<Name>nWRP12</Name>
|
|
<Description/>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0xC</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active</Val>
|
|
<Val value="0x1">Write protection not active</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="1,3,5,6">
|
|
<Name>nWRP12</Name>
|
|
<Description/>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0xC</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">PCROP protection not active on sector i</Val>
|
|
<Val value="0x1">PCROP protection active on sector i</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
</Peripheral>
|
|
</Peripherals>
|
|
</Device>
|
|
</Root> |