mirror of https://github.com/rusefi/rusefi.git
207 lines
6.6 KiB
XML
207 lines
6.6 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
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<Device>
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<DeviceID>0x444</DeviceID>
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<Vendor>STMicroelectronics</Vendor>
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<Type>MCU</Type>
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<CPU>Cortex-M0</CPU>
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<Name>STM32F03x</Name>
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<Series>STM32F0</Series>
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<Description>ARM 32-bit Cortex-M0 based device</Description>
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<Configurations>
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<!-- JTAG_SWD Interface -->
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<Interface name="JTAG_SWD"/>
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<!-- Bootloader Interface -->
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<Interface name="Bootloader"/>
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</Configurations>
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<!-- Peripherals -->
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<Peripherals>
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<!-- Embedded SRAM -->
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<Peripheral>
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<Name>Embedded SRAM</Name>
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<Type>Storage</Type>
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<Description/>
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<ErasedValue>0x00</ErasedValue>
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<Access>RWE</Access>
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<!-- 4 KB -->
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<Configuration>
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<Parameters address="0x20000000" name="SRAM" size="0x1000"/>
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<Description/>
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<Organization>Single</Organization>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x20000000" name="SRAM" occurrence="0x1" size="0x1000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Embedded Flash -->
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<Peripheral>
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<Name>Embedded Flash</Name>
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<Type>Storage</Type>
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<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<FlashSize address="0x1FFFF7CC" default="0x8000"/>
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<BootloaderVersion address="0x1FFFF7A6"/>
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<!-- 32KB single Bank -->
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<Configuration>
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<Parameters address="0x08000000" name=" 32 Kbytes Embedded Flash" size="0x8000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x20" size="0x400"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Option Bytes -->
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<Peripheral>
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<Name>Option Bytes</Name>
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<Type>Configuration</Type>
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<Description/>
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<Access>RW</Access>
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<Bank>
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<Parameters address="0x1FFFF800" name="Bank 1" size="0x10"/>
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<Category>
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<Name>Read Out Protection</Name>
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<Field>
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<Parameters address="0x1FFFF800" name="USR_RDP" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>RDP</Name>
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<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
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<BitOffset>0x0</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0xAA">Level 0, no protection</Val>
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<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
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<Val value="0xCC">Level 2, chip protection</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>User Configuration</Name>
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<Field>
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<Parameters address="0x1FFFF800" name="USR_RDP" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>WDG_SW</Name>
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<Description/>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Hardware watchdog</Val>
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<Val value="0x1">Software watchdog</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STOP</Name>
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<Description/>
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<BitOffset>0x11</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Stop mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STDBY</Name>
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<Description/>
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<BitOffset>0x12</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Standby mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nBOOT1</Name>
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<Description>Together with the input pad BOOT0, selects the Boot mode. If BOOT0=0, always boot from main flash memory regardless of nBoot1 value. </Description>
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<BitOffset>0x14</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Boot from embedded SRAM when BOOT0=1</Val>
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<Val value="0x1">Boot from system flash when BOOT0=1</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>VDDA_MONITOR</Name>
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<Description/>
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<BitOffset>0x15</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">VDDA power supply supervisor disabled</Val>
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<Val value="0x1">VDDA power supply supervisor enabled</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>RAM_PARITY</Name>
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<Description/>
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<BitOffset>0x16</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">RAM parity check enabled</Val>
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<Val value="0x1">RAM parity check disabled</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>User Data</Name>
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<Field>
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<Parameters address="0x1FFFF804" name="USR_DATA" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>Data0</Name>
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<Description>User data 0 (8-bit)</Description>
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<BitOffset>0x0</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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</Bit>
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<Bit>
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<Name>Data1</Name>
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<Description>User data 1 (8-bit)</Description>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>Write Protection</Name>
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<Field>
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<Parameters address="0x1FFFF808" name="WRP_0_1" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>nWRP0</Name>
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<Description/>
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<BitOffset>0x0</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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<Values ByBit="true">
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<Val value="0x0">Write protection active on this sector</Val>
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<Val value="0x1">Write protection not active on this sector</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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</Bank>
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</Peripheral>
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</Peripherals>
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</Device>
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</Root> |