This commit is contained in:
Josh Stewart 2020-04-20 15:58:46 +10:00
commit 02b80ee7a5
5 changed files with 148 additions and 0 deletions

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@ -23,6 +23,16 @@ K mosfet driver
F https://www.st.com/resource/en/datasheet/vn5160s-e.pdf
$ENDCMP
#
$CMP VN7004CHTR
D Gate Drivers ABD VIPOWER
F http://www.st.com/content/ccc/resource/technical/document/datasheet/b6/fd/97/74/c7/37/4e/f0/DM00177921.pdf/files/DM00177921.pdf/jcr:content/translations/en.DM00177921.pdf
$ENDCMP
#
$CMP VND7020AJTR-E
D Power Switch ICs - Power Distribution Double chnl hi-side Multi-Sense analog
F https://componentsearchengine.com/Datasheets/1/VND7020AJTR-E.pdf
$ENDCMP
#
$CMP VNLD5090
D 25A dual low-side MOSFET driver, SO-8
K mosfet driver

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@ -220,6 +220,66 @@ X VCC 8 600 200 100 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# VN7004CHTR
#
DEF VN7004CHTR IC 0 30 Y Y 1 F N
F0 "IC" 1450 300 50 H V L CNN
F1 "VN7004CHTR" 1450 200 50 H V L CNN
F2 "IC_Automotive:OCTAPAK" 1450 100 50 H I L CNN
F3 "" 1450 0 50 H I L CNN
F4 "Gate Drivers ABD VIPOWER" 1450 -100 50 H I L CNN "Description"
F5 "STMicroelectronics" 1450 -300 50 H I L CNN "Manufacturer_Name"
F6 "VN7004CHTR" 1450 -400 50 H I L CNN "Manufacturer_Part_Number"
F7 "511-VN7004CHTR" 1450 -500 50 H I L CNN "Mouser Part Number"
F8 "https://www.mouser.com/Search/Refine.aspx?Keyword=511-VN7004CHTR" 1450 -600 50 H I L CNN "Mouser Price/Stock"
DRAW
P 5 0 1 6 200 100 1400 100 1400 -700 200 -700 200 100 N
X OUTPUT_1 1 0 0 200 R 50 50 0 0 U
X OUTPUT_2 2 0 -100 200 R 50 50 0 0 U
X OUTPUT_3 3 0 -200 200 R 50 50 0 0 U
X INPUT 4 0 -300 200 R 50 50 0 0 U
X CS 5 0 -400 200 R 50 50 0 0 U
X SEN 6 0 -500 200 R 50 50 0 0 U
X GND 7 0 -600 200 R 50 50 0 0 U
X TAB_(VCC) 8 1600 0 200 L 50 50 0 0 U
ENDDRAW
ENDDEF
#
# VND7020AJTR-E
#
DEF VND7020AJTR-E IC 0 30 Y Y 1 F N
F0 "IC" 1650 300 50 H V L CNN
F1 "VND7020AJTR-E" 1650 200 50 H V L CNN
F2 "IC_Automotive:PowerSSO-16" 1650 100 50 H I L CNN
F3 "" 1650 0 50 H I L CNN
F4 "Power Switch ICs - Power Distribution Double chnl hi-side Multi-Sense analog" 1650 -100 50 H I L CNN "Description"
F5 "1.7" 1650 -200 50 H I L CNN "Height"
F6 "STMicroelectronics" 1650 -300 50 H I L CNN "Manufacturer_Name"
F7 "VND7020AJTR-E" 1650 -400 50 H I L CNN "Manufacturer_Part_Number"
F8 "511-VND7020AJTR-E" 1650 -500 50 H I L CNN "Mouser Part Number"
F9 "https://www.mouser.com/Search/Refine.aspx?Keyword=511-VND7020AJTR-E" 1650 -600 50 H I L CNN "Mouser Price/Stock"
DRAW
P 5 0 1 6 200 100 1600 100 1600 -1000 200 -1000 200 100 N
X INPUT_0 1 0 0 200 R 50 50 0 0 I
X OUTPUT1_2 10 1800 -600 200 L 50 50 0 0 O
X OUTPUT1_3 11 1800 -500 200 L 50 50 0 0 O
X OUTPUT1_4 12 1800 -400 200 L 50 50 0 0 O
X OUTPUT0_1 13 1800 -300 200 L 50 50 0 0 O
X OUTPUT0_2 14 1800 -200 200 L 50 50 0 0 O
X OUTPUT0_3 15 1800 -100 200 L 50 50 0 0 O
X OUTPUT0_4 16 1800 0 200 L 50 50 0 0 O
X EP 17 900 -1200 200 U 50 50 0 0 W
X ~FAULTRST 2 0 -100 200 R 50 50 0 0 B
X SEN 3 0 -200 200 R 50 50 0 0 I
X GND 4 0 -300 200 R 50 50 0 0 W
X SEL0 5 0 -400 200 R 50 50 0 0 I
X SEL1 6 0 -500 200 R 50 50 0 0 I
X MULTISENSE 7 0 -600 200 R 50 50 0 0 I
X INPUT1 8 0 -700 200 R 50 50 0 0 I
X OUTPUT1_1 9 1800 -700 200 L 50 50 0 0 O
ENDDRAW
ENDDEF
#
# VNLD5090
#
DEF VNLD5090 U 0 20 Y Y 1 F N

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@ -0,0 +1,30 @@
(module "OCTAPAK" (layer F.Cu)
(descr "Octapak")
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at -3.606 -0.296) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at -3.606 -0.296) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "OCTAPAK" (at -3.606 -0.296) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -6.1 -3.25) (end 0 -3.25) (layer F.Fab) (width 0.2))
(fp_line (start 0 -3.25) (end 0 3.25) (layer F.Fab) (width 0.2))
(fp_line (start 0 3.25) (end -6.1 3.25) (layer F.Fab) (width 0.2))
(fp_line (start -6.1 3.25) (end -6.1 -3.25) (layer F.Fab) (width 0.2))
(fp_line (start 0 -3.25) (end -6.1 -3.25) (layer F.SilkS) (width 0.2))
(fp_line (start -6.1 -3.25) (end -6.1 3.25) (layer F.SilkS) (width 0.2))
(fp_line (start -6.1 3.25) (end 0 3.25) (layer F.SilkS) (width 0.2))
(fp_circle (center -10.136 -2.568) (end -10.136 -2.52594) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -8.5 -2.55 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -8.5 -1.7 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -8.5 -0.85 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -8.5 0 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -8.5 0.85 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -8.5 1.7 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -8.5 2.55 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -1.7 0 90) (size 5.5 5.9) (layers F.Cu F.Paste F.Mask))
)

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@ -0,0 +1,46 @@
(module PowerSSO-16 (layer F.Cu) (tedit 5E8DAE1C)
(descr VND7020AJ)
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at 0 0) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value PowerSSO-16 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -3.7 -2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 2.45) (end -1.95 -2.45) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 -1.95) (end -1.45 -2.45) (layer F.Fab) (width 0.1))
(fp_line (start -3.45 -2.25) (end -1.95 -2.25) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -2.7 -1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.7 -1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.7 -0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.7 -0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.7 0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -2.7 0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -2.7 1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -2.7 1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 2.7 1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 2.7 1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 2.7 0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 2.7 0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 2.7 -0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 2.7 -0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 2.7 -1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 2.7 -1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 0 0) (size 2.5 4.2) (layers F.Cu F.Paste F.Mask))
(model VND7020AJTR-E.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -14,6 +14,8 @@ A library of kicad symbols and footprints for parts used across the Speeduino bo
* TC4424
* VNLD5090
* VN5160S
* VND7020AJ
* VN7004CLH
## Shields
* Arduino Mega 2560
* STM32F407 Black