Add VND7020AJ and VN7004CLH
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638bfcf480
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74bf2d3250
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@ -18,6 +18,16 @@ K mosfet driver
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F https://www.st.com/resource/en/datasheet/vn5160s-e.pdf
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$ENDCMP
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#
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$CMP VN7004CHTR
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D Gate Drivers ABD VIPOWER
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F http://www.st.com/content/ccc/resource/technical/document/datasheet/b6/fd/97/74/c7/37/4e/f0/DM00177921.pdf/files/DM00177921.pdf/jcr:content/translations/en.DM00177921.pdf
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$ENDCMP
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#
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$CMP VND7020AJTR-E
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D Power Switch ICs - Power Distribution Double chnl hi-side Multi-Sense analog
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F https://componentsearchengine.com/Datasheets/1/VND7020AJTR-E.pdf
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$ENDCMP
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#
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$CMP VNLD5090
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D 25A dual low-side MOSFET driver, SO-8
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K mosfet driver
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@ -186,6 +186,66 @@ X VCC 8 600 200 100 L 50 50 1 1 W
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ENDDRAW
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ENDDEF
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#
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# VN7004CHTR
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#
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DEF VN7004CHTR IC 0 30 Y Y 1 F N
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F0 "IC" 1450 300 50 H V L CNN
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F1 "VN7004CHTR" 1450 200 50 H V L CNN
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F2 "IC_Automotive:OCTAPAK" 1450 100 50 H I L CNN
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F3 "" 1450 0 50 H I L CNN
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F4 "Gate Drivers ABD VIPOWER" 1450 -100 50 H I L CNN "Description"
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F5 "STMicroelectronics" 1450 -300 50 H I L CNN "Manufacturer_Name"
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F6 "VN7004CHTR" 1450 -400 50 H I L CNN "Manufacturer_Part_Number"
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F7 "511-VN7004CHTR" 1450 -500 50 H I L CNN "Mouser Part Number"
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F8 "https://www.mouser.com/Search/Refine.aspx?Keyword=511-VN7004CHTR" 1450 -600 50 H I L CNN "Mouser Price/Stock"
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DRAW
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P 5 0 1 6 200 100 1400 100 1400 -700 200 -700 200 100 N
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X OUTPUT_1 1 0 0 200 R 50 50 0 0 U
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X OUTPUT_2 2 0 -100 200 R 50 50 0 0 U
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X OUTPUT_3 3 0 -200 200 R 50 50 0 0 U
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X INPUT 4 0 -300 200 R 50 50 0 0 U
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X CS 5 0 -400 200 R 50 50 0 0 U
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X SEN 6 0 -500 200 R 50 50 0 0 U
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X GND 7 0 -600 200 R 50 50 0 0 U
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X TAB_(VCC) 8 1600 0 200 L 50 50 0 0 U
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ENDDRAW
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ENDDEF
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#
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# VND7020AJTR-E
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#
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DEF VND7020AJTR-E IC 0 30 Y Y 1 F N
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F0 "IC" 1650 300 50 H V L CNN
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F1 "VND7020AJTR-E" 1650 200 50 H V L CNN
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F2 "IC_Automotive:PowerSSO-16" 1650 100 50 H I L CNN
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F3 "" 1650 0 50 H I L CNN
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F4 "Power Switch ICs - Power Distribution Double chnl hi-side Multi-Sense analog" 1650 -100 50 H I L CNN "Description"
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F5 "1.7" 1650 -200 50 H I L CNN "Height"
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F6 "STMicroelectronics" 1650 -300 50 H I L CNN "Manufacturer_Name"
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F7 "VND7020AJTR-E" 1650 -400 50 H I L CNN "Manufacturer_Part_Number"
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F8 "511-VND7020AJTR-E" 1650 -500 50 H I L CNN "Mouser Part Number"
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F9 "https://www.mouser.com/Search/Refine.aspx?Keyword=511-VND7020AJTR-E" 1650 -600 50 H I L CNN "Mouser Price/Stock"
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DRAW
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P 5 0 1 6 200 100 1600 100 1600 -1000 200 -1000 200 100 N
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X INPUT_0 1 0 0 200 R 50 50 0 0 I
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X OUTPUT1_2 10 1800 -600 200 L 50 50 0 0 O
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X OUTPUT1_3 11 1800 -500 200 L 50 50 0 0 O
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X OUTPUT1_4 12 1800 -400 200 L 50 50 0 0 O
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X OUTPUT0_1 13 1800 -300 200 L 50 50 0 0 O
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X OUTPUT0_2 14 1800 -200 200 L 50 50 0 0 O
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X OUTPUT0_3 15 1800 -100 200 L 50 50 0 0 O
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X OUTPUT0_4 16 1800 0 200 L 50 50 0 0 O
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X EP 17 900 -1200 200 U 50 50 0 0 W
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X ~FAULTRST 2 0 -100 200 R 50 50 0 0 B
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X SEN 3 0 -200 200 R 50 50 0 0 I
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X GND 4 0 -300 200 R 50 50 0 0 W
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X SEL0 5 0 -400 200 R 50 50 0 0 I
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X SEL1 6 0 -500 200 R 50 50 0 0 I
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X MULTISENSE 7 0 -600 200 R 50 50 0 0 I
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X INPUT1 8 0 -700 200 R 50 50 0 0 I
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X OUTPUT1_1 9 1800 -700 200 L 50 50 0 0 O
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ENDDRAW
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ENDDEF
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#
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# VNLD5090
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#
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DEF VNLD5090 U 0 20 Y Y 1 F N
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@ -0,0 +1,30 @@
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(module "OCTAPAK" (layer F.Cu)
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(descr "Octapak")
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(tags "Integrated Circuit")
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(attr smd)
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(fp_text reference IC** (at -3.606 -0.296) (layer F.SilkS)
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(effects (font (size 1.27 1.27) (thickness 0.254)))
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)
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(fp_text user %R (at -3.606 -0.296) (layer F.Fab)
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(effects (font (size 1.27 1.27) (thickness 0.254)))
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)
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(fp_text value "OCTAPAK" (at -3.606 -0.296) (layer F.SilkS) hide
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(effects (font (size 1.27 1.27) (thickness 0.254)))
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)
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(fp_line (start -6.1 -3.25) (end 0 -3.25) (layer F.Fab) (width 0.2))
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(fp_line (start 0 -3.25) (end 0 3.25) (layer F.Fab) (width 0.2))
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(fp_line (start 0 3.25) (end -6.1 3.25) (layer F.Fab) (width 0.2))
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(fp_line (start -6.1 3.25) (end -6.1 -3.25) (layer F.Fab) (width 0.2))
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(fp_line (start 0 -3.25) (end -6.1 -3.25) (layer F.SilkS) (width 0.2))
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(fp_line (start -6.1 -3.25) (end -6.1 3.25) (layer F.SilkS) (width 0.2))
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(fp_line (start -6.1 3.25) (end 0 3.25) (layer F.SilkS) (width 0.2))
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(fp_circle (center -10.136 -2.568) (end -10.136 -2.52594) (layer F.SilkS) (width 0.2))
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(pad 1 smd rect (at -8.5 -2.55 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 2 smd rect (at -8.5 -1.7 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 3 smd rect (at -8.5 -0.85 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 4 smd rect (at -8.5 0 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 5 smd rect (at -8.5 0.85 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 6 smd rect (at -8.5 1.7 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 7 smd rect (at -8.5 2.55 90) (size 0.65 2.1) (layers F.Cu F.Paste F.Mask))
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(pad 8 smd rect (at -1.7 0 90) (size 5.5 5.9) (layers F.Cu F.Paste F.Mask))
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)
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@ -0,0 +1,46 @@
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(module PowerSSO-16 (layer F.Cu) (tedit 5E8DAE1C)
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(descr VND7020AJ)
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(tags "Integrated Circuit")
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(attr smd)
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(fp_text reference IC** (at 0 0) (layer F.SilkS)
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(effects (font (size 1.27 1.27) (thickness 0.254)))
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)
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(fp_text value PowerSSO-16 (at 0 0) (layer F.SilkS) hide
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(effects (font (size 1.27 1.27) (thickness 0.254)))
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)
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 1.27 1.27) (thickness 0.254)))
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)
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(fp_line (start -3.7 -2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05))
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(fp_line (start 3.7 -2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05))
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(fp_line (start 3.7 2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05))
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(fp_line (start -3.7 2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1))
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(fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1))
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(fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1))
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(fp_line (start -1.95 2.45) (end -1.95 -2.45) (layer F.Fab) (width 0.1))
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(fp_line (start -1.95 -1.95) (end -1.45 -2.45) (layer F.Fab) (width 0.1))
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(fp_line (start -3.45 -2.25) (end -1.95 -2.25) (layer F.SilkS) (width 0.2))
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(pad 1 smd rect (at -2.7 -1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 2 smd rect (at -2.7 -1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 3 smd rect (at -2.7 -0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 4 smd rect (at -2.7 -0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 5 smd rect (at -2.7 0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 6 smd rect (at -2.7 0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 7 smd rect (at -2.7 1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 8 smd rect (at -2.7 1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 9 smd rect (at 2.7 1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 10 smd rect (at 2.7 1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 11 smd rect (at 2.7 0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 12 smd rect (at 2.7 0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 13 smd rect (at 2.7 -0.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 14 smd rect (at 2.7 -0.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 15 smd rect (at 2.7 -1.25 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 16 smd rect (at 2.7 -1.75 90) (size 0.3 1.5) (layers F.Cu F.Paste F.Mask))
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(pad 17 smd rect (at 0 0) (size 2.5 4.2) (layers F.Cu F.Paste F.Mask))
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(model VND7020AJTR-E.stp
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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