From 9af22a8cbc617ba4f485a8c1674ce1e0f89321a4 Mon Sep 17 00:00:00 2001 From: Jack Grigg Date: Thu, 29 Jul 2021 20:57:09 +0100 Subject: [PATCH] circuit: Add region layout diagrams for y_switch constraint Helps to see why we can't optimise it to remove the `prev` query. --- src/circuit/gadget/ecc/chip/mul/complete.rs | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/circuit/gadget/ecc/chip/mul/complete.rs b/src/circuit/gadget/ecc/chip/mul/complete.rs index 67521560..030f6f95 100644 --- a/src/circuit/gadget/ecc/chip/mul/complete.rs +++ b/src/circuit/gadget/ecc/chip/mul/complete.rs @@ -42,6 +42,11 @@ impl Config { /// addition gate (controlled by `q_mul`) already checks scalar decomposition for /// the other bits. pub(super) fn create_gate(&self, meta: &mut ConstraintSystem) { + // | y_p | z_complete | + // -------------------- + // | y_p | z_{i + 1} | + // | | base_y | + // | | z_i | meta.create_gate( "Decompose scalar for complete bits of variable-base mul", |meta| { @@ -122,6 +127,12 @@ impl Config { // Each iteration uses 2 rows (two complete additions) let row = 2 * iter; + // | x_p | y_p | x_qr | y_qr | z_complete | + // ------------------------------------------ + // | U_x | U_y | acc_x | acc_y | z_{i + 1} | row + offset + // |acc_x|acc_y|acc+U_x|acc+U_y| base_y | + // | | | res_x | res_y | z_i | + // Update `z`. z = { // z_next = z_cur * 2 + k_next