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# Cores
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The above is a fairly low-level description of a circuit. When implementing circuits we will
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The previous section gives a fairly low-level description of a circuit. When implementing circuits we will
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typically use a higher-level API which aims for the desirable characteristics of auditability,
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efficiency, modularity, and expressiveness.
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consists of a "sea of gates" with no semantically significant ordering. Because of offset
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references, the order of rows in a UPA circuit, on the other hand, *is* significant. We're
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going to make some simplifying assumptions and define some abstractions to tame the resulting
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complexity: the aim will be that, [at the gadget level](#Gadgets) where we do most of our
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complexity: the aim will be that, [at the gadget level](gadgets.md) where we do most of our
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circuit construction, we will not have to deal with relative references or with gate layout
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explicitly.
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