Jack Grigg
|
57596cab36
|
dev: Add a custom `VerifyFailure::CellNotAssigned` emitter
The `dev::tests::unassigned_cell` test case, shown via `assert_eq!(err, Ok(()))`:
```
left: `Err([CellNotAssigned { gate: Gate { index: 0, name: "Equality check" }, region: Region { index: 0, name: "Faulty synthesis" }, gate_offset: 1, column: Column { index: 1, column_type: Advice }, offset: 1 }])`,
right: `Ok(())`',
```
Via `impl Display for VerifyFailure`:
```
Region 0 ('Faulty synthesis') uses Gate 0 ('Equality check') at offset 1, which requires cell in column Column { index: 1, column_type: Advice } at offset 1 to be assigned.
```
Via `VerifyFailure::emit`:
```
error: cell not assigned
Cell layout in region 'Faulty synthesis':
| Offset | A0 | A1 |
+--------+----+----+
| 0 | x0 | |
| 1 | | X | <--{ X marks the spot! 🦜
Gate 'Equality check' (applied at offset 1) queries these cells.
```
|
2022-02-16 13:57:53 +00:00 |
Jack Grigg
|
c19a1ade2a
|
dev: Add a custom `VerifyFailure::Lookup` emitter
The `dev::tests::bad_lookup` test case, shown via `assert_eq!(err, Ok(()))`:
```
left: `Err([Lookup { lookup_index: 0, location: InRegion { region: Region { index: 2, name: "Faulty synthesis" }, offset: 1 } }])`,
right: `Ok(())`',
```
Via `impl Display for VerifyFailure`:
```
Lookup 0 is not satisfied in Region 2 ('Faulty synthesis') at offset 1
```
Via `VerifyFailure::emit`:
```
error: lookup input does not exist in table
(L0) ∉ (F0)
Lookup inputs:
L0 = x1 * x0 + (1 - x1) * 0x2
^
| Cell layout in region 'Faulty synthesis':
| | Offset | A0 | F1 |
| +--------+----+----+
| | 1 | x0 | x1 | <--{ Lookup inputs queried here
|
| Assigned cell values:
| x0 = 0x5
| x1 = 1
```
|
2022-02-16 13:56:17 +00:00 |