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256 lines
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<ol class="chapter"><li class="chapter-item expanded affix "><a href="../../index.html">halo2</a></li><li class="chapter-item expanded "><a href="../../concepts.html"><strong aria-hidden="true">1.</strong> Concepts</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="../../concepts/proofs.html"><strong aria-hidden="true">1.1.</strong> Proof systems</a></li><li class="chapter-item expanded "><a href="../../concepts/arithmetization.html"><strong aria-hidden="true">1.2.</strong> UltraPLONK Arithmetization</a></li><li class="chapter-item expanded "><a href="../../concepts/chips.html"><strong aria-hidden="true">1.3.</strong> Chips</a></li><li class="chapter-item expanded "><a href="../../concepts/gadgets.html"><strong aria-hidden="true">1.4.</strong> Gadgets</a></li></ol></li><li class="chapter-item expanded "><a href="../../user.html"><strong aria-hidden="true">2.</strong> User Documentation</a></li><li><ol class="section"><li class="chapter-item expanded "><a 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href="../../design/proving-system/lookup.html"><strong aria-hidden="true">3.1.1.</strong> Lookup argument</a></li><li class="chapter-item expanded "><a href="../../design/proving-system/permutation.html"><strong aria-hidden="true">3.1.2.</strong> Permutation argument</a></li><li class="chapter-item expanded "><a href="../../design/proving-system/circuit-commitments.html"><strong aria-hidden="true">3.1.3.</strong> Circuit commitments</a></li><li class="chapter-item expanded "><a href="../../design/proving-system/vanishing.html"><strong aria-hidden="true">3.1.4.</strong> Vanishing argument</a></li><li class="chapter-item expanded "><a href="../../design/proving-system/multipoint-opening.html"><strong aria-hidden="true">3.1.5.</strong> Multipoint opening argument</a></li><li class="chapter-item expanded "><a href="../../design/proving-system/inner-product.html"><strong aria-hidden="true">3.1.6.</strong> Inner product argument</a></li><li class="chapter-item expanded "><a href="../../design/proving-system/comparison.html"><strong aria-hidden="true">3.1.7.</strong> Comparison to other work</a></li></ol></li><li class="chapter-item expanded "><a href="../../design/implementation.html"><strong aria-hidden="true">3.2.</strong> Implementation</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="../../design/implementation/proofs.html"><strong aria-hidden="true">3.2.1.</strong> Proofs</a></li><li class="chapter-item expanded "><a href="../../design/implementation/fields.html"><strong aria-hidden="true">3.2.2.</strong> Fields</a></li></ol></li><li class="chapter-item expanded "><a href="../../design/gadgets.html"><strong aria-hidden="true">3.3.</strong> Gadgets</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="../../design/gadgets/sha256.html" class="active"><strong aria-hidden="true">3.3.1.</strong> SHA-256</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="../../design/gadgets/sha256/table16.html"><strong aria-hidden="true">3.3.1.1.</strong> 16-bit table chip</a></li></ol></li></ol></li></ol></li><li class="chapter-item expanded "><a href="../../background.html"><strong aria-hidden="true">4.</strong> Background Material</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="../../background/fields.html"><strong aria-hidden="true">4.1.</strong> Fields</a></li><li class="chapter-item expanded "><a href="../../background/polynomials.html"><strong aria-hidden="true">4.2.</strong> Polynomials</a></li><li class="chapter-item expanded "><a href="../../background/groups.html"><strong aria-hidden="true">4.3.</strong> Cryptographic groups</a></li><li class="chapter-item expanded "><a href="../../background/curves.html"><strong aria-hidden="true">4.4.</strong> Elliptic curves</a></li><li class="chapter-item expanded "><a href="../../background/upa.html"><strong aria-hidden="true">4.5.</strong> UltraPLONK arithmetisation</a></li><li class="chapter-item expanded "><a href="../../background/pc-ipa.html"><strong aria-hidden="true">4.6.</strong> Polynomial commitment using inner product argument</a></li><li class="chapter-item expanded "><a href="../../background/recursion.html"><strong aria-hidden="true">4.7.</strong> Recursion</a></li></ol></li></ol> </div>
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<h1 class="menu-title">The halo2 Book</h1>
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<h1 id="sha-256"><a class="header" href="#sha-256">SHA-256</a></h1>
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<h2 id="specification"><a class="header" href="#specification">Specification</a></h2>
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<p>SHA-256 is specified in <a href="https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.180-4.pdf">NIST FIPS PUB 180-4</a>.</p>
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<p>Unlike the specification, we use <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.675em;vertical-align:0em;"></span><span class="mord amsrm">⊞</span></span></span></span> for addition modulo <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.8141079999999999em;vertical-align:0em;"></span><span class="mord"><span class="mord">2</span><span class="msupsub"><span class="vlist-t"><span class="vlist-r"><span class="vlist" style="height:0.8141079999999999em;"><span style="top:-3.063em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord mtight">32</span></span></span></span></span></span></span></span></span></span></span></span>, and <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.66666em;vertical-align:-0.08333em;"></span><span class="mord">+</span></span></span></span> for
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field addition. <span class="katex"><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.66666em;vertical-align:-0.08333em;"></span><span class="mord">⊕</span></span></span></span> is used for XOR.</p>
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<h2 id="gadget-interface"><a class="header" href="#gadget-interface">Gadget interface</a></h2>
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<p>SHA-256 maintains state in eight 32-bit variables. It processes input as 512-bit blocks,
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but internally splits these blocks into 32-bit chunks. We therefore designed the SHA-256
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gadget to consume input in 32-bit chunks.</p>
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<h2 id="chip-instructions"><a class="header" href="#chip-instructions">Chip instructions</a></h2>
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<p>The SHA-256 gadget requires a chip with the following instructions:</p>
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<pre><pre class="playground"><code class="language-rust">
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<span class="boring">#![allow(unused)]
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</span><span class="boring">fn main() {
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</span><span class="boring">extern crate halo2;
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</span><span class="boring">use halo2::plonk::Error;
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</span><span class="boring">use std::fmt;
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</span><span class="boring">
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</span><span class="boring">trait Chip: Sized {}
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</span><span class="boring">trait Layouter<C: Chip> {}
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</span>const BLOCK_SIZE: usize = 16;
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const DIGEST_SIZE: usize = 8;
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pub trait Sha256Instructions: Chip {
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/// Variable representing the SHA-256 internal state.
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type State: Clone + fmt::Debug;
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/// Variable representing a 32-bit word of the input block to the SHA-256 compression
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/// function.
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type BlockWord: Copy + fmt::Debug;
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/// Places the SHA-256 IV in the circuit, returning the initial state variable.
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fn initialization_vector(layouter: &mut impl Layouter<Self>) -> Result<Self::State, Error>;
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/// Starting from the given initial state, processes a block of input and returns the
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/// final state.
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fn compress(
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layouter: &mut impl Layouter<Self>,
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initial_state: &Self::State,
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input: [Self::BlockWord; BLOCK_SIZE],
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) -> Result<Self::State, Error>;
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/// Converts the given state into a message digest.
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fn digest(
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layouter: &mut impl Layouter<Self>,
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state: &Self::State,
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) -> Result<[Self::BlockWord; DIGEST_SIZE], Error>;
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}
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<span class="boring">}
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</span></code></pre></pre>
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<p>TODO: Add instruction for computing padding.</p>
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<p>This set of instructions was chosen to strike a balance between the reusability of the
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instructions, and the scope for chips to internally optimise them. In particular, we
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considered splitting the compression function into its constituent parts (Ch, Maj etc),
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and providing a compression function gadget that implemented the round logic. However,
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this would prevent chips from using relative references between the various parts of a
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compression round. Having an instruction that implements all compression rounds is also
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similar to the Intel SHA extensions, which provide an instruction that performs multiple
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compression rounds.</p>
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