[ZcF-general] Status update - Update of the Equihash Algorithm (#38)

Dag Arne Osvik dagarne.osvik at uni.lu
Tue May 21 18:48:13 EDT 2019


Dear all,

Here is the current status for project #38:

- My focus so far is to make a really good GPU implementation of 
Equihash 144,5.

- Right now the speed of hashing and writing to main memory corresponds 
to 118 sol/s for Equihash 144,5 on a 1080 Ti. This is the only 
processing-intensive part of the solver, leaving most of the bandwidth 
for the matching stages. The resulting data structure passes 
verification performed on the CPU side.

- The hashing code is in inline PTX (assembler portable between GPU 
generations), and further speedup is possible by going down to SASS 
(generation-specific assembler), but this is already fast enough that it 
makes more sense to complete the solution finding first.

- I have been refining the algorithm for the matching stages over and 
over innumerable times to find an approach that matches the rather 
complex (and under-documented) high-latency memory hierarchy of GPUs. 
The result is an algorithm that parallelises almost all reading and 
writing for all memories. There is very little computation, so hopefully 
there will not be much slowdown due to contention between hashing and 
matching.

- Expected main memory bandwidth requirement is below 5 GiB per 2 solutions.

- I suspect the overall structure of a future FPGA implementation will 
be similar to my current design for GPU.

- I have now started implementing a simplified version of the matching 
algorithm, aiming to have it working as soon as possible so I can move 
on to the final stage of rebuilding solutions.

Best regards,
Dag Arne


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