From 56ad30d051690a1178455394efdeb959559dff5b Mon Sep 17 00:00:00 2001
From: bsdevlin <bsdevlin@Burt>
Date: Tue, 12 Mar 2019 15:10:18 -0400
Subject: [PATCH] Updates to common IP

---
 ip_cores/blake2b/src/tb/blake2b_top_tb.sv | 52 ++++++++++++++++++++---
 ip_cores/common/src/rtl/common_if.sv      | 15 ++++++-
 ip_cores/fifo/scripts/cdc_fifo.tcl        |  8 ++--
 ip_cores/util/src/rtl/packet_arb.sv       |  5 +--
 4 files changed, 65 insertions(+), 15 deletions(-)

diff --git a/ip_cores/blake2b/src/tb/blake2b_top_tb.sv b/ip_cores/blake2b/src/tb/blake2b_top_tb.sv
index 8648f0e..36bdfa5 100644
--- a/ip_cores/blake2b/src/tb/blake2b_top_tb.sv
+++ b/ip_cores/blake2b/src/tb/blake2b_top_tb.sv
@@ -172,6 +172,35 @@ task test_144_encode_len_person_bytes();
   end
 endtask
 
+// This test runs the hash which is shown in the RFC, for "abc"
+task test_multiple_hash_val_low();
+begin
+  integer signed get_len;
+    // 50 bytes needed for Equihash (n=200, k=9)
+    logic [7:0] digest_len = 'd50;
+    logic [127:0] POW_TAG = {32'd9, 32'd200, "WoPhsacZ"}; // ZcashPoW is reversed here
+    logic [common_pkg::MAX_SIM_BYTS*8-1:0] get_dat, in_dat;
+    $display("Running test_144_encode_len_person_bytes...");
+    expected = 'ha6e2f3b234b93dab4c9a246731f31b6215dda0a3cc548c5443b3dbaa0b452265f5d0eb8ca4d7a31747967f8ecc1f0f8b021a;
+    in_dat = 'h000009df030000000000000000000000000000000000000000000000000001a450b5b21b1e03c3bf5813853f0000000000000000000000000000000000000000000000000000000000000000508093fb69a9d9cdf502cc6432d3c2b8bcf81d239e6b3bd59d34122355311630000000488f10fdd62f4d7868c6c21c628bc3d5dfa0f32ff719425110a4d1d61300000004;
+    
+    i_byte_len = 144;    
+    parameters = {32'd0, 8'd1, 8'd1, 8'd0, digest_len};
+    parameters[48*8 +: 16*8] = POW_TAG; 
+    fork
+      repeat(3) begin
+        i_block.put_stream(in_dat, i_byte_len);
+        i_block.dat = 0;
+      end
+      repeat(3) out_hash.get_stream(get_dat, get_len);
+    join
+    // Zero out bytes above digest length
+    for (int i = digest_len; i < common_pkg::MAX_SIM_BYTS; i++) get_dat[i*8 +: 8] = 0;
+    common_pkg::compare_and_print(get_dat, expected);
+  $display("test_multiple_hash_val_low PASSED");
+end
+endtask
+
 // Main testbench calls
 initial begin
   i_block.reset_source();
@@ -179,13 +208,22 @@ initial begin
   parameters = {32'd0, 8'd1, 8'd1, 8'd0, 8'd64};
   #200ns;
   
-  rfc_test();
-  test_127_bytes();
-  test_128_bytes();
-  test_129_bytes();
-  test_140_bytes();
-  test_144_encode_len_person_bytes();
-
+  // If you run these with the pipelined version you need to set the message
+  // length correctly
+  if (USE_BLAKE2B_PIPE == 0 || USE_BLAKE2B_PIPE_MSG_LEN <= 128) begin
+    //rfc_test();
+    //test_127_bytes();   
+    //test_128_bytes();
+    test_multiple_hash_val_low();
+  end
+  
+  if (USE_BLAKE2B_PIPE == 0 || USE_BLAKE2B_PIPE_MSG_LEN > 128) begin
+    //test_129_bytes();
+    //test_140_bytes();
+    //test_144_encode_len_person_bytes();
+    test_multiple_hash_val_low();
+  end
+  
   #10us $finish();
 
 end
diff --git a/ip_cores/common/src/rtl/common_if.sv b/ip_cores/common/src/rtl/common_if.sv
index c03540c..a30d111 100644
--- a/ip_cores/common/src/rtl/common_if.sv
+++ b/ip_cores/common/src/rtl/common_if.sv
@@ -41,7 +41,7 @@ interface if_axi_stream # (
   modport sink (input val, err, sop, eop, ctl, dat, mod, i_clk, output rdy,
                 import function to_struct() );
   modport source (output val, err, sop, eop, ctl, dat, mod, input rdy, i_clk,
-                  import task reset_source(), import task copy_if(in), import function to_struct());
+                  import task reset_source(), import task copy_if(in), import task copy_if_comb(in), import function to_struct());
  
   // Task to reset a source interface signals to all 0
   task reset_source();
@@ -74,7 +74,7 @@ interface if_axi_stream # (
     to_struct.mod = mod;
   endfunction
   
-    // Task to apply signals from one task to another in a clocked process
+  // Task to apply signals from one task to another in a clocked process
   task copy_if(if_t in);
     dat <= in.dat;
     val <= in.val;
@@ -85,6 +85,17 @@ interface if_axi_stream # (
     err <= in.err;
   endtask
   
+  // Same task but for comb
+  task copy_if_comb(if_t in);
+    dat = in.dat;
+    val = in.val;
+    sop = in.sop;
+    eop = in.eop;
+    mod = in.mod;
+    ctl = in.ctl;
+    err = in.err;
+  endtask
+    
   // Task used in simulation to drive data on a source interface
   task automatic put_stream(input logic [common_pkg::MAX_SIM_BYTS*8-1:0] data, input integer signed len);
     logic sop_l=0;
diff --git a/ip_cores/fifo/scripts/cdc_fifo.tcl b/ip_cores/fifo/scripts/cdc_fifo.tcl
index 60b6f74..b98de7e 100644
--- a/ip_cores/fifo/scripts/cdc_fifo.tcl
+++ b/ip_cores/fifo/scripts/cdc_fifo.tcl
@@ -18,6 +18,7 @@
 set cdc_fifo_instance [get_cells -hierarchical -filter { ORIG_REF_NAME =~  "cdc_fifo" || REF_NAME =~  "cdc_fifo" } ]
 foreach child $cdc_fifo_instance {
 
+  set using_bram [get_property USE_BRAM [get_cells $child]]
   set name [get_property NAME $child]
   
   set wr_ptr_cells [get_cells -hierarchical -filter "NAME =~ $name/synchronizer_wr_ptr/* "]
@@ -35,8 +36,9 @@ foreach child $cdc_fifo_instance {
   set_bus_skew -from [get_pins  -filter { NAME =~  "*dat_reg[0]*C" }  -of_objects $rd_ptr_cells] -to [get_pins  -filter { NAME =~  "*dat_reg[1]*D" }  -of_objects $rd_ptr_cells] [expr $clock_period/2]
   set_max_delay -from [get_pins  -filter { NAME =~  "*dat_reg[0]*C" }  -of_objects $rd_ptr_cells] -to [get_pins  -filter { NAME =~  "*dat_reg[1]*D" }  -of_objects $rd_ptr_cells] -datapath_only [expr $clock_period/2]
   
-  set all_cells [get_cells -hierarchical -filter "NAME =~ $name/* "]  
-  set_bus_skew -from [get_pins  -filter { NAME =~  "*ram*C" } -of_objects $all_cells] -to [get_pins  -filter { NAME =~  "*o_dat_b*D" } -of_objects $all_cells] [expr $clock_period/2]
-  set_max_delay -from [get_pins  -filter { NAME =~  "*ram*C" } -of_objects $all_cells] -to [get_pins  -filter { NAME =~  "*o_dat_b*D" } -of_objects $all_cells] -datapath_only [expr $clock_period/2]
+  # This is only needed if the cell is using registers (not BRAM)
+  set all_cells [get_cells -hierarchical -filter "NAME =~ $name/* "]
+  catch {set_bus_skew -from [get_pins  -filter { NAME =~  "*ram*C" } -of_objects $all_cells] -to [get_pins  -filter { NAME =~  "*o_dat_b*D" } -of_objects $all_cells] [expr $clock_period/2]}
+  catch {set_max_delay -from [get_pins  -filter { NAME =~  "*ram*C" } -of_objects $all_cells] -to [get_pins  -filter { NAME =~  "*o_dat_b*D" } -of_objects $all_cells] -datapath_only [expr $clock_period/2]}
   
 } 
\ No newline at end of file
diff --git a/ip_cores/util/src/rtl/packet_arb.sv b/ip_cores/util/src/rtl/packet_arb.sv
index 8f8f6a5..568a364 100644
--- a/ip_cores/util/src/rtl/packet_arb.sv
+++ b/ip_cores/util/src/rtl/packet_arb.sv
@@ -60,8 +60,7 @@ always_ff @ (posedge i_clk) begin
   end else begin
     if (~locked) begin
       idx <= get_next(idx);
-      if (val[idx] && rdy[idx]) begin
-        idx <= idx;
+      if (val[get_next(idx)]) begin
         locked <= 1;
       end
     end else if (eop[idx] && val[idx] && rdy[idx]) begin
@@ -76,7 +75,7 @@ function [$clog2(NUM_IN)-1:0] get_next(input [NUM_IN-1:0] idx);
   get_next = idx;
   for (int i = 0; i < NUM_IN; i++)
     if (val[(idx+i+1) % NUM_IN]) begin
-      get_next = i;
+      get_next = (idx+i+1) % NUM_IN;
       break;
     end
 endfunction