Bugfix for signals not cleared properly

zcash_verif/src/rtl/zcash_verif_equihash.sv

@@ -140,6 +140,7 @@ always_ff @ (posedge i_clk) begin
         if (chk_state == STATE_CHK_DONE) begin
           ram_wr_state <= STATE_WR_IDLE;
           cblockheader_val <= 0;
+          cblockheader_byts <= 0;
           equihash_sol_bram_if_a.a <= 0;          
         end
       end

zcash_verif/src/rtl/zcash_verif_equihash_order.sv

@@ -81,6 +81,7 @@ always_ff @ (posedge i_clk) begin
       done <= 0;
       order_check <= 0;
       index_val <= 0;
+      index_l <= 0;
       o_order_wrong <= |order_check;
       o_val <= 1;
       sol_cnt <= 0;

zcash_verif/src/tb/zcash_verif_equihash_tb.sv

@@ -43,7 +43,7 @@ always_comb begin
   header_346_error.rdy = 0;
   header.val = 0;
   
-  if (start_346) begin
+  if (start_346 && ~done_346) begin
     header_346.rdy = header.rdy;
     header.val = header_346.val;
     header.sop = header_346.sop;
@@ -54,7 +54,7 @@ always_comb begin
     header.dat = header_346.dat;
   end
   
-  if (start_346_error) begin
+  if (start_346_error && ~done_346_error) begin
     header_346_error.rdy = header.rdy;
     header.val = header_346_error.val;
     header.sop = header_346_error.sop;
@@ -146,8 +146,9 @@ endtask
 initial begin
  #20us; // Let internal memories reset
   
- test_block_346();
  test_block_346_error();
+ test_block_346();
+ 
 
  #10us $finish();