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zcash-fpga
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Bug fix for adder that would cause it to lock up state machine

This commit is contained in:
bsdevlin 2019-07-02 17:46:04 +08:00
parent eed8841655
commit 692d051e55
2 changed files with 5 additions and 6 deletions
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4
aws/cl_zcash/verif/tests/test_zcash.sv
View File

@ -243,10 +243,6 @@ task test_bls12_381();
logic [380:0] in_k = 381'h33;
exp_p = fp2_point_mult(in_k, g2_point);
// Make sure we aren't in reset
while(!tb.card.fpga.CL.zcash_fpga_top.bls12_381_top.inst_uram_reset.reset_done ||
!tb.card.fpga.CL.zcash_fpga_top.bls12_381_top.data_uram_reset.reset_done) @(posedge tb.card.fpga.clk_main_a0);
slot_data.dat = random_vector(384/8) % bls12_381_pkg::P;
slot_data.pt = FE;
dat = slot_data;

7
zcash_fpga/src/rtl/bls12_381/bls12_381_top.sv
View File

@ -142,7 +142,10 @@ always_ff @ (posedge i_clk) begin
mul_in_if[2].sop <= 1;
mul_in_if[2].eop <= 1;
add_in_if[2].sop <= 1;
add_in_if[2].eop <= 1;
sub_in_if[2].sop <= 1;
sub_in_if[2].eop <= 1;
new_inst_pt_val_l <= new_inst_pt_val || new_inst_pt_val_l; // Latch this pulse if we want to update instruction pointer
@ -1034,7 +1037,7 @@ always_ff @ (posedge i_clk) begin
interrupt_hdr_byt <= $bits(bls12_381_interrupt_rpl_t)/8;
end
end
// Header needs to be alined to AXI_STREAM_BYTS
// Header needs to be aligned to AXI_STREAM_BYTS
SEND_HDR: begin
if (~tx_if.val || (tx_if.val && tx_if.rdy)) begin
tx_if.sop <= interrupt_hdr_byt == $bits(bls12_381_interrupt_rpl_t)/8;