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Update fifo code

This commit is contained in:
bsdevlin 2019-04-07 14:17:47 -04:00
parent ee34650b44
commit 6dc098c0e9
1 changed files with 6 additions and 1 deletions
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7
ip_cores/fifo/src/rtl/width_change_cdc_fifo.sv
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@ -64,9 +64,12 @@ generate if (SHIFT_DOWN) begin
o_axi_int.rdy <= 0;
if (o_axi_b.val && o_axi_b.rdy) o_axi_b.val <= 0;
if (~o_axi_b.val || (o_axi_b.val && o_axi_b.rdy)) begin
if (o_axi_int.val) begin
if (o_axi_int.val && ~o_axi_int.rdy) begin
if (~sop_l) begin
o_axi_b.ctl <= o_axi_int.ctl;
@ -76,6 +79,8 @@ generate if (SHIFT_DOWN) begin
o_axi_b.dat <= o_axi_int.dat[byt_cnt*8 +: OUT_DAT_BITS];
o_axi_b.sop <= ~sop_l;
o_axi_b.val <= 1;
o_axi_b.eop <= 0;
byt_cnt <= byt_cnt + OUT_DAT_BYTS;